Since this Wa is specific to DirectX, this is not required on Linux.
Signed-off-by: Shekhar Chauhan <shekhar.chau...@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 ---
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 718cb2c80f79..15b82d37486b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -412,9 +412,6 @@
#define XEHP_CULLBIT1 MCR_REG(0x6100)
-#define CHICKEN_RASTER_1 MCR_REG(0x6204)
-#define DIS_SF_ROUND_NEAREST_EVEN REG_BIT(8)
-
#define CHICKEN_RASTER_2 MCR_REG(0x6208)
#define TBIMR_FAST_CLIP REG_BIT(5)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 01807a7dd2c1..5aa0d3f23c6b 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -805,9 +805,6 @@ static void dg2_ctx_workarounds_init(struct intel_engine_cs
*engine,
IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
wa_mcr_masked_en(wal, XEHP_PSS_MODE2,
SCOREBOARD_STALL_FLUSH_CONTROL);
- /* Wa_15010599737:dg2 */
- wa_mcr_masked_en(wal, CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN);
-
/* Wa_18019271663:dg2 */
wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
}
--
2.34.1
