[Intel-gfx] [PATCH] drm/i915: Add Wa_14015150844

[Shekhar Chauhan]

Disables Atomic-chaining of Typed Writes.

BSpec: 54040
Signed-off-by: Shekhar Chauhan <shekhar.chau...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h     |  2 ++
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 ++++++++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 0e4c638fcbbf..82b533aa0c03 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1218,6 +1218,8 @@
 
 #define XEHP_HDC_CHICKEN0                      MCR_REG(0xe5f0)
 #define   LSC_L1_FLUSH_CTL_3D_DATAPORT_FLUSH_EVENTS_MASK       REG_GENMASK(13, 
11)
+#define   ATOMIC_CHAINING_TYPED_WRITES         REG_BIT(3)
+
 #define ICL_HDC_MODE                           MCR_REG(0xe5f4)
 
 #define EU_PERF_CNTL2                          PERF_REG(0xe658)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 864d41bcf6bb..d54120009334 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2327,6 +2327,16 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, 
struct i915_wa_list *wal)
                                  
LSC_L1_FLUSH_CTL_3D_DATAPORT_FLUSH_EVENTS_MASK);
        }
 
+       if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_C0, STEP_FOREVER) ||
+           IS_DG2_GRAPHICS_STEP(i915, G11, STEP_B0, STEP_FOREVER) ||
+           IS_DG2_G12(i915) ||
+           IS_MTL_GRAPHICS_STEP(i915, M, STEP_A0, STEP_FOREVER) ||
+           IS_MTL_GRAPHICS_STEP(i915, P, STEP_A0, STEP_FOREVER)) {
+               /* Wa_14015150844 */
+               wa_mcr_masked_dis(wal, XEHP_HDC_CHICKEN0,
+                                 ATOMIC_CHAINING_TYPED_WRITES);
+       }
+
        if (IS_DG2_G11(i915) || IS_DG2_G10(i915)) {
                /* Wa_22014600077:dg2 */
                wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0,
-- 
2.34.1