This commit moves Frame Buffer Compression-related operations and support
functions into the new intel_pm module.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915/intel_display.c | 484 ---
drivers/gpu/drm/i915
This moves DRPS, RPS and RC6-related functionality into intel_pm module.
It also removes the linux/cpufreq.h include from intel_display, as its
only user was the GPU turbo-related functionality in Gen6+ code path.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 509
This moves the Ironlake energy monitoring functionality into intel_pm
module.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 86 --
drivers/gpu/drm/i915/intel_pm.c | 86 ++
2 files changed, 86
This moves the clock gating-related functions into intel_pm module.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 328 +-
drivers/gpu/drm/i915/intel_drv.h | 16 ++
drivers/gpu/drm/i915/intel_pm.c | 326
On Tue, Apr 17, 2012 at 05:57, Daniel Vetter wrote:
> On Mon, Apr 16, 2012 at 10:20:33PM -0300, Eugeni Dodonov wrote:
> > As Chris Wilson noticed, my previous patch that did the refactoring as
> one big
> > patch which moved everything at once was extremely difficult to review
On Tue, Apr 17, 2012 at 07:49, Daniel Vetter wrote:
> On Fri, Apr 13, 2012 at 05:08:36PM -0300, Eugeni Dodonov wrote:
> > Hi forks,
> >
> > Just in time for everyone's weekend, here comes the 3rd round of patches
> on
> > Haswell.
> >
> > As majo
On Tue, Apr 17, 2012 at 07:12, Daniel Vetter wrote:
> On Fri, Apr 13, 2012 at 05:08:39PM -0300, Eugeni Dodonov wrote:
> > Haswell has different DIP control registers and offsets.
> >
> > Signed-off-by: Eugeni Dodonov
>
> I've read a bit through Bspec wrt dip
This adds intel_pm routine for generic power-related infrastructure
initialization.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 125 +-
drivers/gpu/drm/i915/intel_drv.h | 45 +--
drivers/gpu/drm/i915/intel_pm.c | 142
after
I've sent my original patches.
Eugeni Dodonov (5):
drm/i915: fix line breaks in intel_pm
drm/i915: move drps, rps and rc6-related functions to intel_pm
drm/i915: move emon functionality into intel_pm module
drm/i915: move clock gating functionality into intel_pm module
drm/i915
The previous patch had way too long lines, this fixes them to fit into a
reasonable screen space.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm
This moves the Ironlake energy monitoring functionality into intel_pm
module.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 86 --
drivers/gpu/drm/i915/intel_pm.c | 86
This moves the clock gating-related functions into intel_pm module.
v2: also move the gen7_setup_fixed_func_scheduler function, introduced
after the original patches, into intel_pm as well.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915
This moves DRPS, RPS and RC6-related functionality into intel_pm module.
It also removes the linux/cpufreq.h include from intel_display, as its
only user was the GPU turbo-related functionality in Gen6+ code path.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
This adds intel_pm routine for generic power-related infrastructure
initialization.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 125 +-
drivers/gpu/drm/i915/intel_drv.h | 45
, and brought back static platform-specific functions.
Eugeni Dodonov (4):
drm/i915: move drps, rps and rc6-related functions to intel_pm
drm/i915: move emon functionality into intel_pm module
drm/i915: move clock gating functionality into intel_pm module
drm/i915: add generic power manag
around since the last patch.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 513 --
drivers/gpu/drm/i915/intel_drv.h |1 +
drivers/gpu/drm/i915/intel_pm.c | 513
This moves the Ironlake energy monitoring functionality into intel_pm
module.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 86 --
drivers/gpu/drm/i915/intel_pm.c | 86
following patch which setups a generic PM initialization function,
which was split into a different one to simplify review.
v2: rebase on top of latest drm-intel-next-queued to incorporate all the
changes that went there meanwhile.
Acked-by: Jesse Barnes
Acked-by: Ben Widawsky
Signed-off-by: Eugeni
Widawsky
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 125 +---
drivers/gpu/drm/i915/intel_drv.h | 45 +---
drivers/gpu/drm/i915/intel_pm.c | 212 --
3 files changed, 180 insertions(+), 202 deletions
ivate_t *dev_priv = dev->dev_private;
> + struct intel_pch_pll *pch_plls;
> + int i;
>
+ if (dev_priv->num_pch_pll == 0) {
+ DRM_DEBUG_DRIVER("No PCH PLL available, skipping initialization\n");
+ return 0;
+ }
+
It would work otherwise, but it would give -ENOMEM which is m
On Sat, Apr 21, 2012 at 18:17, Daniel Vetter wrote:
> This got lost in the intel_pm.c move.
>
> Signed-off-by: Daniel Vetter
>
Yes, thanks for catching this!
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
Intel-gfx mail
Lynx Point/Haswell we have, for which I still reuse those
code paths. In the end, I think we'll end up using a different path for
Haswell-onwards for crtc enabling sequence, and those will be gone.
So besides those items, the v6 looks correct to me, and works in my test
cases, and I haven
On Mon, Apr 23, 2012 at 10:59, Eugeni Dodonov wrote:
> On Fri, Apr 20, 2012 at 13:11, Chris Wilson wrote:
>
>> From: Jesse Barnes
>>
>> PCH PLLs aren't required for outputs on the CPU, so we shouldn't just
>> treat them as part of the pipe.
>>
ment of concern for not
> repeating the MODE twiddling in init_render_ring after reset.
>
> Reviewed-by: Chris Wilson
>
Reviewed-by: Eugeni Dodonov
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
915_ring_stop automatically
> resets after a gpu hang is detected to avoid hanging the gpu to fast
> and declaring it wedged.
>
> v2: Incorporate feedback from Chris Wilson.
>
> v3: Add the missing cleanup.
>
> Signed-Off-by: Daniel Vetter
> Reviewed-by: Chris Wilson
e DDI port). But as most of
those features are being worked in parallel, I thought on sending this patch
bomb so it could be used as base for others.
So please, bikeshed and comment :).
Eugeni Dodonov (24):
drm/i915: add Haswell DIP controls registers
drm/i915: support infoframes on Haswell
Haswell has different DIP control registers and offsets.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/i915_reg.h | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f1f4d8f..4f17b74 100644
Haswell has different DIP registers which we need to use for infoframes,
so add proper infrastructure to address that.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_hdmi.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/gpu/drm
: decrease paranoia a bit, as noticed by Chris Wilson
v1 Reviewed-by: Rodrigo Vivi
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 63 ++
1 file changed, 63 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0552058..06f38ec 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm
v2: prevent possible conflicts with VLV.
v3: simplify IRQ handling for Gen5+ onwards.
v1 Reviewed-by: Rodrigo Vivi
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/i915_irq.c |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b
This will throw a DRM_ERROR message when an unknown sdvox register is
given to intel_hdmi_init. When this happens, things could going to be pretty
much broken afterwards, so we better detect this as soon as possible.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_hdmi.c |2
This should be already configured when FDI auto-negotiation is done.
Reviewed-by: Rodrigo Vivi
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm
On Haswell, the recommended PCH-connected output is the one driven by DDI
E in FDI mode, used for VGA connection. All the others are handled by the
CPU.
Note that this does not accounts for Haswell/PPT combination yet.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c
considerable rework of our display handling, so we just leave them all
enabled when the driver is loaded for now.
v2: use more generic and future-proof code
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c | 36
1 file changed, 36 insertions
The line time can be programmed according to the number of horizontal
pixels vs effective pixel rate ratio.
v2: improve comment as per Chris Wilson suggestion
v3: incorporate latest changes in specs.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 13
Avoid bogus asserts on Lynx Point.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 8308da0..ca0edbf 100644
--- a/drivers
Prevent bogus asserts on DDI-related paths.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 35 --
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915
On Haswell, only one pipe can work in FDI mode, so this patch prevents
messing with wrong registers when FDI is being used by non-first pipe.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff
As suggested by Chris Wilson and Daniel Vetter, this chunk of code can be
simplified with a more simple check.
CC: Daniel Vetter
CC: Chris Wilson
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 14 --
1 file changed, 4 insertions(+), 10 deletions
Starting with Haswell, DDI ports can work in FDI mode to support
connectivity with the outputs located on the PCH.
This commit adds support for such connections in the intel_ddi module, and
provides Haswell-specific functionality to make it work.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 5be2ff1..b7e50af 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b
connection
parameters. HDMI uses the last pair of values and ignores the first 9
pairs. So we program HDMI values in both cases, which allows HDMI to work
over both FDI and DP-friendly buffers.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915
calculate those values manually in case no match is found. But I don't
think we'll encounter a mode not covered by those table, and VGA is pretty
much going away in the future anyway.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 319 +++
Those are driven by DDIs on Haswell architecture, so we need to keep track
of which DDI is being used on each output.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_hdmi.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
here for hdmi
initialization.
v2: simplify Haswell handling logic
v3: use generic function for handling digital outputs.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 29 +
drivers/gpu/drm/i915/intel_display.c | 21
This table is used for programming WR PLL clocks, used by HDMI and DVI outputs.
I split it into a separate patch to simplify the HDMI enabling patch which was
getting huge.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 388 ++
1 file
Move intel_hdmi data structure and support functions to a shared location,
to allow their usage from intel_ddi module.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_drv.h | 18 +-
drivers/gpu/drm/i915/intel_hdmi.c | 19 +++
2 files changed, 20
This patch enables i915 driver to handle Haswell devices. It should go in
last, when things are working stable enough.
Signed-off-by: Eugeni Dodonov
---
drivers/char/agp/intel-agp.c|4
drivers/gpu/drm/i915/i915_drv.c |7 +++
2 files changed, 11 insertions(+)
diff --git a
programming instead of HDMI-specific registers.
This commit take advantage of the WR PLL clock table which is in a
separate (previous) commit to select the right divisors for each mode.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 116
v2: check for num_pipe instead, as suggested by Jesse
CC: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0552058
connection
parameters. HDMI uses the last pair of values and ignores the first 9
pairs. So we program HDMI values in both cases, which allows HDMI to work
over both FDI and DP-friendly buffers.
v2: simplify the loop as suggested by Chris Wilson.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm
Haswell has different DIP control registers and offsets.
v2: also add the new DIP frame registers, as suggested by Daniel Vetter.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/i915_reg.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers
Haswell has different DIP registers which we need to use for infoframes,
so add proper infrastructure to address that.
v2: add a comment to indicate that full DIP frames support is still not
there, as suggested by Daniel Vetter.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915
Haswell has different DIP control registers and offsets.
v2: also add the new DIP frame registers, as suggested by Daniel Vetter.
v2.1: fix a typo in HSW_VIDEO_DIP_VS_DATA name for 2nd register.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/i915_reg.h | 34
th it are due to that, or we really need the double-writing.
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
the DP code will be ready, we'll put this in place. But for now, only
HDMI works anyway, and I don't have any DP monitor around to play with :).
Does this looks reasonable?
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
_
> Signed-off-by: Paulo Zanoni
>
Reviewed-by: Eugeni Dodonov
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
915_ring_stop automatically
> resets after a gpu hang is detected to avoid hanging the gpu to fast
> and declaring it wedged.
>
> v2: Incorporate feedback from Chris Wilson.
>
> v3: Add the missing cleanup.
>
> v4: Fix up inconsistent size of ring_stop_read vs _write,
On Wed, May 2, 2012 at 10:55 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Signed-off-by: Paulo Zanoni
>
Reviewed-by: Eugeni Dodonov
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
Intel-gfx mailing list
Intel-gfx@lists.fr
On Wed, May 2, 2012 at 10:55 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> That's what the VIDEO_DIP_CTL documentation says we need to do. Except
> when it's the AVI InfoFrame and we're ironlake_write_infoframe.
>
> Signed-off-by: Paulo Zanoni
>
Reviewe
On Wed, May 2, 2012 at 10:55 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Signed-off-by: Paulo Zanoni
>
Reviewed-by: Eugeni Dodonov
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
Intel-gfx mailing list
Intel-gfx@lists.fr
d
_frequency', no?
And by looking at what this does, perhaps the 2nd function could be named
intel_infoframe_freq_vsync or intel_infoframe_vsync instead?
But besides that:
Reviewed-by: Eugeni Dodonov
--
Eugeni Dodonov
<http://eugeni.dodonov.net/>
___
On 04/27/2012 10:17 AM, Daniel Vetter wrote:
Only half of them even cared, and it's always the same one.
Signed-Off-by: Daniel Vetter
Reviewed-by: Eugeni Dodonov
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
reset code for all generations.
v2: Ensure that we only ignore reset failures when the hw reset is not
implemented and not when it failed.
Signed-off-by: Daniel Vetter
Reviewed-by: Eugeni Dodonov
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
On 04/27/2012 10:17 AM, Daniel Vetter wrote:
- need_display is always true, scrap it.
- don't reacquire the mutex to do nothing after having restored the
gem state.
Signed-Off-by: Daniel Vetter
Reviewed-by: Eugeni Dodonov
___
Intel-gfx ma
On 04/27/2012 10:17 AM, Daniel Vetter wrote:
Slightly cleans up the code and could be useful for e.g. Ben
Widawsky's hw context patches.
v2: New colours!
Cc: Ben Widawsky
Signed-Off-by: Daniel Vetter
Reviewed-by: Eugeni Dodonov
___
Inte
concurent freeeing.
This will be only really used in the next patch.
Signed-Off-by: Daniel Vetter
Reviewed-by: Eugeni Dodonov
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
r
I haven't tested it on a real machine to verify if it actually does the
reset, but this change does explains why it could not work before :).
Reviewed-by: Eugeni Dodonov
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freed
>error)
+ kref_put(&error_priv->error->ref, i915_error_state_free);
+ kfree(error_priv);
Maybe a stupid question, but shouldn't we hold the error_lock here as well?
But apart from that:
Reviewed-by: Eugeni Dodonov
___
Intel-gf
For now, only print their content for diffing, but also add the necessary
bits that can be used for more verbose output in the fugure.
Signed-off-by: Eugeni Dodonov
---
lib/intel_reg.h | 157 ++
tools/intel_reg_dumper.c | 68
;d like to have them merged to drm-intel-next, for wider testing and
availability!
Thanks,
Eugeni Dodonov (25):
drm/i915: add new Haswell DIP controls registers
drm/i915: reuse Ivy Bridge interrupts code for Haswell
drm/i915: add support for SBI ops
drm/i915: calculate watermarks for devic
Haswell has different DIP control registers and offsets which we need to
use for infoframes, which this patch adds.
Note that this does not adds full DIP frames support, but only the basic
functionality necessary for HDMI to work in early enablement.
Signed-off-by: Eugeni Dodonov
---
drivers
Haswell interrupts are mostly similar with Ivy Bridge, so we share same
routines with it.
This patch also simplifies the vblank counter handling for all the Gen5+
architectures.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/i915_irq.c | 11 +--
1 file changed, 9 insertions
: decrease paranoia a bit, as noticed by Chris Wilson
Reviewed-by: Rodrigo Vivi
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 63 ++
1 file changed, 63 insertions(+)
diff --git a/drivers/gpu/drm/i915
This adds proper support for calculating those watermarks, checking for
number of available pipes instead of specific GPU variants when deciding
if watermarks for 3rd pipe are necessary.
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c |3 +--
1
: Daniel Vetter
CC: Chris Wilson
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index
This will throw a BUG() message when an unknown sdvox register is
given to intel_hdmi_init. When this happens, things could going to be pretty
much broken afterwards, so we better detect this as soon as possible.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_hdmi.c |4
1
that
things could go wrong.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index f809d6a..96933cc 100644
--- a/drivers/gpu/drm
considerable rework of our display handling, so we just leave them all
enabled when the driver is loaded for now.
v2: use more generic and future-proof code
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c | 36
1 file changed, 36 insertions
This should be already configured when FDI auto-negotiation is done.
Reviewed-by: Rodrigo Vivi
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
Avoid bogus asserts and PCH PLL accesses on Lynx Point.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
Prevent bogus asserts on DDI-related paths.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 35 --
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915
: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_crt.c |6 +-
drivers/gpu/drm/i915/intel_display.c | 19 ---
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 417ca99..75a70c4 100644
connection
parameters. HDMI uses the last pair of values and ignores the first 9
pairs. So we program HDMI values in both cases, which allows HDMI to work
over both FDI and DP-friendly buffers.
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/Makefile
suggestion.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 115 ++
drivers/gpu/drm/i915/intel_display.c |2 +
drivers/gpu/drm/i915/intel_drv.h |1 +
3 files changed, 118 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index dbd8222..944a876 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu
For now, we simple reuse the Ivy Bridge routines here.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_pm.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bd9549d..452a9bc 100644
--- a
. We do not have their enablement code yet, nor
handle the required clock settings at the moment, so this patch won't
program those values for now.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu/drm/i915/intel_display.c |2 ++
drivers/gpu/drm
This can be acomplished by simple writing 0 to the DDI function control
register too, but better be explicit about what fields we are unsetting
here to prevent possible issues.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 10 ++
1 file changed, 10
relying on a table.
v3: merged a fix from Ben to properly check for invalid divider values.
Reviewed-by: Ben Widawsky
Signed-off-by: Eugeni Dodonov
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_display.c | 100 +-
1 file changed, 97 insertions(+), 3
here for hdmi
initialization.
v2: simplify Haswell handling logic
v3: use generic function for handling digital outputs.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 29 +
drivers/gpu/drm/i915/intel_display.c | 21
Those are driven by DDIs on Haswell architecture, so we need to keep track
of which DDI is being used on each output.
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_hdmi.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers
later stage. But for
now, it provides the most accurate clock setting solution, so we use it
here.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 388 ++
1 file changed, 388 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b
Move intel_hdmi data structure and support functions to a shared location,
to allow their usage from intel_ddi module.
Reviewed-by: Jesse Barnes
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_drv.h | 19 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 19
programming instead of HDMI-specific registers.
This commit take advantage of the WR PLL clock table which is in a
separate (previous) commit to select the right divisors for each mode.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_ddi.c | 116
This patch enables i915 driver to handle Haswell devices. It should go in
last, when things are working stable enough.
Signed-off-by: Eugeni Dodonov
---
drivers/char/agp/intel-agp.c|4
drivers/gpu/drm/i915/i915_drv.c |7 +++
2 files changed, 11 insertions(+)
diff --git a
considerable rework of our display handling, so we just leave them all
enabled when the driver is loaded for now.
v2: use more generic and future-proof code
v3: call intel_init_power_wells from within intel_modeset_init_hw, so it
would be called upon resume path as well.
Signed-off-by: Eugeni Dodonov
that
things could go wrong.
v2: improve non-LPT detection warning per Daniel Vetter's suggestion.
Signed-off-by: Eugeni Dodonov
---
drivers/gpu/drm/i915/intel_display.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gp
On 05/09/2012 09:34 PM, Paulo Zanoni wrote:
2012/5/9 Eugeni Dodonov:
Haswell has different DIP control registers and offsets which we need to
use for infoframes, which this patch adds.
Note that this does not adds full DIP frames support, but only the basic
functionality necessary for HDMI to
101 - 200 of 636 matches
Mail list logo