On 06/03/2025 at 18:12, Andy Shevchenko wrote:
> On Wed, Mar 05, 2025 at 09:50:27PM +, David Laight wrote:
>> On Wed, 5 Mar 2025 21:56:22 +0200
>> Andy Shevchenko wrote:
>>> On Thu, Mar 06, 2025 at 02:17:18AM +0900, Vincent Mailhol wrote:
On 06/03/2025 at 00:48, Andy Shevchenko wrote:
>
On Wed, Mar 05, 2025 at 07:52:31PM +0200, Jani Nikula wrote:
> > - For each new series on lore.kernel.org a bridge would create a PR by
> > taking the latest mirrored drm-tip source, then applying a new series
> > with `b4 shazam`.
>
> There's a small catch here. Patchwork is currently more clever
From: Lucas De Marchi
Now that include/linux/bits.h implements fixed-width GENMASK_*, use them
to implement the i915/xe specific macros. Converting each driver to use
the generic macros are left for later, when/if other driver-specific
macros are also generalized.
Signed-off-by: Lucas De Marchi
From: Dmitry Baryshkov
drm_dp_dpcd_read_link_status() follows the "return error code or number
of bytes read" protocol, with the code returning less bytes than
requested in case of some errors. However most of the drivers
interpreted that as "return error code in case of any error". Switch
drm_dp
On Wed, 5 Mar 2025 21:56:22 +0200
Andy Shevchenko wrote:
> On Thu, Mar 06, 2025 at 02:17:18AM +0900, Vincent Mailhol wrote:
> > On 06/03/2025 at 00:48, Andy Shevchenko wrote:
> > > On Wed, Mar 05, 2025 at 11:48:10PM +0900, Vincent Mailhol wrote:
> > >> On 05/03/2025 at 23:33, Andy Shevchenko
From: Vincent Mailhol
In an upcoming change, GENMASK() and its friends will indirectly
depend on sizeof() which is not available in asm.
Instead of adding further complexity to __GENMASK() to make it work
for both asm and non asm, just split the definition of the two
variants.
Signed-off-by: Vi
On 06/03/2025 at 22:02, Andy Shevchenko wrote:
> On Thu, Mar 06, 2025 at 08:29:51PM +0900, Vincent Mailhol via B4 Relay wrote:
>> Introduce some fixed width variant of the GENMASK() and the BIT()
>> macros in bits.h. Note that the main goal is not to get the correct
>> type, but rather to enforce m
On 05/03/2025 at 23:38, Yury Norov wrote:
> On Wed, Mar 05, 2025 at 04:36:12PM +0200, Andy Shevchenko wrote:
>> On Wed, Mar 05, 2025 at 09:30:20AM -0500, Yury Norov wrote:
>>> On Wed, Mar 05, 2025 at 10:00:13PM +0900, Vincent Mailhol via B4 Relay
>>> wrote:
From: Vincent Mailhol
"i
From: Vincent Mailhol
Add some additional tests in lib/test_bits.c to cover the expected
results of the BIT_U*() macros.
Signed-off-by: Vincent Mailhol
---
lib/test_bits.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/lib/test_bits.c b/lib/test_bits.c
index
c3a40995a25773222
On 06/03/2025 at 22:05, Andy Shevchenko wrote:
> On Thu, Mar 06, 2025 at 08:29:52PM +0900, Vincent Mailhol via B4 Relay wrote:
>> From: Vincent Mailhol
>>
>> In an upcoming change, GENMASK() and its friends will indirectly
>> depend on sizeof() which is not available in asm.
>>
>> Instead of addin
== Series Details ==
Series: Underrun on idle PSR workaround
URL : https://patchwork.freedesktop.org/series/145986/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Underrun on idle PSR workaround
URL : https://patchwork.freedesktop.org/series/145986/
State : warning
== Summary ==
Error: dim checkpatch failed
0c9b1fcefd29 drm/i915/display: Add new interface for getting dc_state
c619884351da drm/i915/psr: Store enabled non-psr
s/selftest_lrc/selftests/
Disable lrc_timestamp test
Quoting Mikolaj Wasiak (2025-03-07 13:16:48)
> This test was supposed to show bug in tigerlake and dg2 hardware.
s/supposed/designed/
s/show/isolate a/
> The bug was found and fixed in newer generations.
> Since we won't support any new hardwar
Existing DPCD access functions return an error code or the number of
bytes being read / write in case of partial access. However a lot of
drivers either (incorrectly) ignore partial access or mishandle error
codes. In other cases this results in a boilerplate code which compares
returned value with
On Thu, 06 Mar 2025 20:29:52 +0900
Vincent Mailhol via B4 Relay
wrote:
> From: Vincent Mailhol
>
> In an upcoming change, GENMASK() and its friends will indirectly
> depend on sizeof() which is not available in asm.
>
> Instead of adding further complexity to __GENMASK() to make it work
> for
On Fri, Mar 07, 2025 at 12:02:09PM +, Kahola, Mika wrote:
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Monday, 3 March 2025 14.52
> > To: Kandpal, Suraj
> > Cc: Jani Nikula ;
> > intel...@lists.freedesktop.org;
> > intel-gfx@lists.freedesktop.org; Syrjala, Ville ;
> > Na
On Thu, Mar 06, 2025 at 06:40:56PM +0530, Ankit Nautiyal wrote:
> The vrr.guardband/pipeline_full depend on the vrr.vmin. Since we have
> set vrr.vmin to adjusted_mode->crtc_vtotal, this shouldn't change on the
> fly. With this we can move vrr.guardband/pipeline_full out from !fastset
> block.
>
>
All callers and implementations are now removed, so remove the operation
and update the documentation to match.
Signed-off-by: Matthew Wilcox (Oracle)
---
Documentation/admin-guide/cgroup-v2.rst | 2 +-
Documentation/filesystems/fscrypt.rst | 2 +-
Documentation/filesystems/locking.rst | 5
On 08/03/2025 at 01:07, Andy Shevchenko wrote:
> On Fri, Mar 07, 2025 at 07:11:42PM +0900, Vincent Mailhol wrote:
>> On 07/03/2025 at 02:55, Andy Shevchenko wrote:
>>> On Fri, Mar 07, 2025 at 01:08:15AM +0900, Vincent Mailhol wrote:
On 06/03/2025 at 22:11, Andy Shevchenko wrote:
> On Thu,
On Wed, Mar 05, 2025 at 04:36:12PM +0200, Andy Shevchenko wrote:
> On Wed, Mar 05, 2025 at 09:30:20AM -0500, Yury Norov wrote:
> > On Wed, Mar 05, 2025 at 10:00:13PM +0900, Vincent Mailhol via B4 Relay
> > wrote:
> > > From: Vincent Mailhol
> > >
> > > "int" was misspelled as "init" in GENMASK_U
On Fri, 7 Mar 2025 18:58:08 +0900
Vincent Mailhol wrote:
> On 07/03/2025 at 04:23, David Laight wrote:
> > On Thu, 06 Mar 2025 20:29:52 +0900
> > Vincent Mailhol via B4 Relay
> > wrote:
> >
> >> From: Vincent Mailhol
> >>
> >> In an upcoming change, GENMASK() and its friends will indirectly
On 06/03/2025 10:37, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2025-03-04 16:43:45)
On 04/03/2025 13:09, Mikolaj Wasiak wrote:
This test exposes bug in tigerlake hardware which prevents it from
succeeding. Since the tested feature is only available on bugged hardware
and we won't support a
Hi Dave and Sima,
Last drm-xe-next pull request for 6.15. It comes with some big features
that we have been working on for some time: EU stall sampling and SVM.
The latter also touches other subsystems and provides the common parts
in the drm layer. Low latency hints from userspace to improve som
On Thu, 06 Mar 2025, Konstantin Ryabitsev
wrote:
> On Thu, Mar 06, 2025 at 12:42:07PM +0200, Jani Nikula wrote:
>> I haven't had the time to dig into b4 source on this, but it would be
>> great if it could automatically detect whether sending colors is the
>> right thing to do or not. Basically o
On Sat, Mar 08, 2025 at 01:48:49AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Yury Norov
>
> Add GENMASK_TYPE() which generalizes __GENMASK() to support different
> types, and implement fixed-types versions of GENMASK() based on it.
> The fixed-type version allows more strict checks to th
== Series Details ==
Series: drm/i915: Increase I915_PARAM_MMAP_GTT_VERSION version to indicate
support for partial mmaps (rev3)
URL : https://patchwork.freedesktop.org/series/145945/
State : warning
== Summary ==
Error: dim checkpatch failed
c832f4990539 drm/i915: Increase I915_PARAM_MMAP_GT
== Series Details ==
Series: drm/i915: Increase I915_PARAM_MMAP_GTT_VERSION version to indicate
support for partial mmaps (rev3)
URL : https://patchwork.freedesktop.org/series/145945/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16246 -> Patchwork_145945v3
==
The handling of the MST Connection Status Notify message is skipped if
the probing of the topology is still pending. Acquiring the
drm_dp_mst_topology_mgr::probe_lock for this in
drm_dp_mst_handle_up_req() is problematic: the task/work this function
is called from is also responsible for handling M
On Fri, Mar 07, 2025 at 08:51:03AM -0600, Lucas De Marchi wrote:
On Fri, Mar 07, 2025 at 02:02:15AM -0600, Lucas De Marchi wrote:
Hi Dave and Sima,
Last drm-xe-next pull request for 6.15. It comes with some big features
that we have been working on for some time: EU stall sampling and SVM.
The
== Series Details ==
Series: drm/i915/xe3lpd: Update bandwidth parameters (rev3)
URL : https://patchwork.freedesktop.org/series/11/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm
Hi i915-ci-in...@lists.freedesktop.org,
On Thursday, 6 March 2025 03:08:57 CET Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix harmfull driver register/unregister assymetry (rev4)
> URL : https://patchwork.freedesktop.org/series/144436/
> State : failure
>
> == Summary ==
>
Reviewed-by: Lyude Paul
On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> drm_dp_dpcd_read_link_status() follows the "return error code or number
> of bytes read" protocol, with the code returning less bytes than
> requested in case of some errors. However
A few tiny nitpicks below, but with those addressed:
Reviewed-by: Lyude Paul
On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Existing DPCD access functions return an error code or the number of
> bytes being read / write in case of partial access. Howeve
== Series Details ==
Series: drm/i915: sagv/bw cleanup (rev2)
URL : https://patchwork.freedesktop.org/series/146014/
State : warning
== Summary ==
Error: dim checkpatch failed
c73c696466a4 drm/i915: Drop the cached per-pipe min_cdclk[] from bw state
4d25dd1d8209 drm/i915: s/intel_crtc_bw/intel
On Fri, Mar 07, 2025 at 07:43:57PM +0200, Andy Shevchenko wrote:
> On Fri, Mar 07, 2025 at 12:18:02PM -0500, Yury Norov wrote:
> > No rush, please allow your reviewers a week or two before submitting
> > a new iteration unless you want to disregard the previous version for
> > some reason, of cours
== Series Details ==
Series: drm/display: dp: add new DPCD access functions
URL : https://patchwork.freedesktop.org/series/145998/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16245 -> Patchwork_145998v1
Summary
---
On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Lucas De Marchi
>
> Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use
> them to implement the i915/xe specific macros. Converting each driver
> to use the generic macros are left for later,
== Series Details ==
Series: drm/i915: Increase I915_PARAM_MMAP_GTT_VERSION version to indicate
support for partial mmaps (rev2)
URL : https://patchwork.freedesktop.org/series/145945/
State : warning
== Summary ==
Error: dim checkpatch failed
9631f5af88ec drm/i915: Increase I915_PARAM_MMAP_GT
From: Ville Syrjälä
Now that all the sagv computation has been moved from the
skl+ watermark code into intel_bw_atomic_check() there is
no point in calling intel_bw_modeset_checks() before the
wm computation. Hide it within intel_bw_atomic_check().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/
From: Ville Syrjälä
I want to use the crtc_state->inherited flag to clean up some
of the early SAGV handling. To make that work nicely I need to
flag even the inactive crtcs as "inherited".
Since we can't expect user space to perform any real commits
on inactive crtcs we'll clear the flag alread
From: Ville Syrjälä
Update a bunch of bw related stuff during readout:
- bw_state->dbuf_bw possible now that the wm readout
has given us access to the plane ddb data
- cdclk_state->bw_min_cdclk
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c| 3 +++
drivers/gpu/d
From: Ville Syrjälä
If there are no changes to intel_crtc_can_enable_sagv() there
is no need to do all the sagv bw_state recomputation.
The only slight caveat here is hw state takeover where we
initially disable SAGV, and want it to get re-enabled once
we've determined that it's safe to do so.
From: Ville Syrjälä
Pull the new_bw_state->active_pipes computation out from
intel_compute_sagv_mask() and move it into the intel_bw.c
(which is arguably the correct place for it).
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c | 29
drivers/
From: Ville Syrjälä
Make skl_*_calc_dbuf_bw() a bit lower level passing in the
to be mutated dbuf_bw struct in explicitly. This will allow
more reuse later.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions
From: Ville Syrjälä
Extract the struct intel_dbuf_bw comparison into a small
helper. We'll get more users later.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm
From: Ville Syrjälä
Remove the force_check_qgv flag and just fill the pipe_sagv_reject
bitmask properly during readout. This will cause the initial commit
to re-enable SAGV if possible.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c | 12 ++--
drivers/gpu/drm/
From: Ville Syrjälä
intel_bw_crtc_min_cdclk() only depends on the pipe data rate,
which we already have stashed in bw_state->data_rate[]. So
stashing the resulting min_cdclk[] as well is redundant. Get
rid of it.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c | 17 +++
From: Ville Syrjälä
Continue improving the code around sagv/bw vs.
watermarks. A lot of the details get better encapsulated
within intel_bw.c and the complicated interactions between
different parts of the code are somewhat reduced.
Ville Syrjälä (14):
drm/i915: Drop the cached per-pipe min_c
== Series Details ==
Series: drm/i915: sagv/bw cleanup
URL : https://patchwork.freedesktop.org/series/146014/
State : warning
== Summary ==
Error: dim checkpatch failed
a5fb29a33b44 drm/i915: Drop the cached per-pipe min_cdclk[] from bw state
57ad45e27d59 drm/i915: s/intel_crtc_bw/intel_dbuf_b
From: Ville Syrjälä
intel_compute_sagv_mask() has become pointless. Just inline
its contents into the existing loop in skl_compute_wm().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_watermark.c | 64
1 file changed, 24 insertions(+), 40 deletions(-)
d
Update intel_bw.c internally use intel_display. Conversion of the public
interface will come as a follow-up.
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c | 416 +---
1 file changed, 217 insertions(+), 199 deletions(-)
di
We already have internal interface for intel_bw.c converted to use
intel_display. Now convert the external interface as well.
Cc: Ville Syrjälä
Signed-off-by: Gustavo Sousa
---
drivers/gpu/drm/i915/display/intel_bw.c| 25 +-
drivers/gpu/drm/i915/display/intel_bw.
Bandwidth parameters for Xe3_LPD have been updated with respect to
previous display releases. Encode them into xe3lpd_sa_info and use that
new struct.
Since we are touching intel_bw.c, also take the opportunity convert it
to intel_display.
Changes in v2:
- Fix typo in patch #2.
Changes in v3:
On Fri, Mar 07, 2025 at 07:48:01PM +0200, Andy Shevchenko wrote:
> On Sat, Mar 08, 2025 at 01:48:50AM +0900, Vincent Mailhol via B4 Relay wrote:
...
> > /*
> > * Missing asm support
> > *
> > - * GENMASK_U*() depends on BITS_PER_TYPE() which relies on sizeof(),
> > - * something not availabl
From: Ville Syrjälä
Currently intel_bw_calc_min_cdclk() always adds the bw_state
to the atomic state. Not only does it result in potentially
redundant work later, it's also currently causing unwanted cdclk
changes during driver load.
Check if the dbuf bw is actually changing before we decide to
== Series Details ==
Series: drm/i915/xe3lpd: Update bandwidth parameters (rev3)
URL : https://patchwork.freedesktop.org/series/11/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16246 -> Patchwork_11v3
Summary
-
No rush, please allow your reviewers a week or two before submitting
a new iteration unless you want to disregard the previous version for
some reason, of course. This will not get into the upcoming merge
window, anyways.
So, what should I do? Go through the v5 and all discussions in there,
or jus
== Series Details ==
Series: drm/i915: Increase I915_PARAM_MMAP_GTT_VERSION version to indicate
support for partial mmaps (rev2)
URL : https://patchwork.freedesktop.org/series/145945/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16245 -> Patchwork_145945v2
==
On Fri, Mar 07, 2025 at 12:48:36PM -0500, Yury Norov wrote:
> On Fri, Mar 07, 2025 at 07:43:57PM +0200, Andy Shevchenko wrote:
> > On Fri, Mar 07, 2025 at 12:18:02PM -0500, Yury Norov wrote:
> > > No rush, please allow your reviewers a week or two before submitting
> > > a new iteration unless you
On Sat, Mar 08, 2025 at 01:48:50AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Lucas De Marchi
>
> Implement fixed-type BIT_U*() to help drivers add stricter checks,
> like it was done for GENMASK_U*().
...
> /*
> * Missing asm support
> *
> - * GENMASK_U*() depends on BITS_PER_TYPE
== Series Details ==
Series: drm/i915: sagv/bw cleanup
URL : https://patchwork.freedesktop.org/series/146014/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16246 -> Patchwork_146014v1
Summary
---
**FAILURE**
Serio
I thought we had agreed that drm_dp_aux_dev.c was one of the few places where
we wanted to keep using the old functions here?
On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Switch drm_dp_aux_dev.c to use new set of DPCD read / write helpers.
>
> Acked-by
On Fri, Mar 07, 2025 at 05:53:38PM -0500, Lyude Paul wrote:
> I thought we had agreed that drm_dp_aux_dev.c was one of the few places where
> we wanted to keep using the old functions here?
Hmm, I thought I dropped it.
>
> On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> > From: Dmit
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