From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Remove the force_check_qgv flag and just fill the pipe_sagv_reject
bitmask properly during readout. This will cause the initial commit
to re-enable SAGV if possible.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 12 ++++++------
 drivers/gpu/drm/i915/display/intel_bw.h |  6 ------
 2 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index bbb040be0502..e11fd94e9e29 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -1399,9 +1399,8 @@ int intel_bw_atomic_check(struct intel_atomic_state 
*state)
        new_bw_state = intel_atomic_get_new_bw_state(state);
 
        if (new_bw_state &&
-           (intel_can_enable_sagv(i915, old_bw_state) !=
-            intel_can_enable_sagv(i915, new_bw_state) ||
-            new_bw_state->force_check_qgv))
+           intel_can_enable_sagv(i915, old_bw_state) !=
+           intel_can_enable_sagv(i915, new_bw_state))
                changed = true;
 
        /*
@@ -1415,8 +1414,6 @@ int intel_bw_atomic_check(struct intel_atomic_state 
*state)
        if (ret)
                return ret;
 
-       new_bw_state->force_check_qgv = false;
-
        return 0;
 }
 
@@ -1430,7 +1427,6 @@ static void intel_bw_crtc_update(struct intel_bw_state 
*bw_state,
                intel_bw_crtc_data_rate(crtc_state);
        bw_state->num_active_planes[crtc->pipe] =
                intel_bw_crtc_num_active_planes(crtc_state);
-       bw_state->force_check_qgv = true;
 
        drm_dbg_kms(&i915->drm, "pipe %c data rate %u num active planes %u\n",
                    pipe_name(crtc->pipe),
@@ -1448,6 +1444,7 @@ void intel_bw_update_hw_state(struct intel_display 
*display)
                return;
 
        bw_state->active_pipes = 0;
+       bw_state->pipe_sagv_reject = 0;
 
        for_each_intel_crtc(display->drm, crtc) {
                const struct intel_crtc_state *crtc_state =
@@ -1461,6 +1458,9 @@ void intel_bw_update_hw_state(struct intel_display 
*display)
                        intel_bw_crtc_update(bw_state, crtc_state);
 
                skl_crtc_calc_dbuf_bw(&bw_state->dbuf_bw[pipe], crtc_state);
+
+               /* initially SAGV has been forced off */
+               bw_state->pipe_sagv_reject |= BIT(pipe);
        }
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h 
b/drivers/gpu/drm/i915/display/intel_bw.h
index e977c3586dc3..d3f92951b057 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.h
+++ b/drivers/gpu/drm/i915/display/intel_bw.h
@@ -49,12 +49,6 @@ struct intel_bw_state {
         */
        u16 qgv_points_mask;
 
-       /*
-        * Flag to force the QGV comparison in atomic check right after the
-        * hw state readout
-        */
-       bool force_check_qgv;
-
        unsigned int data_rate[I915_MAX_PIPES];
        u8 num_active_planes[I915_MAX_PIPES];
 };
-- 
2.45.3

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