On Mon, Jan 04, 2016 at 05:31:14PM +0200, Ville Syrjälä wrote:
> On Mon, Jan 04, 2016 at 10:11:01AM +, Chris Wilson wrote:
> > Unlike the handle, the name table uses a sleeping mutex rather than a
> > spinlock. The allocation is in a normal context, and we can use the
> > simpler sleeping gfp_t
== Summary ==
Built on 0417da5e6f56078d87d366d5f959f8290ae9d16d drm-intel-nightly:
2016y-01m-04d-14h-05m-39s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (ilk-hp8440p)
Subgroup basic-flip-vs-modeset:
On Mon, Jan 04, 2016 at 12:53:19PM +0100, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_display.c | 11 ---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/i
On Mon, Jan 04, 2016 at 12:53:16PM +0100, Maarten Lankhorst wrote:
> This is useful for drivers that subclass connector_state, like tegra.
>
> Changes since v1:
> - Docbook updates.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/drm_atomic_helper.c | 30 ++-
On Mon, Jan 04, 2016 at 12:53:18PM +0100, Maarten Lankhorst wrote:
> It can be useful to iterate over connectors without grabbing
> connection_mutex. It can also be used to see how many connectors
> are on a crtc without iterating over the list.
>
> Signed-off-by: Maarten Lankhorst
Merged up to
On Mon, Jan 04, 2016 at 12:53:20PM +0100, Maarten Lankhorst wrote:
> Now that connector_mask is reliable there's no need for this
> function any more.
>
> Signed-off-by: Maarten Lankhorst
Since this doesn't touch i915 I figured I can merge this one too. So
except for the previous i915 patch it's
On Tue, Dec 08, 2015 at 12:01:57PM +, Daniel Stone wrote:
> Hi,
>
> On 8 December 2015 at 08:49, Daniel Vetter wrote:
> > We want this for consistency with existing page_flip semantics.
> >
> > Since this spurred quite a discussion on IRC also document why we
> > reject even generation when t
Op 05-01-16 om 09:35 schreef Daniel Vetter:
> On Mon, Jan 04, 2016 at 12:53:19PM +0100, Maarten Lankhorst wrote:
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu/drm/i915/intel_display.c | 11 ---
>> 1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/d
On Tue, Jan 05, 2016 at 10:05:21AM +0100, Maarten Lankhorst wrote:
> Op 05-01-16 om 09:35 schreef Daniel Vetter:
> > On Mon, Jan 04, 2016 at 12:53:19PM +0100, Maarten Lankhorst wrote:
> >> Signed-off-by: Maarten Lankhorst
> >> ---
> >> drivers/gpu/drm/i915/intel_display.c | 11 ---
> >> 1
Op 05-01-16 om 10:10 schreef Daniel Vetter:
> On Tue, Jan 05, 2016 at 10:05:21AM +0100, Maarten Lankhorst wrote:
>> Op 05-01-16 om 09:35 schreef Daniel Vetter:
>>> On Mon, Jan 04, 2016 at 12:53:19PM +0100, Maarten Lankhorst wrote:
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/dr
On Mon, 2016-01-04 at 18:44 +0200, Ville Syrjälä wrote:
> On Mon, Jan 04, 2016 at 01:21:24PM +0200, Mika Kahola wrote:
> > Don't use DP link training optimization if channel EQ is not ok. It has
> > been reported that in case of failure in channel EQ check the link training
> > optimization can be
On Tue, Dec 29, 2015 at 05:28:04PM +, Chris Wilson wrote:
> On Tue, Dec 29, 2015 at 06:24:52PM +0100, Michał Winiarski wrote:
> > According to PRM, some parts of HW require the addresses to be in
> > a canonical form, where bits [63:48] == [47]. Let's convert addresses to
> > canonical form pri
From: Dhanya
This patch will verify color correction capability of a display driver.
Gamma/CSC/De-gamma for BDW/SKL/BXT and CHT supported.
Signed-off-by: Dhanya
---
tests/.gitignore |1 +
tests/Makefile.sources |1 +
tests/kms_color.c | 1014 +
On Wed, Dec 23, 2015 at 02:26:11PM -0800, Andrew Morton wrote:
> On Wed, 23 Dec 2015 17:04:27 -0500 Johannes Weiner wrote:
>
> > On Thu, Dec 10, 2015 at 10:32:42AM +0100, Daniel Vetter wrote:
> > > On Fri, Dec 04, 2015 at 11:09:52AM -0500, Johannes Weiner wrote:
> > > > On Fri, Dec 04, 2015 at 03
On Mon, Jan 04, 2016 at 01:38:26PM -0800, Jesse Barnes wrote:
> On 01/04/2016 11:39 AM, Chris Wilson wrote:
> > This series is NAKed.
>
> Why? Because you want things in a different order? Or do you object to
> something in Dave's reply?
The series was intended as a code cleanup and in the pro
On Wed, Dec 23, 2015 at 03:39:04PM +, Dave Gordon wrote:
> On 16/12/15 19:45, yu@intel.com wrote:
> >From: Alex Dai
> >
> >Split GuC work queue space checking from submission and move it to
> >ring_alloc_request_extras. The reason is that failure in later
> >i915_add_request() won't be han
On Tue, 05 Jan 2016, Rodrigo Vivi wrote:
> No functional changes with this patch. The idea is just to organize
> the platform features in a standard place making new platform aditions
> easily and possible to see all the present features of the platform on
> the intel info dumped information at dm
On Tue, 05 Jan 2016, Rodrigo Vivi wrote:
> No functional changes with this patch. The idea is just to organize
> the platform features in a standard place making new platform aditions
> easily and possible to see all the present features of the platform on
> the intel info dumped information at dm
On Mon, Jan 04, 2016 at 07:18:26PM +0530, Kumar, Shobhit wrote:
> On 12/23/2015 08:22 AM, Kumar, Shobhit wrote:
> >On 12/21/2015 05:39 PM, Daniel Vetter wrote:
> >>On Fri, Dec 18, 2015 at 07:24:19AM -0800, Matt Roper wrote:
> >>>On Fri, Dec 18, 2015 at 07:14:17AM -0800, Matt Roper wrote:
> On F
On Tue, Dec 29, 2015 at 11:58:26AM +, Chris Wilson wrote:
> On Tue, Dec 29, 2015 at 12:35:39PM +0530, Praveen Paneri wrote:
> > i915_gem_shrink_all() will scan the bound list only if device is not
> > suspended but in OOM scenarios it becomes absolutely necessary to
> > release as much memory a
On Mon, Jan 04, 2016 at 01:34:46PM -0800, Jesse Barnes wrote:
> On 12/11/2015 03:33 AM, Chris Wilson wrote:
> > +* Note that this effectively effectively stalls the read by the time
> > +* it takes to do a memory transaction, which more or less ensures
> > +* that the write from the GPU
On Wed, Dec 23, 2015 at 09:47:00AM +, Daniel Stone wrote:
> Hi,
>
> On 21 December 2015 at 12:38, Daniel Vetter wrote:
> > On Fri, Dec 18, 2015 at 04:53:28PM +, Daniel Stone wrote:
> >> > +struct drm_r32g32b32 {
> >> > + /*
> >> > +* Data is in U8.24 fixed point format.
> >>
On Fri, Dec 18, 2015 at 12:00:08PM -0800, yu@intel.com wrote:
> From: Dave Gordon
>
> The GuC code needs to know the size of a logical context, so we
> expose get_lr_context_size(), renaming it intel_lr_context__size()
> to fit the naming conventions for nonstatic functions.
>
> For: VIZ-202
On Tue, Jan 05, 2016 at 11:16:52AM +0100, Daniel Vetter wrote:
> On Tue, Dec 29, 2015 at 11:58:26AM +, Chris Wilson wrote:
> > On Tue, Dec 29, 2015 at 12:35:39PM +0530, Praveen Paneri wrote:
> > > i915_gem_shrink_all() will scan the bound list only if device is not
> > > suspended but in OOM sc
On Mon, Jan 04, 2016 at 07:11:29PM +, Dave Gordon wrote:
> On 18/12/15 20:00, yu@intel.com wrote:
> >From: Alex Dai
> >
> >The GuC firmware uses this for various purposes. The ADS itself is a chunk of
> >memory created by driver to share with GuC. This series creates the GuC ADS
> >object
On Mon, Dec 21, 2015 at 03:10:53PM +0200, Jani Nikula wrote:
> Just for OCD.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_bios.h | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.h
>
On Mon, Dec 21, 2015 at 03:10:54PM +0200, Jani Nikula wrote:
> There's two blocks to parse, have one function per block. The existing
> one cuts neatly into two.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_bios.c | 27 +++---
On Mon, Dec 21, 2015 at 03:10:55PM +0200, Jani Nikula wrote:
> Have get_blocksize() support the special case of MIPI sequence block v3+
> which has a separate field for size. Provide and use abstractions for
> getting the blocksize given a pointer to the block "envelope",
> i.e. pointer to the bloc
On Mon, Dec 21, 2015 at 03:10:56PM +0200, Jani Nikula wrote:
> Make the whole thing easier to read.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_bios.c | 76
> +--
> 1 file changed, 42 insertions(+), 34 deletions(-)
>
> diff --git a/driv
On Tue, Jan 05, 2016 at 01:30:53AM +, Kumar, Abhay wrote:
> Ville,
>
> Is this patch is coming close to what you wanted?
Please don't bottom-post but not quote properly - no one will ever find
your comment and assume you accidentally sent out the patch twice. If you
have to use a broken mai
On Mon, 2016-01-04 at 18:53 +0200, Ville Syrjälä wrote:
> On Mon, Jan 04, 2016 at 06:44:09PM +0200, Ville Syrjälä wrote:
> > On Mon, Jan 04, 2016 at 01:21:24PM +0200, Mika Kahola wrote:
> > > Don't use DP link training optimization if channel EQ is not ok. It has
> > > been reported that in case of
On Mon, 2016-01-04 at 18:27 +0100, Thierry Reding wrote:
> On Tue, Dec 22, 2015 at 04:53:41PM +0100, Lukas Wunner wrote:
> > Hi Mika,
> >
> > On Mon, Dec 21, 2015 at 01:39:15PM +0200, Mika Kahola wrote:
> > > Check if no AUX transactions are required on DP link training.
> > > If this bit is set,
On Mon, 2016-01-04 at 18:42 +0200, Ville Syrjälä wrote:
> On Mon, Jan 04, 2016 at 01:21:22PM +0200, Mika Kahola wrote:
> > Disable DP link training optimization if DP link configuration
> > changes. If one of the DP link parameters i.e. link rate or
> > lane count changes the link training does no
This function was recently renamed & exposed, so now it gets documented
Signed-off-by: Dave Gordon
---
drivers/gpu/drm/i915/intel_lrc.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 8da67b3..3662d14 1
== Summary ==
HEAD is now at c837c0f drm-intel-nightly: 2016y-01m-05d-10h-35m-52s UTC
integration manifest
Applying: drm/i915: add kerneldoc for intel_lr_context_size()
Applying: drm/i915/guc: Add GuC ADS (Addition Data Structure) - allocation
Repository lacks necessary blobs to fall back on 3-wa
On Tue, 05 Jan 2016, Daniel Vetter wrote:
> On Mon, Dec 21, 2015 at 03:10:56PM +0200, Jani Nikula wrote:
>> Make the whole thing easier to read.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/intel_bios.c | 76
>> +--
>> 1 file changed, 42 i
On 11/12/15 11:33, Chris Wilson wrote:
In order to ensure seqno/irq coherency, we current read a ring register.
We are not sure quite how it works, only that is does. Experiments show
that e.g. doing a clflush(seqno) instead is not sufficient, but we can
remove the forcewake dance from the mmio a
Current DP detection has DPCD operations split across
intel_dp_hpd_pulse and intel_dp_detect which contains
duplicates as well. Also intel_dp_detect is called
during modes enumeration as well which will result
in multiple dpcd operations. So this patch tries
to solve both these by bringing all DPCD
When created originally intel_dp_check_link_status()
was supposed to handle only link training for short
pulse but has grown into handler for short pulse itself.
This patch cleans up this function by splitting it into
two halves. First intel_dp_short_pulse() is called,
which will be entry point and
Sink count can change between short pulse hpd hence this patch
adds a member variable to intel_dp so we can track any changes
between short pulse interrupts.
Tested-by: Nathan D Ciobanu
Signed-off-by: Sivakumar Thulasimani
Signed-off-by: Shubhangi Shrivastava
---
drivers/gpu/drm/i915/intel_dp.
This patch set cleans up DP detection logic to bring all DPCD
operations at one place and to create a clear demarcation
between handling of long and short pulses. This simplifies
fixing of sink count related detection for DP panels.
Patches:
1. First two patches clean up intel_dp_detect and form a
intel_dp_detect() is called for not just detection but
during modes enumeration as well. Repeating the whole
sequence during each of these calls is wasteful and
time consuming.
This patch moves probing for panel, DPCD read etc done in
intel_dp_detect() to a new function intel_dp_long_pulse().
Note
This patch reads sink_count dpcd always and removes its
read operation based on values in downstream port dpcd.
SINK_COUNT dpcd is not dependent on DOWNSTREAM_PORT_PRESENT dpcd.
SINK_COUNT denotes if a display is attached, while
DOWNSTREAM_PORT_PRESET indicates how many ports are available
in the
This patch checks for changes in sink count between short pulse
hpds and forces full detect when there is a change.
This will allow both detection of hotplug and unplug of panels
through dongles that give only short pulse for such events.
v2: changed variable type from u8 to bool (Jani)
retur
Hi,
Can someone please help review this patch series from December.
https://patchwork.freedesktop.org/series/1864/
Thank you.
Yetunde
> -Original Message-
> From: Adebisi, YetundeX
> Sent: Wednesday, December 16, 2015 12:07 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Adebisi, Yetun
On Tue, 05 Jan 2016, Daniel Vetter wrote:
> On Mon, Dec 21, 2015 at 03:10:55PM +0200, Jani Nikula wrote:
>> Have get_blocksize() support the special case of MIPI sequence block v3+
>> which has a separate field for size. Provide and use abstractions for
>> getting the blocksize given a pointer to
On 05/01/16 10:06, Chris Wilson wrote:
On Mon, Jan 04, 2016 at 01:38:26PM -0800, Jesse Barnes wrote:
On 01/04/2016 11:39 AM, Chris Wilson wrote:
This series is NAKed.
Why? Because you want things in a different order? Or do you object to
something in Dave's reply?
The series was intended
Hi,
On Thu, Sep 24, 2015 at 03:53:07PM -0700, Matt Roper wrote:
> Just pull the info out of the plane state structure rather than staging
> it in an additional structure.
>
> v2: Add 'visible' condition to sprites_scaled so that we don't limit the
> WM level when the sprite isn't enabled. (V
Don't use DP link training optimization if channel EQ is not ok. It has
been reported that in case of failure in channel EQ check the link training
optimization can be enabled and therefore may not be able to reuse the
previously computed drive current and pre-emphasis levels.
v2: Added MST case (
These three patches are fixes for DP link trainging failures and flickering
issues
reported by https://bugs.freedesktop.org/show_bug.cgi?id=91393
Mika Kahola (3):
drm/i915: Disable fast link training if DP config changes
drm/i915: Check DP no aux transaction bit on link training
drm/i915: D
Disable DP link training optimization if DP link configuration
changes. If one of the DP link parameters i.e. link rate or
lane count changes the link training does no longer apply the
previously computed drive current and pre-emphasis level.
Instead, the link training is started with zero values.
Check if *NO_AUX_TRANSACTIONS_LINK_TRAINING* bit is set on
DPCD registers. If this bit is set, we can reuse the known
good drive current and pre-emphasis level from the last
"full" link training.
v2: Commit message update (Thierry)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393
Sign
== Summary ==
Built on 05ade905f2fda5416476677509e016ef830d181a drm-intel-nightly:
2016y-01m-05d-13h-00m-24s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
dmesg-warn -> PASS (bdw-nuci7)
dmesg-warn -> PASS (skl-i7k-2)
Te
Make the whole thing easier to read. While at it, make the parsing more
robust, and ensure we don't read past buffer being parsed.
v2: improve commit message (Daniel)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_bios.c | 76 +--
1 file changed, 4
On Mon, Jan 4, 2016 at 4:05 PM, Ville Syrjälä
wrote:
> I think what we really need here is some kind of
> intel_display_power_get_unless_zero() thing. We need to make sure not
> only that the rpm reference is held when reading out the state, but also
> that the relevant power well(s) remain enable
On Tue, Jan 05, 2016 at 12:21:33PM +, Dave Gordon wrote:
> This function was recently renamed & exposed, so now it gets documented
>
> Signed-off-by: Dave Gordon
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 14 ++
> 1 file changed,
On Tue, Jan 05, 2016 at 02:45:00PM +0200, Jani Nikula wrote:
> On Tue, 05 Jan 2016, Daniel Vetter wrote:
> > On Mon, Dec 21, 2015 at 03:10:56PM +0200, Jani Nikula wrote:
> >> Make the whole thing easier to read.
> >>
> >> Signed-off-by: Jani Nikula
> >> ---
> >> drivers/gpu/drm/i915/intel_bios.
On Tue, Jan 05, 2016 at 02:54:31PM +0100, Daniel Vetter wrote:
> On Mon, Jan 4, 2016 at 4:05 PM, Ville Syrjälä
> wrote:
> > I think what we really need here is some kind of
> > intel_display_power_get_unless_zero() thing. We need to make sure not
> > only that the rpm reference is held when readin
On Mon, Dec 21, 2015 at 03:10:57PM +0200, Jani Nikula wrote:
> Make everything a bit more readable and clear.
>
> Signed-off-by: Jani Nikula
A real pain to check, but I think I convinced myself that this is
equivalent code.
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/i915_drv.h
On Mon, Dec 21, 2015 at 03:10:58PM +0200, Jani Nikula wrote:
> Untie the VBT based generic panel driver from the VBT parsing, so that
> the two don't have to be updated in lockstep.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |
On Mon, Dec 21, 2015 at 03:10:59PM +0200, Jani Nikula wrote:
> Untie the VBT based generic panel driver from the VBT parsing, so that
> the two don't have to be updated in lockstep.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 22 +-
> 1
On Mon, Dec 21, 2015 at 03:11:05PM +0200, Jani Nikula wrote:
> The sequence block has sizes of elements after the operation byte since
> sequence block v3. Use it to skip elements we don't support yet.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 43
>
On Mon, Dec 21, 2015 at 03:11:06PM +0200, Jani Nikula wrote:
> Make it a bit tidier.
Also more save.
> Signed-off-by: Jani Nikula
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 62
> +++---
> 1 file changed, 22 insertions(+), 40 delet
== Summary ==
Built on 05ade905f2fda5416476677509e016ef830d181a drm-intel-nightly:
2016y-01m-05d-13h-00m-24s UTC integration manifest
Test gem_storedw_loop:
Subgroup basic-render:
dmesg-warn -> PASS (bdw-nuci7)
Test kms_flip:
Subgroup basic-flip-vs-modeset:
On Wed, Dec 23, 2015 at 01:40:06PM +0100, Christoph Mathys wrote:
> On Tue, Dec 22, 2015 at 4:37 PM, Sebastian Andrzej Siewior
> wrote:
> > I have to admit, the i915 tries very hard to avoid running on -RT. Could
> > you try the s/local_irq_disable();/local_irq_disable_nort();/ patch
> > mentioned
On Tue, Dec 22, 2015 at 04:37:26PM +0100, Sebastian Andrzej Siewior wrote:
> * Christoph Mathys | 2015-12-21 14:19:10 [+0100]:
>
> >While playing with 4.1.13-rt15 I stumbled across the following thread
> >where Luis reports the same problem with i915 gpu:
> >i915: sleeping function called from inv
On Wed, Dec 23, 2015 at 10:52:36AM +0530, Nabendu Maiti wrote:
> Recalculate watermark when there is a change in pixel format.
>
> Signed-off-by: Nabendu Maiti
This seems like something that's been broken recently in the watermark
shuffling. Please dig out the patch which broke this (using git b
On Mon, Jan 04, 2016 at 07:53:36AM +0100, Daniel Vetter wrote:
> Another pile of vfuncs from the old gpu.tmpl xml documentation that
> I've forgotten to delete. I spotted a few more things to
> clarify/extend in the new kerneldoc while going through this once
> more.
>
> v2: Spelling fixes (Thierr
On Mon, Jan 04, 2016 at 07:06:15PM +0200, Ville Syrjälä wrote:
> On Mon, Jan 04, 2016 at 11:16:39AM +0100, Maarten Lankhorst wrote:
> > Hey,
> >
> > Op 23-12-15 om 12:05 schreef Nabendu Maiti:
> > > This patch is adding pipesource size as property as intel property.User
> > > application is allowe
On Tue, 05 Jan 2016, Daniel Vetter wrote:
> On Mon, Dec 21, 2015 at 03:10:59PM +0200, Jani Nikula wrote:
>> Untie the VBT based generic panel driver from the VBT parsing, so that
>> the two don't have to be updated in lockstep.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/int
On Tue, 05 Jan 2016, Daniel Vetter wrote:
> On Mon, Dec 21, 2015 at 03:11:05PM +0200, Jani Nikula wrote:
>> The sequence block has sizes of elements after the operation byte since
>> sequence block v3. Use it to skip elements we don't support yet.
>>
>> Signed-off-by: Jani Nikula
>> ---
>> driv
On Wed, Dec 23, 2015 at 01:35:54PM +, Chris Wilson wrote:
> If we enable RCU for the requests (providing a grace period where we can
> inspect a "dead" request before it is freed), we can allow callers to
> carefully perform lockless lookup of an active request.
>
> However, by enabling deferr
On Tue, Jan 05, 2016 at 03:59:51PM +0100, Daniel Vetter wrote:
> On Wed, Dec 23, 2015 at 01:35:54PM +, Chris Wilson wrote:
> > If we enable RCU for the requests (providing a grace period where we can
> > inspect a "dead" request before it is freed), we can allow callers to
> > carefully perform
The changes since the sequence block v2 are:
* The whole MIPI bios data block has a separate 32-bit size field since
v3, stored after the version. This facilitates big sequences.
* The size of the panel specific sequence blocks has grown to 32
bits. This facilitates big sequences.
* The elem
The sequence block has sizes of elements after the operation byte since
sequence block v3. Use it to skip elements we don't support yet.
v2: remove redundant exec_elem[operation_byte] check (Daniel)
Reviewed-by: Daniel Vetter
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_
On Tue, Jan 05, 2016 at 04:02:13PM +0100, Peter Zijlstra wrote:
> > Shouldn't the slab subsystem do this for us if we request it delays the
> > actual kfree? Seems like a core bug to me ... Adding more folks.
>
> note that sync_rcu() can take a terribly long time.. but yes, I seem to
> remember Pa
On Wed, Dec 23, 2015 at 03:34:48PM +, Derek Morton wrote:
> line[strlen(line)] will always evaluate to NULL so line_continuation
> was always true. That prevented the program name, pid and log level
> ever being printed.
> Changed to [strlen(line) - 1] so the last character before the null
> te
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 70fc11e0869d..a5817bef2d71 100644
--- a/drivers/gpu/drm/i915/intel_dsi
On Mon, Jan 04, 2016 at 07:49:41AM +0100, Daniel Vetter wrote:
> On Mon, Dec 28, 2015 at 11:22:52AM +0100, Thierry Reding wrote:
> > On Wed, Dec 16, 2015 at 06:18:25PM +0100, Daniel Vetter wrote:
> > > Another pile of vfuncs from the old gpu.tmpl xml documentation that
> > > I've forgotten to delet
On Tue, Jan 05, 2016 at 03:50:38PM +0100, Daniel Vetter wrote:
> On Mon, Jan 04, 2016 at 07:06:15PM +0200, Ville Syrjälä wrote:
> > On Mon, Jan 04, 2016 at 11:16:39AM +0100, Maarten Lankhorst wrote:
> > > Hey,
> > >
> > > Op 23-12-15 om 12:05 schreef Nabendu Maiti:
> > > > This patch is adding pip
Another pile of vfuncs from the old gpu.tmpl xml documentation that
I've forgotten to delete. I spotted a few more things to
clarify/extend in the new kerneldoc while going through this once
more.
v2: Spelling fixes (Thierry).
v3: More spelling fixes and use Thierry's proposal to clarify why
driv
On Tue, Jan 05, 2016 at 04:22:15PM +0100, Daniel Vetter wrote:
> Another pile of vfuncs from the old gpu.tmpl xml documentation that
> I've forgotten to delete. I spotted a few more things to
> clarify/extend in the new kerneldoc while going through this once
> more.
>
> v2: Spelling fixes (Thierr
When debuging an intermittent corrupted screen I suspected on DDI
translation table and checked we are out of date with the spec.
I'm not sure this will fix my bug yet, but it is always good to follow
the spec.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_ddi.c | 20 ++
When reviewing DDI translation table I noticed few changes we
haven't incorporated yet and it is always good to follow latest
spec.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_
== Summary ==
HEAD is now at 865e245 drm-intel-nightly: 2016y-01m-05d-15h-23m-53s UTC
integration manifest
Applying: drm/i915/bios: add proper documentation for the Video BIOS Table (VBT)
Using index info to reconstruct a base tree...
M Documentation/DocBook/gpu.tmpl
M drivers/gpu/drm
Test check GuC debugfs file for successful loading confirmation
Signed-off-by: Lukasz Fiedorowicz
---
tests/Makefile.sources | 1 +
tests/gem_guc_loading.c | 89 +
2 files changed, 90 insertions(+)
create mode 100644 tests/gem_guc_loading.c
dif
On Tue, Dec 22, 2015 at 10:39:38AM +, Chris Wilson wrote:
> On Tue, Dec 22, 2015 at 10:23:11AM +, Tvrtko Ursulin wrote:
> >
> >
> > On 22/12/15 06:20, ankitprasad.r.sha...@intel.com wrote:
> > >From: Ankitprasad Sharma
> > >
> > >i915_gem_object_get_dma_address function is used to retrie
Hello Chris,
Happy New Year!
Thanks for answers so far. I have some additional questions.
You wrote that this change was made to take a defensive position to ensure
minimum power consumption - did we do any power measurements to confirm the
benefit? How does this change affect user experience a
They're causing massive amounts of dmesg noise and hence CI noise all
over the place. Enabling them for a bit was good enough to refresh our
task list of what's still needed to enable rpm by default.
To make sure we're not forgetting to make this noisy again add a FIXME
comment.
Fixes: da5827c366
== Summary ==
Built on bc303261a81a96298b2f9e02734aeaa0a25421a6 drm-intel-nightly:
2016y-01m-05d-16h-47m-54s UTC integration manifest
Test kms_flip:
Subgroup basic-flip-vs-modeset:
dmesg-warn -> PASS (bdw-nuci7) UNSTABLE
Subgroup basic-flip-vs-wf_vblank:
On 01/04/16 19:29, Masanari Iida wrote:
> This patch fix some spelling typos found in Documentation/Docbook
> gpu/ch04s03.html. This file was generated from comments within
> source, so I have to fix typos in i915_gem_fence.c.
>
> Signed-off-by: Masanari Iida
> ---
> drivers/gpu/drm/i915/i915_g
Since we extracted it for use in error state, we may as well use it in debugfs
too.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
There is no point in emitting a WARN since the backtrace will always be the
same. Errors have actually become easier to spot given the large number of WARNs
which exist today in modesetting paths.
Signed-off-by: Ben Widawsky
---
drivers/gpu/drm/i915/intel_lrc.c | 4 +++-
1 file changed, 3 insert
This is a useful thing to have around as a function because the mechanism may
change in the future.
There is a net increase in LOC here, and it will continue to be the case on GEN8
and GEN9 - but future GENs may have an alternate mechanism for doing this.
Signed-off-by: Ben Widawsky
---
drivers
While doing some debug in simulation, I came across a handful of patches which I
think are beneficial today. Mostly this just has some minor cleanups and error
state additions. They're pretty optional, though I have a private branch that
depends on some of this stuff, so it'd be nice to land as muc
Sample output:
...
waiting: yes
ring->head: 0x
ring->tail: 0x0c50
ring->next_context_status_buffer: 0x5
CSB Pointer: 0x0405
Context 0 Status: 0x0001
Context 1 Status: 0x009d0018
Context 2 Status: 0x0001
Context 3 Status: 0x00
I think this patch is a worthwhile cleanup even if it might look only marginally
useful. It gets more useful in upcoming patches and for handling of future GEN
platforms.
The only non-mechanical part of this is the removal of the extra & operation on
the ring->next_context_status_buffer. This is s
-Original Message-
From: Thierry, Michel
Sent: Tuesday, January 5, 2016 10:02 AM
To: Belgaumkar, Vinay
Subject: RE: [Intel-gfx] [PATCH i-g-t] tests/gem_softpin: Use offset addresses
in canonical form
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freed
From: Dave Gordon
The GuC code needs to know the size of a logical context, so we
expose get_lr_context_size(), renaming it intel_lr_context__size()
to fit the naming conventions for nonstatic functions.
Add comments or kerneldoc (Daniel Vetter)
For: VIZ-2021
Signed-off-by: Dave Gordon
Signed-
On Tue, Jan 05, 2016 at 07:32:59AM -0800, Rodrigo Vivi wrote:
> When debuging an intermittent corrupted screen I suspected on DDI
> translation table and checked we are out of date with the spec.
>
> I'm not sure this will fix my bug yet, but it is always good to follow
> the spec.
>
> Signed-off
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