On Tue, 05 Jan 2016, Rodrigo Vivi <rodrigo.v...@intel.com> wrote:
> No functional changes with this patch. The idea is just to organize
> the platform features in a standard place making new platform aditions
> easily and possible to see all the present features of the platform on
> the intel info dumped information at dmesg.
>
> (I just wonder why Ivy Bridge doesn't have runtime pm.
> So, let's use this v1 to start the discussion).
>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 4 ++++
>  drivers/gpu/drm/i915/i915_drv.h | 6 ++----
>  2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 6fea26f..cb8adb5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -217,6 +217,7 @@ static const struct intel_device_info 
> intel_sandybridge_m_info = {
>       .gen = 6, .is_mobile = 1, .num_pipes = 2,
>       .need_gfx_hws = 1, .has_hotplug = 1,
>       .has_fbc = 1,
> +     .has_runtime_pm = 1,

Missing for sandybridge_d?

BR,
Jani.

>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING,
>       .has_llc = 1,
>       GEN_DEFAULT_PIPEOFFSETS,
> @@ -252,6 +253,7 @@ static const struct intel_device_info 
> intel_ivybridge_q_info = {
>  #define VLV_FEATURES  \
>       .gen = 7, .num_pipes = 2, \
>       .has_psr = 1, \
> +     .has_runtime_pm = 1, \
>       .need_gfx_hws = 1, .has_hotplug = 1, \
>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
>       .display_mmio_offset = VLV_DISPLAY_BASE, \
> @@ -274,6 +276,7 @@ static const struct intel_device_info 
> intel_valleyview_d_info = {
>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
>       .has_ddi = 1, \
>       .has_psr = 1, \
> +     .has_runtime_pm = 1,\
>       .has_fpga_dbg = 1
>  
>  static const struct intel_device_info intel_haswell_d_info = {
> @@ -315,6 +318,7 @@ static const struct intel_device_info 
> intel_cherryview_info = {
>       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
>       .is_cherryview = 1,
>       .has_psr = 1,
> +     .has_runtime_pm = 1,
>       .display_mmio_offset = VLV_DISPLAY_BASE,
>       GEN_CHV_PIPEOFFSETS,
>       CURSOR_OFFSETS,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 20840f0..8143a51 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -764,6 +764,7 @@ struct intel_csr {
>       func(is_preliminary) sep \
>       func(has_fbc) sep \
>       func(has_psr) sep \
> +     func(has_runtime_pm) sep \
>       func(has_pipe_cxsr) sep \
>       func(has_hotplug) sep \
>       func(cursor_needs_physical) sep \
> @@ -2606,10 +2607,7 @@ struct drm_i915_cmd_table {
>  #define HAS_DDI(dev)         (INTEL_INFO(dev)->has_ddi)
>  #define HAS_FPGA_DBG_UNCLAIMED(dev)  (INTEL_INFO(dev)->has_fpga_dbg)
>  #define HAS_PSR(dev)         (INTEL_INFO(dev)->has_psr)
> -#define HAS_RUNTIME_PM(dev)  (IS_GEN6(dev) || IS_HASWELL(dev) || \
> -                              IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
> -                              IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
> -                              IS_KABYLAKE(dev))
> +#define HAS_RUNTIME_PM(dev)  (INTEL_INFO(dev)->has_runtime_pm)
>  #define HAS_RC6(dev)         (INTEL_INFO(dev)->gen >= 6)
>  #define HAS_RC6p(dev)                (INTEL_INFO(dev)->gen == 6 || 
> IS_IVYBRIDGE(dev))

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to