On Thu, Jan 30, 2025 at 01:51:53PM +0200, Jani Nikula wrote:
> On Wed, 29 Jan 2025, Imre Deak wrote:
> > From: Imre Deak
> >
> > Fix the port width programming in the DDI_BUF_CTL register on MTLP+,
> > where this had an off-by-one error.
>
> Fixes: b66a8abaa48a ("drm/i915/display/mtl: Fill port
On Wed, 29 Jan 2025, Imre Deak wrote:
> From: Imre Deak
>
> Fix the port width programming in the DDI_BUF_CTL register on MTLP+,
> where this had an off-by-one error.
Fixes: b66a8abaa48a ("drm/i915/display/mtl: Fill port width in
DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL for HDMI")
Cc: # v6.5+
Rev
From: Imre Deak
Fix the port width programming in the DDI_BUF_CTL register on MTLP+,
where this had an off-by-one error.
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(
