[PATCH 02/17] drm/i915/ddi: Fix HDMI port width programming in DDI_BUF_CTL

[Imre Deak]

From: Imre Deak <imre.d...@gmail.com>

Fix the port width programming in the DDI_BUF_CTL register on MTLP+,
where this had an off-by-one error.

Signed-off-by: Imre Deak <imre.d...@gmail.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
 drivers/gpu/drm/i915/i915_reg.h          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index dc319f37b1be9..36e7dde422d37 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3501,7 +3501,7 @@ static void intel_ddi_enable_hdmi(struct 
intel_atomic_state *state,
                intel_de_rmw(dev_priv, XELPDP_PORT_BUF_CTL1(dev_priv, port),
                             XELPDP_PORT_WIDTH_MASK | XELPDP_PORT_REVERSAL, 
port_buf);
 
-               buf_ctl |= DDI_PORT_WIDTH(lane_count);
+               buf_ctl |= DDI_PORT_WIDTH(crtc_state->lane_count);
 
                if (DISPLAY_VER(dev_priv) >= 20)
                        buf_ctl |= XE2LPD_DDI_BUF_D2D_LINK_ENABLE;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 03da51b03fb90..04e47d0a8ab92 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3635,7 +3635,7 @@ enum skl_power_gate {
 #define  DDI_BUF_IS_IDLE                       (1 << 7)
 #define  DDI_BUF_CTL_TC_PHY_OWNERSHIP          REG_BIT(6)
 #define  DDI_A_4_LANES                         (1 << 4)
-#define  DDI_PORT_WIDTH(width)                 (((width) - 1) << 1)
+#define  DDI_PORT_WIDTH(width)                 (((width) == 3 ? 4 : ((width) - 
1)) << 1)
 #define  DDI_PORT_WIDTH_MASK                   (7 << 1)
 #define  DDI_PORT_WIDTH_SHIFT                  1
 #define  DDI_INIT_DISPLAY_DETECTED             (1 << 0)
-- 
2.44.2