On Tue, May 28, 2013 at 02:30:56PM +0100, Damien Lespiau wrote:
> On Sat, Apr 27, 2013 at 05:59:20PM -0700, Ben Widawsky wrote:
> > @@ -2720,12 +2720,12 @@ static void gen6_enable_rps(struct drm_device *dev)
> > gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
> >
> > /* requi
On Sat, Apr 27, 2013 at 05:59:20PM -0700, Ben Widawsky wrote:
> @@ -2720,12 +2720,12 @@ static void gen6_enable_rps(struct drm_device *dev)
> gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
>
> /* requires MSI enabled */
> - I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVE
PM interrupts have an expanded role on HSW. It helps route the EBOX
interrupts. This patch is necessary to make the existing code which
touches the mask, and enable registers more friendly to other code paths
that also will need these registers.
To be more explicit:
At preinstall all interrupts ar
On Wed, 07 Nov 2012 10:17:09 +
Chris Wilson wrote:
> On Tue, 6 Nov 2012 16:25:33 +, Ben Widawsky wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 8f15616..5477454 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/g
On Tue, 6 Nov 2012 16:25:33 +, Ben Widawsky wrote:
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8f15616..5477454 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2354,7 +2354,7 @@ static void gen6_disable_
PM interrupts have an expanded role on HSW. It helps route the EBOX
interrupts. This patch is necessary to make the existing code which
touches the mask, and enable registers more friendly to other code paths
that also will need these registers.
v2: Shouldn't destroy PMIIR or PMIMR VEBOX interrupt
