Currently all page directories are bound at creation using an
unevictable node in the GGTT. This severely limits us as we cannot
remove any inactive ppgtt for new contexts, or under aperture pressure.
To fix this we need to make the page directory into a first class and
unbindable vma. Hence, the c
== Series Details ==
Series: series starting with [01/17] drm/i915/gtt: Invalidate GGTT caches after
writing the gen6 page directories
URL : https://patchwork.freedesktop.org/series/44328/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Invalidate GGTT caches a
Currently all page directories are bound at creation using an
unevictable node in the GGTT. This severely limits us as we cannot
remove any inactive ppgtt for new contexts, or under aperture pressure.
To fix this we need to make the page directory into a first class and
unbindable vma. Hence, the c
== Series Details ==
Series: series starting with [01/17] drm/i915/gtt: Invalidate GGTT caches after
writing the gen6 page directories
URL : https://patchwork.freedesktop.org/series/44328/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a380c2fdd48d drm/i915/gtt: Invalidate GGTT
As the most frequent PTE encoding is for the scratch page, cache it upon
creation.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ++-
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +
2 files changed, 7 insert
As we cannot reliably change used page tables while the context is
active, the earliest opportunity we have to recover excess pages is when
the context becomes idle. So whenever we unbind the context (it must be
idle, and indeed being evicted) free the unused ptes.
Signed-off-by: Chris Wilson
Cc:
In order to be able to evict the gen6 ppgtt, we have to unpin it at some
point. We can simply use our context activity tracking to know when the
ppgtt is no longer in use by hardware, and so only keep it pinned while
being used a request.
For the kernel_context (and thus aliasing_ppgtt), it remain
Let's see if we have all the kinks worked out and full-ppgtt now works
reliably on gen7 (Ivybridge, Valleyview/Baytrail and Haswell). If we can
let userspace have full control over their own ppgtt, it makes softpinning
far more effective, in turn making GPU dispatch far more efficient and
more secu
In order to allow ourselves to use VMA to wrap other entities other than
GEM objects, we need to allow for the vma->obj backpointer to be NULL.
In most cases, we know we are operating on a GEM object and its vma, but
we need the core code (such as i915_vma_pin/insert/bind/unbind) to work
regardless
If we interrupt the context switch and unwind, we leave the to_mm
believing that we have cleared the dirty bit for this engine (but the
LRI will never take place). Just in case we immediately reload the same
context, mark this engine as dirty so that we force the LRI to reload
the PD.
Signed-off-b
We can stop asserting using WARN_ON as given sufficient CI coverage, we
can rely on using GEM_BUG_ON() to catch problems before merging.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/i915
Pull the empty stubs together into the top level gen6_ppgtt_create, and
tear each one down on error in proper onion order (rather than use
Joonas' pet hate of calling the cleanup function in indeterminable
state).
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Aul
The legacy gen6 ppgtt needs a little more hand holding than gen8+, and
so requires a larger structure. As I intend to make this slightly more
complicated in the future, separate the gen6 from the core gen8 hw
struct by subclassing. This patch moves the gen6 only features out to
gen6_hw_ppgtt and pi
When we update the gen6 ppgtt page directories, we do so by writing the
new address into a reserved slot in the GGTT. It appears that when the
GPU reads that entry from the gsm, it uses its small cache and that we
need to invalidate that cache after writing. We don't see an issue
currently as we pr
Currently all page directories are bound at creation using an
unevictable node in the GGTT. This severely limits us as we cannot
remove any inactive ppgtt for new contexts, or under aperture pressure.
To fix this we need to make the page directory into a first class and
unbindable vma. Hence, the c
If we will completely overwrite the PT with PTEs for the object, we can
forgo filling it with scratch entries.
References: 14826673247e ("drm/i915: Only initialize partially filled
pagetables")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
---
drivers/gpu
To allow ourselves to use a first class vma for the aliasing_ppgtt page
directory, we have to reorder the shutdown on module unload to remove
and unpin the aliasing_ppgtt before complaining about any objects left
in the GGTT.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc:
As we were only supporting aliasing_ppgtt on gen7 for some time, we
saved a few checks by preallocating the page directories on creation.
However, since we need 2MiB of page directories for each ppgtt, to
support arbitrary numbers of user contexts, we need to be more prudent
in our allocations, and
If we know that the user cannot access the GGTT, by virtue of having a
segregated memory area, we can skip clearing the unused entries as they
cannot be accessed.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +++
To allow for future non-object backed vma, we need to be able to
specialise the callbacks for binding, et al, the vma. For example,
instead of calling vma->vm->bind_vma(), we now call
vma->ops->bind_vma(). This gives us the opportunity to later override the
operation for a custom vma.
v2: flip ord
In today's edition, IGT should be happy; meaning we should have most of
the resource allocation issues licked, and that the gpu is indeed
switching mm between each context. Running piglit through it though, the
picture is a little more murky, as there are a few GPU hangs...
-Chris
___
In the next patch, we will subclass the gen6 hw_ppgtt. In order, for the
two different generations of hw ppgtt stucts to be of different size,
push the allocation down to the constructor.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
Reviewed-by: Joonas Lah
On 26 April 2018 at 20:53, Maarten Lankhorst wrote:
> Hi Dave,
>
> This is my first pull request for v4.18. Only UAPI change is adding a generic
> plane
> alpha property, which replaces the driver specific ones in sun4i, rcar-du and
> atmel-hclcdc.
>
> drm-misc-next-2018-04-26:
> drm-misc-next f
== Series Details ==
Series: drm/i915/perf: allow holding preemption on filtered ctx
URL : https://patchwork.freedesktop.org/series/44291/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281_full -> Patchwork_9210_full =
== Summary - WARNING ==
Minor unknown changes comin
== Series Details ==
Series: drm/i915: add support for perf configuration queries
URL : https://patchwork.freedesktop.org/series/44290/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281_full -> Patchwork_9209_full =
== Summary - WARNING ==
Minor unknown changes coming w
== Series Details ==
Series: drm/915/error: Fixup inactive/active counting
URL : https://patchwork.freedesktop.org/series/44289/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281_full -> Patchwork_9208_full =
== Summary - WARNING ==
Minor unknown changes coming with Pat
== Series Details ==
Series: series starting with [1/2] drm/i915: Cancel reset preparations on
failed resets
URL : https://patchwork.freedesktop.org/series/44288/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281_full -> Patchwork_9207_full =
== Summary - WARNING ==
Mi
== Series Details ==
Series: drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44285/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281_full -> Patchwork_9206_full =
== Summary - SUCCESS ==
No regressions found.
External UR
On Tue, 2018-05-22 at 16:58 -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-05-17 at 15:21 -0700, José Roberto de Souza wrote:
> > eDP spec states that sink device will do a short pulse in HPD
> > line when there is a PSR/PSR2 error that needs to be handled by
> > source, this is handling the firs
== Series Details ==
Series: series starting with [v2,1/7] drm/i915/guc: Don't store runtime GuC log
level in modparam (rev3)
URL : https://patchwork.freedesktop.org/series/44201/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4280_full -> Patchwork_9205_full =
== Summary -
== Series Details ==
Series: drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page
directories
URL : https://patchwork.freedesktop.org/series/44312/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK includ
== Series Details ==
Series: drm/i915/pmu: Do not assume fixed hrtimer period (rev3)
URL : https://patchwork.freedesktop.org/series/44191/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279_full -> Patchwork_9204_full =
== Summary - WARNING ==
Minor unknown changes comin
When we update the gen6 ppgtt page directories, we do so by writing the
new address into a reserved slot in the GGTT. It appears that when the
GPU reads that entry from the gsm, it uses its small cache and that we
need to invalidate that cache after writing. We don't see an issue
currently as we pr
== Series Details ==
Series: drm/i915: Swap magics and use SZ_1M
URL : https://patchwork.freedesktop.org/series/44278/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4279_full -> Patchwork_9203_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9
Quoting Lionel Landwerlin (2018-06-05 18:14:58)
> On 05/06/18 17:50, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > A miminal hack to parse the new tracepoint format and invent new "ring
> > id's" based on engine class and instance.
> >
> > Signed-off-by: Tvrtko Ursulin
> > Cc: Lionel Lan
== Series Details ==
Series: series starting with [1/3] drm/i915/trace: Describe engines as
class:instance pairs (rev2)
URL : https://patchwork.freedesktop.org/series/43763/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279_full -> Patchwork_9202_full =
== Summary - WARNI
Quoting Matthew Auld (2018-06-05 19:10:34)
> On 5 June 2018 at 17:06, Chris Wilson wrote:
> > The inactive counter was over the active list, and vice versa.
> > Fortuitously this should not cause a problem in practice as they shared
> > the same array and clamped the number of entries they would w
== Series Details ==
Series: drm/i915/perf: allow holding preemption on filtered ctx
URL : https://patchwork.freedesktop.org/series/44291/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281 -> Patchwork_9210 =
== Summary - SUCCESS ==
No regressions found.
External URL
Quoting Daniele Ceraolo Spurio (2018-06-05 18:38:38)
>
>
> On 05/06/18 05:05, Michal Wajdeczko wrote:
> > In case of failure during GuC clients creation, we forget to
> > cleanup earlier pool allocation. Use proper teardown to fix that.
> >
> > Signed-off-by: Michal Wajdeczko
> > Cc: Daniele Ce
On 5 June 2018 at 17:06, Chris Wilson wrote:
> The inactive counter was over the active list, and vice versa.
> Fortuitously this should not cause a problem in practice as they shared
> the same array and clamped the number of entries they would write.
>
> Signed-off-by: Chris Wilson
> Cc: Joonas
== Series Details ==
Series: drm/i915: add support for perf configuration queries
URL : https://patchwork.freedesktop.org/series/44290/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281 -> Patchwork_9209 =
== Summary - SUCCESS ==
No regressions found.
External URL:
From: Tvrtko Ursulin
Just forget about earlier request_in events.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/scripts/trace.pl b/scripts/trace.pl
index 1d42f2749710..9bc0b5b291d4 100755
--- a/scripts/trace.pl
+++ b/s
From: Tvrtko Ursulin
Skip accounting the context save time for anything but the last request of
the coalesced bunch, and also skip drawing those boxes on the timeline.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --g
From: Tvrtko Ursulin
Incomplete requests (no notify, no context complete) have to be corrected
by looking at the engine timeline, and not the sorted-by-start-time view
as was previously used.
Per-engine timelines are generated on demand and cached for later use.
v2: Find end of current context
From: Tvrtko Ursulin
Few micro-second long boxes cannot be displayed by the visualizer in a
meaningful way so just burden the browser and the human looking at the
noise. Sp skip drawing anything shorter and 10us.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 15 ++-
1 file c
From: Tvrtko Ursulin
In split mode all requests have to be added up since they were previously
re-arranged so there is no overlap.
Signed-off-by: Tvrtko Ursulin
Cc: John Harrison
---
scripts/trace.pl | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/scripts/trace.pl b/scri
From: Tvrtko Ursulin
Commit 87d2affc380da96ba66c258c5337c363fe8651ef ("trace.pl: Add support
for colouring context execution"), due some dodgy attempts at patch
splitting broke the legacy colouring mode.
Fix it by passing in the request stage into the helper so all stages can
be correctly colour
From: Tvrtko Ursulin
We add stripes for different stages of request execution so it is easier
to follow one context in the multi-colour mode.
Vertical stripe pattern indicates pipeline "blockages" - requests waiting
for dependencies before they are runnable.
Diagonal stripes indicate runnable r
From: Tvrtko Ursulin
Request split mode had several bugs, both in the original version and also
after the recent refactorings.
One big one was that it wasn't considering different submit ports as a
reason to split execution, and also that it was too time based instead of
looking at relevant time
== Series Details ==
Series: drm/i915: add support for perf configuration queries
URL : https://patchwork.freedesktop.org/series/44290/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: add support for perf configuration queries
+drivers/gpu/drm/i915/i915_query.c:101:
== Series Details ==
Series: drm/i915: add support for perf configuration queries
URL : https://patchwork.freedesktop.org/series/44290/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
37762d5da514 drm/i915: add support for perf configuration queries
-:278: CHECK:SPACING: No space
== Series Details ==
Series: drm/915/error: Fixup inactive/active counting
URL : https://patchwork.freedesktop.org/series/44289/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281 -> Patchwork_9208 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_920
On 05/06/18 05:05, Michal Wajdeczko wrote:
In case of failure during GuC clients creation, we forget to
cleanup earlier pool allocation. Use proper teardown to fix that.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: Michal Winiarski
Reviewed-by: Daniele
== Series Details ==
Series: series starting with [1/2] drm/i915: Cancel reset preparations on
failed resets
URL : https://patchwork.freedesktop.org/series/44288/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281 -> Patchwork_9207 =
== Summary - WARNING ==
Minor unknow
Reviewed-by: Lionel Landwerlin
On 05/06/18 17:50, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
New way of describing engines needs the tool to be adapted to understand it.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --gi
On 05/06/18 17:50, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
A miminal hack to parse the new tracepoint format and invent new "ring
id's" based on engine class and instance.
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
---
overlay/gpu-perf.c | 36 ---
On 05/06/18 17:28, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-06-05 17:19:11)
We would like to make use of perf in Vulkan. The Vulkan API is much
lower level than OpenGL, with applications directly exposed to the
concept of command buffers (pretty much equivalent to our batch
buffers).
== Series Details ==
Series: series starting with [1/2] drm/i915: Cancel reset preparations on
failed resets
URL : https://patchwork.freedesktop.org/series/44288/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5ca5cfc067d0 drm/i915: Cancel reset preparations on failed resets
e8
== Series Details ==
Series: drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44285/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4281 -> Patchwork_9206 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https:
From: Tvrtko Ursulin
New way of describing engines needs the tool to be adapted to understand it.
Signed-off-by: Tvrtko Ursulin
---
scripts/trace.pl | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/scripts/trace.pl b/scripts/trace.pl
index 068eee68b30c..ea6c667696f4 10075
From: Tvrtko Ursulin
A miminal hack to parse the new tracepoint format and invent new "ring
id's" based on engine class and instance.
Signed-off-by: Tvrtko Ursulin
Cc: Lionel Landwerlin
---
overlay/gpu-perf.c | 36
1 file changed, 28 insertions(+), 8 delet
== Series Details ==
Series: drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44285/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Rename i915_hw_ppgtt base member
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1514:17: war
== Series Details ==
Series: drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44285/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a6b1f5bb4b67 drm/i915/gtt: Rename i915_hw_ppgtt base member
-:40: CHECK:MACRO_ARG_PRECEDENCE: Macro ar
== Series Details ==
Series: drm/i915: Correctly handle error path in i915_gem_init_hw
URL : https://patchwork.freedesktop.org/series/44271/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4278_full -> Patchwork_9201_full =
== Summary - WARNING ==
Minor unknown changes com
Quoting Lionel Landwerlin (2018-06-05 17:19:11)
> We would like to make use of perf in Vulkan. The Vulkan API is much
> lower level than OpenGL, with applications directly exposed to the
> concept of command buffers (pretty much equivalent to our batch
> buffers). In Vulkan, queries are always limi
We would like to make use of perf in Vulkan. The Vulkan API is much
lower level than OpenGL, with applications directly exposed to the
concept of command buffers (pretty much equivalent to our batch
buffers). In Vulkan, queries are always limited in scope to a command
buffer. In OpenGL, the lack of
Listing configurations at the moment is supported only through sysfs.
This might cause issues for applications wanting to list
configurations from a container where sysfs isn't available.
This change adds a way to query the number of configurations and their
content through the i915 query uAPI.
S
Quoting Mika Kuoppala (2018-06-05 17:03:56)
> Our reset handling has a retry layer further up in the
> chain. As we have told the engine to prepare for reset,
> and failed it, make sure to remove that preparation so
> that the next attempted reset has a clean slate by triggering
> another full prep
Quoting Mika Kuoppala (2018-06-05 17:03:57)
> There is a problem with kbl up to rev E0 where a heavy
> memory/fabric traffic from adjacent engine(s) can cause an engine
> reset to fail. This traffic can be from normal memory accesses
> or it can be from heavy polling on a semaphore wait.
>
> For e
The inactive counter was over the active list, and vice versa.
Fortuitously this should not cause a problem in practice as they shared
the same array and clamped the number of entries they would write.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
---
driv
There is a problem with kbl up to rev E0 where a heavy
memory/fabric traffic from adjacent engine(s) can cause an engine
reset to fail. This traffic can be from normal memory accesses
or it can be from heavy polling on a semaphore wait.
For engine hogging causing a fail, we already fallback to
ful
Our reset handling has a retry layer further up in the
chain. As we have told the engine to prepare for reset,
and failed it, make sure to remove that preparation so
that the next attempted reset has a clean slate by triggering
another full prepare cycle for the engines.
v2: ret as int, simplified
Chris Wilson writes:
> Quoting Mika Kuoppala (2018-05-30 16:02:06)
>>
>> For the second issue where unlimited semaphore wait poll loop
>> is generating the heavy memory traffic and preventing a reset,
>> we add one microsecond poll interval to semaphore wait to
>> guarantee bandwidth for the res
== Series Details ==
Series: series starting with [v2,1/7] drm/i915/guc: Don't store runtime GuC log
level in modparam (rev3)
URL : https://patchwork.freedesktop.org/series/44201/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4280 -> Patchwork_9205 =
== Summary - SUCCESS =
Quoting Michal Wajdeczko (2018-06-05 15:13:59)
> On Tue, 05 Jun 2018 15:57:46 +0200, Chris Wilson
> wrote:
>
> > Since the kernel provides SZ_1M, use it in preference of 1 << 20.
> >
> > Signed-off-by: Chris Wilson
> > ---
>
> Reviewed-by: Michal Wajdeczko
Thanks for pointing out the existe
On 05/06/2018 15:43, Patchwork wrote:
== Series Details ==
Series: series starting with [1/3] drm/i915/trace: Describe engines as
class:instance pairs (rev2)
URL : https://patchwork.freedesktop.org/series/43763/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279 -> Patch
== Series Details ==
Series: drm/i915/guc: Don't leak stage descriptor pool on init failure
URL : https://patchwork.freedesktop.org/series/44270/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4278_full -> Patchwork_9200_full =
== Summary - WARNING ==
Minor unknown change
On 05/06/2018 16:23, Patchwork wrote:
== Series Details ==
Series: drm/i915/pmu: Do not assume fixed hrtimer period (rev3)
URL : https://patchwork.freedesktop.org/series/44191/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279 -> Patchwork_9204 =
== Summary - WARNING ==
In the near future, I want to subclass gen6_hw_ppgtt as it contains a
few specialised members and I wish to add more. To avoid the ugliness of
using ppgtt->base.base, rename the i915_hw_ppgtt base member
(i915_address_space) as vm, which is our common shorthand for an
i915_address_space local.
Sig
Quoting Michal Wajdeczko (2018-06-05 13:24:43)
> In function gem_init_hw() we are calling uc_init_hw() but in case
> of error later in function, we missed to call matching uc_fini_hw()
>
> v2: pulled out from the series
>
> Signed-off-by: Michal Wajdeczko
> Cc: Sagar Arun Kamble
> Cc: Chris Wil
== Series Details ==
Series: drm/i915/pmu: Do not assume fixed hrtimer period (rev3)
URL : https://patchwork.freedesktop.org/series/44191/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279 -> Patchwork_9204 =
== Summary - WARNING ==
Minor unknown changes coming with Pat
Quoting Tvrtko Ursulin (2018-06-05 16:06:57)
>
> On 05/06/2018 15:20, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2018-06-05 15:02:53)
> >> From: Tvrtko Ursulin
> >>
> >> As Chris has discovered on his Ivybridge, and later automated test runs
> >> have confirmed, on most of our platforms hrti
At this moment, we have defined GuC logs sizes in intel_guc_fwif.h, but
as these values are related directly to the GuC logs, and not to API of
GuC parameters, we should move these defines to intel_guc_log.h.
v2:
- change buffers size to more friendly (Michał Wajdeczko)
- remove GUC_LOG_SIZE defin
At this moment we can define GuC logs sizes only using pages.
But GuC also allows use for this values expressed in megabytes.
Lets add support for define guc_log_size in megabytes when we
debug of GuC.
v2:
- change buffers size to more friendly (Michał Wajdeczko)
- merge statements in guc_ctl_log_
== Series Details ==
Series: drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the
object list
URL : https://patchwork.freedesktop.org/series/44253/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4278_full -> Patchwork_9199_full =
== Summary - WARNING ==
Mino
On 05/06/2018 15:20, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-06-05 15:02:53)
From: Tvrtko Ursulin
As Chris has discovered on his Ivybridge, and later automated test runs
have confirmed, on most of our platforms hrtimer faced with heavy GPU load
can occasionally become sufficiently im
== Series Details ==
Series: drm/i915: Swap magics and use SZ_1M
URL : https://patchwork.freedesktop.org/series/44278/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279 -> Patchwork_9203 =
== Summary - SUCCESS ==
No regressions found.
External URL:
https://patchwork
Chris Wilson writes:
> Quoting Mika Kuoppala (2018-05-30 16:02:06)
>> There is a problem with kbl up to rev E0 where a heavy
>> memory traffic from adjacent engine(s) can cause an engine
>> reset to fail. This traffic can be from normal memory accesses
>> or it can be from heavy polling on a sema
== Series Details ==
Series: series starting with [1/3] drm/i915/trace: Describe engines as
class:instance pairs (rev2)
URL : https://patchwork.freedesktop.org/series/43763/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4279 -> Patchwork_9202 =
== Summary - SUCCESS ==
N
Quoting Mika Kuoppala (2018-06-05 15:38:09)
> Chris Wilson writes:
>
> > In the near future, I want to subclass gen6_hw_ppgtt as it contains a
> > few specialised members and I wish to add more. To avoid the ugliness of
> > using ppgtt->base.base, rename the i915_hw_ppgtt base member
> > (i915_ad
Chris Wilson writes:
> In the near future, I want to subclass gen6_hw_ppgtt as it contains a
> few specialised members and I wish to add more. To avoid the ugliness of
> using ppgtt->base.base, rename the i915_hw_ppgtt base member
> (i915_address_space) as vm, which is our common shorthand for an
Quoting Tvrtko Ursulin (2018-06-05 15:02:53)
> From: Tvrtko Ursulin
>
> As Chris has discovered on his Ivybridge, and later automated test runs
> have confirmed, on most of our platforms hrtimer faced with heavy GPU load
> can occasionally become sufficiently imprecise to affect PMU sampling
> ca
On Tue, 05 Jun 2018 15:57:46 +0200, Chris Wilson
wrote:
Since the kernel provides SZ_1M, use it in preference of 1 << 20.
Signed-off-by: Chris Wilson
---
Reviewed-by: Michal Wajdeczko
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h
From: Tvrtko Ursulin
As Chris has discovered on his Ivybridge, and later automated test runs
have confirmed, on most of our platforms hrtimer faced with heavy GPU load
can occasionally become sufficiently imprecise to affect PMU sampling
calculations.
This means we cannot assume sampling frequen
Since the kernel provides SZ_1M, use it in preference of 1 << 20.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index cb680ddafa0c..68fd54a38b87
== Series Details ==
Series: drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the
object list
URL : https://patchwork.freedesktop.org/series/44253/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4278_full -> Patchwork_9198_full =
== Summary - WARNING ==
Mino
Quoting Tvrtko Ursulin (2018-06-05 14:41:24)
> From: Tvrtko Ursulin
>
> Underlaying field is u64 so the tracepoint needs to be as well.
>
> v2:
> * Re-order binary packet for 64-bit alignment. (Chris Wilson)
>
> Signed-off-by: Tvrtko Ursulin
> Suggested-by: Chris Wilson
Couldn't see any hol
On 05/06/18 14:43, Tvrtko Ursulin wrote:
On 05/06/2018 10:41, Lionel Landwerlin wrote:
Any update on this series?
(my comments were a bit fuzzy, but I gave Rb on patch 1 & 2).
Forgot about it for a bit. Just sent updated 3/3.
Was you r-b for 2/3 for v1 or v2 at the end?
It was for v2.
Th
On 05/06/2018 10:41, Lionel Landwerlin wrote:
Any update on this series?
(my comments were a bit fuzzy, but I gave Rb on patch 1 & 2).
Forgot about it for a bit. Just sent updated 3/3.
Was you r-b for 2/3 for v1 or v2 at the end?
Regards,
Tvrtko
Cheers,
-
Lionel
On 25/05/18 09:26, Tvr
From: Tvrtko Ursulin
Underlaying field is u64 so the tracepoint needs to be as well.
v2:
* Re-order binary packet for 64-bit alignment. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_trace.h | 20 ++--
1 file changed, 10
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