[Intel-gfx] [PATCH 13/17] drm/i915/gtt: Cache the PTE encoding of the scratch page

[Chris Wilson]

As the most frequent PTE encoding is for the scratch page, cache it upon
creation.

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Cc: Matthew Auld <matthew.william.a...@gmail.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ++++++-----
 drivers/gpu/drm/i915/i915_gem_gtt.h |  1 +
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index fd2e3974e688..35fe2d1a55a2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1631,9 +1631,7 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct 
drm_i915_private *i915)
 static void gen6_dump_ppgtt(struct i915_hw_ppgtt *base, struct seq_file *m)
 {
        struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
-       struct i915_address_space *vm = &base->vm;
-       const gen6_pte_t scratch_pte =
-               vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
+       const gen6_pte_t scratch_pte = ppgtt->scratch_pte;
        struct i915_page_table *pt;
        u32 pte, pde;
 
@@ -1809,8 +1807,7 @@ static void gen6_ppgtt_clear_range(struct 
i915_address_space *vm,
        unsigned int pde = first_entry / GEN6_PTES;
        unsigned int pte = first_entry % GEN6_PTES;
        unsigned int num_entries = length >> PAGE_SHIFT;
-       const gen6_pte_t scratch_pte =
-               vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
+       const gen6_pte_t scratch_pte = ppgtt->scratch_pte;
 
        while (num_entries) {
                struct i915_page_table *pt = ppgtt->base.pd.page_table[pde++];
@@ -1943,6 +1940,10 @@ static int gen6_ppgtt_init_scratch(struct gen6_hw_ppgtt 
*ppgtt)
        if (ret)
                return ret;
 
+       ppgtt->scratch_pte =
+               vm->pte_encode(vm->scratch_page.daddr,
+                              I915_CACHE_NONE, PTE_READ_ONLY);
+
        vm->scratch_pt = alloc_pt(vm);
        if (IS_ERR(vm->scratch_pt)) {
                cleanup_scratch_page(vm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h 
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index dc98830fae69..c50bbde007f8 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -412,6 +412,7 @@ struct gen6_hw_ppgtt {
 
        struct i915_vma *vma;
        gen6_pte_t __iomem *pd_addr;
+       gen6_pte_t scratch_pte;
 
        unsigned int pin_count;
        bool scan_for_unused_pt;
-- 
2.17.1

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