>
> On Thu, 26 Nov 2015 16:58:09 +0100,
> Ville Syrjälä wrote:
> >
> > On Thu, Nov 26, 2015 at 04:51:04PM +0100, Takashi Iwai wrote:
> > > On Thu, 26 Nov 2015 16:43:23 +0100,
> > > Ville Syrjälä wrote:
> > > >
> > > > On Thu, Nov 26, 2015 at 04:29:12PM +0100, David Henningsson wrote:
> > > > >
> >
On 11/27/2015 01:10 AM, Oleksii Kurochko wrote:
Hello all,
Do you have any ideas about previously mentioned question?
With best regards,
Oleksii
On Tue, Nov 24, 2015 at 6:48 PM, Oleksii Kurochko mailto:oleksii.kuroc...@globallogic.com>> wrote:
Hi all,
I am trying to enable XenGT fo
On Thu, Nov 26, 2015 at 04:51:13PM +0100, Daniel Vetter wrote:
> On Thu, Nov 26, 2015 at 03:34:05PM +, Chris Wilson wrote:
> > On Thu, Nov 26, 2015 at 03:46:06PM +0100, Daniel Vetter wrote:
> > > On Thu, Nov 26, 2015 at 12:59:37PM +, Chris Wilson wrote:
> > > > On Thu, Nov 26, 2015 at 12:34
Hi Sagar,
sorry for the delay, see below for my comments.
On Wed, 2015-11-04 at 15:34 +0530, Sagar Arun Kamble wrote:
> RC6 setup is shared between BIOS and Driver. BIOS sets up subset of RC6
> setup registers. If those are not setup Driver should not enable RC6.
> For implementing this, driver c
From: Ville Syrjälä
LPT/WPT only have transcoder A, so we shouldn't look at FIFO underruns
for transocoder B/C. And more importnatnly we should not consider
the state of underrun reporting for transcoders B/C when checking
whether we can enable the south error interrupt.
The whole thing is a bit
From: Ville Syrjälä
We have HAS_PCH_LPT_LP() already, so add HAS_PCH_LPT_H() and use it
where appropriate.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h| 1 +
drivers/gpu/drm/i915/intel_dp.c| 2 +-
drivers/gpu/drm/i915/intel_panel.c | 2 +-
3 files changed, 3 inserti
On Thu, Nov 26, 2015 at 08:33:42PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 26, 2015 at 11:49:43PM +0530, Nabendu Maiti wrote:
> >
> >
> > On 11/18/2015 06:49 PM, Ville Syrjälä wrote:
> > > On Wed, Nov 18, 2015 at 06:37:17PM +0530, Maiti, Nabendu Bikash wrote:
> > >>
> > >> On 11/18/2015 5:41 PM
On Thu, Nov 26, 2015 at 11:49:43PM +0530, Nabendu Maiti wrote:
>
>
> On 11/18/2015 06:49 PM, Ville Syrjälä wrote:
> > On Wed, Nov 18, 2015 at 06:37:17PM +0530, Maiti, Nabendu Bikash wrote:
> >>
> >> On 11/18/2015 5:41 PM, Ville Syrjälä wrote:
> >>> On Wed, Nov 18, 2015 at 05:13:01PM +0530, Nabend
On 11/18/2015 05:44 PM, Ville Syrjälä wrote:
On Wed, Nov 18, 2015 at 05:19:26PM +0530, Nabendu Maiti wrote:
On 90/270 rotation case source width and height was not compared
properly with destination height and width check plane.Which added
erroneous check while doing scaling or normal 90/270 r
s/prempt/preempt
Cc: Alex Dai
Signed-off-by: Arun Siluvery
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 40b2ea5..11298af 100644
--- a/drivers/gpu
On Thu, Nov 26, 2015 at 05:55:39PM +, Chris Wilson wrote:
> On Thu, Nov 26, 2015 at 05:15:46PM +, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > Looks like the sleeping loop in __i915_wait_request can be
> > simplified by using io_schedule_timeout instead of setting
> > up and des
On to, 2015-11-26 at 18:32 +0200, Marius Vlad wrote:
> Signed-off-by: Marius Vlad
> ---
> tests/pm_rpm.c | 120
> +
> 1 file changed, 120 insertions(+)
>
> diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
> index c4fb19c..d34b2b2 100644
> ---
On 11/18/2015 06:49 PM, Ville Syrjälä wrote:
On Wed, Nov 18, 2015 at 06:37:17PM +0530, Maiti, Nabendu Bikash wrote:
On 11/18/2015 5:41 PM, Ville Syrjälä wrote:
On Wed, Nov 18, 2015 at 05:13:01PM +0530, Nabendu Maiti wrote:
On older platforms scalers/cliping used to provide destination size
On Thu, Nov 26, 2015 at 05:15:46PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Looks like the sleeping loop in __i915_wait_request can be
> simplified by using io_schedule_timeout instead of setting
> up and destroying a timer.
Simplified by duplicating code? I liked the explicit han
On 11/18/2015 10:56 PM, Ville Syrjälä wrote:
On Wed, Nov 18, 2015 at 10:33:55PM +0530, Maiti, Nabendu Bikash wrote:
On 11/18/2015 7:00 PM, Ville Syrjälä wrote:
On Wed, Nov 18, 2015 at 06:48:37PM +0530, Maiti, Nabendu Bikash wrote:
On 11/18/2015 6:22 PM, Ville Syrjälä wrote:
On Wed, Nov 18
From: Tvrtko Ursulin
Looks like the sleeping loop in __i915_wait_request can be
simplified by using io_schedule_timeout instead of setting
up and destroying a timer.
Signed-off-by: Tvrtko Ursulin
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 28
1 file ch
Hello all,
Do you have any ideas about previously mentioned question?
With best regards,
Oleksii
On Tue, Nov 24, 2015 at 6:48 PM, Oleksii Kurochko <
oleksii.kuroc...@globallogic.com> wrote:
> Hi all,
>
> I am trying to enable XenGT for Android on board vtc1010 in PV mode.
> Used:
> - Intel® At
On Mon, Nov 23, 2015 at 06:06:14PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> I spotted that we're duplicating the BDW+ pipe IMR frobbing a few
> places, so I figured I'd consolidate that. And while doing that I
> also cleaned up the ibx/ilk stuff a bit as well.
>
> Vi
On Thu, Nov 26, 2015 at 11:09:44AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 04:21:30PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Signed-off-by: Ville Syrjälä
>
> Reviewed-by: Daniel Vetter
Pushed to dinq. Thanks for the review.
>
> Aside: Build
On 25/11/15 13:17, Wang, Zhi A wrote:
OK. I see. Thanks Michel! :) Have a nice day. :)
Thanks,
Zhi.
-Original Message-
From: Thierry, Michel
Sent: Wednesday, November 25, 2015 9:15 PM
To: Wang, Zhi A; intel-gfx@lists.freedesktop.org
Cc: Han, Xu; Li, Weinan Z; He, Min; Lv, Zhiyuan; Tian
On 25 November 2015 at 12:12, Gabriel Feceoru wrote:
> This is a placeholder for the feature list file. Its content is just
> an example.
It would be useful if the example applied directly to intel-gpu-tools
tests. Perhaps just a single feature to start with?
Since this isn't a script as such, w
Signed-off-by: Marius Vlad
---
tests/pm_rpm.c | 120 +
1 file changed, 120 insertions(+)
diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
index c4fb19c..d34b2b2 100644
--- a/tests/pm_rpm.c
+++ b/tests/pm_rpm.c
@@ -1729,6 +1729,120 @@ static voi
From: Ville Syrjälä
The .get_config() hooks should not reference anything in crtc->config,
everything should be based on the passed in pipe_config instead. So
don't dig out the cpu_transcoder from crtc->config on ddi platfforms,
and also avoid using the encoder->crtc link and instead look up the
On Thu, 26 Nov 2015 16:58:09 +0100,
Ville Syrjälä wrote:
>
> On Thu, Nov 26, 2015 at 04:51:04PM +0100, Takashi Iwai wrote:
> > On Thu, 26 Nov 2015 16:43:23 +0100,
> > Ville Syrjälä wrote:
> > >
> > > On Thu, Nov 26, 2015 at 04:29:12PM +0100, David Henningsson wrote:
> > > >
> > > >
> > > > On 2
Hi,
On 25/11/15 14:44, Vinay Belgaumkar wrote:
These tests exercise the userptr ioctl to create shared buffers
between CPU and GPU. They contain error and normal usage scenarios.
They also contain a couple of stress tests which copy buffers between
CPU and GPU. These tests rely on the softpin p
On Thu, Nov 26, 2015 at 03:49:00PM +0100, Daniel Vetter wrote:
> On Thu, Nov 26, 2015 at 01:31:42PM +, Chris Wilson wrote:
> > We have relied upon the sole caller (wait_ioctl) validating the timeout
> > argument. However, when waiting for multiple requests I forgot to ensure
> > that the timeou
On Thu, Nov 26, 2015 at 04:51:04PM +0100, Takashi Iwai wrote:
> On Thu, 26 Nov 2015 16:43:23 +0100,
> Ville Syrjälä wrote:
> >
> > On Thu, Nov 26, 2015 at 04:29:12PM +0100, David Henningsson wrote:
> > >
> > >
> > > On 2015-11-26 16:23, Takashi Iwai wrote:
> > > > On Thu, 26 Nov 2015 16:08:06 +0
On Thu, Nov 26, 2015 at 03:34:05PM +, Chris Wilson wrote:
> On Thu, Nov 26, 2015 at 03:46:06PM +0100, Daniel Vetter wrote:
> > On Thu, Nov 26, 2015 at 12:59:37PM +, Chris Wilson wrote:
> > > On Thu, Nov 26, 2015 at 12:34:35PM +0100, Daniel Vetter wrote:
> > > > Since $debugfs/i915_wedged re
On Thu, 26 Nov 2015 16:43:23 +0100,
Ville Syrjälä wrote:
>
> On Thu, Nov 26, 2015 at 04:29:12PM +0100, David Henningsson wrote:
> >
> >
> > On 2015-11-26 16:23, Takashi Iwai wrote:
> > > On Thu, 26 Nov 2015 16:08:06 +0100,
> > > David Henningsson wrote:
> > >>
> > >>
> > >>
> > >> On 2015-11-26
On Thu, Nov 26, 2015 at 04:23:16PM +0100, Takashi Iwai wrote:
> On Thu, 26 Nov 2015 16:08:06 +0100,
> David Henningsson wrote:
> >
> >
> >
> > On 2015-11-26 10:24, Takashi Iwai wrote:
> > > On Thu, 26 Nov 2015 10:16:17 +0100,
> > > Zhang, Xiong Y wrote:
> > >>
> > >>
> > >>> On Thu, 26 Nov 2015
On Thu, 26 Nov 2015 16:29:12 +0100,
David Henningsson wrote:
>
>
>
> On 2015-11-26 16:23, Takashi Iwai wrote:
> > On Thu, 26 Nov 2015 16:08:06 +0100,
> > David Henningsson wrote:
> >>
> >>
> >>
> >> On 2015-11-26 10:24, Takashi Iwai wrote:
> >>> On Thu, 26 Nov 2015 10:16:17 +0100,
> >>> Zhang, X
On Thu, Nov 26, 2015 at 04:29:12PM +0100, David Henningsson wrote:
>
>
> On 2015-11-26 16:23, Takashi Iwai wrote:
> > On Thu, 26 Nov 2015 16:08:06 +0100,
> > David Henningsson wrote:
> >>
> >>
> >>
> >> On 2015-11-26 10:24, Takashi Iwai wrote:
> >>> On Thu, 26 Nov 2015 10:16:17 +0100,
> >>> Zhang
On Thu, Nov 26, 2015 at 11:25:14AM +, Chris Wilson wrote:
> On Wed, Nov 25, 2015 at 03:46:35PM -0500, Johannes Weiner wrote:
> > On Wed, Nov 25, 2015 at 08:31:02PM +, Chris Wilson wrote:
> > > On Wed, Nov 25, 2015 at 02:06:10PM -0500, Johannes Weiner wrote:
> > > > On Wed, Nov 25, 2015 at 0
On to, 2015-11-26 at 16:29 +0100, David Henningsson wrote:
>
> On 2015-11-26 16:23, Takashi Iwai wrote:
> > On Thu, 26 Nov 2015 16:08:06 +0100,
> > David Henningsson wrote:
> > >
> > >
> > >
> > > On 2015-11-26 10:24, Takashi Iwai wrote:
> > > > On Thu, 26 Nov 2015 10:16:17 +0100,
> > > > Zhang
On Thu, Nov 26, 2015 at 03:46:06PM +0100, Daniel Vetter wrote:
> On Thu, Nov 26, 2015 at 12:59:37PM +, Chris Wilson wrote:
> > On Thu, Nov 26, 2015 at 12:34:35PM +0100, Daniel Vetter wrote:
> > > Since $debugfs/i915_wedged restores a wedged gpu by using a normal gpu
> > > hang we need to be car
On 2015-11-26 16:23, Takashi Iwai wrote:
On Thu, 26 Nov 2015 16:08:06 +0100,
David Henningsson wrote:
On 2015-11-26 10:24, Takashi Iwai wrote:
On Thu, 26 Nov 2015 10:16:17 +0100,
Zhang, Xiong Y wrote:
On Thu, 26 Nov 2015 08:57:30 +0100,
Zhang, Xiong Y wrote:
BTW, I have a patchset t
On Thu, 26 Nov 2015 16:08:06 +0100,
David Henningsson wrote:
>
>
>
> On 2015-11-26 10:24, Takashi Iwai wrote:
> > On Thu, 26 Nov 2015 10:16:17 +0100,
> > Zhang, Xiong Y wrote:
> >>
> >>
> >>> On Thu, 26 Nov 2015 08:57:30 +0100,
> >>> Zhang, Xiong Y wrote:
>
> >>> BTW, I have a patchset
On 2015-11-26 10:24, Takashi Iwai wrote:
On Thu, 26 Nov 2015 10:16:17 +0100,
Zhang, Xiong Y wrote:
On Thu, 26 Nov 2015 08:57:30 +0100,
Zhang, Xiong Y wrote:
BTW, I have a patchset to avoid the audio h/w wakeup by a new
component ops to get ELD and connection states. It was posted to
als
On to, 2015-11-26 at 15:34 +0100, Daniel Vetter wrote:
> On Thu, Nov 26, 2015 at 02:17:53PM +0200, Joonas Lahtinen wrote:
> > Capture the output from /dev/kmsg during test execution
> > independantly
> > of other concurrent watchers like Piglit test runner.
> >
> > The captured output is analyzed
On Thu, Nov 26, 2015 at 01:31:42PM +, Chris Wilson wrote:
> We have relied upon the sole caller (wait_ioctl) validating the timeout
> argument. However, when waiting for multiple requests I forgot to ensure
> that the timeout was still positive on the later requests. This is more
> simply done
On Thu, Nov 26, 2015 at 12:59:37PM +, Chris Wilson wrote:
> On Thu, Nov 26, 2015 at 12:34:35PM +0100, Daniel Vetter wrote:
> > Since $debugfs/i915_wedged restores a wedged gpu by using a normal gpu
> > hang we need to be careful to not run into the "hanging too fast
> > check":
> >
> > - don't
On Thu, Nov 26, 2015 at 02:07:57PM +, Tvrtko Ursulin wrote:
>
> On 26/11/15 10:01, Daniel Vetter wrote:
> >On Wed, Nov 25, 2015 at 10:16:37AM +, Tvrtko Ursulin wrote:
> >>
> >>On 24/11/15 17:47, Daniel Vetter wrote:
> >>>On Mon, Nov 23, 2015 at 03:12:35PM +, Tvrtko Ursulin wrote:
> >>>
On Tue, 2015-11-24 at 10:44 +0100, Maarten Lankhorst wrote:
> Warn for the wrong mask in enable only. Disable will have the wrong mask
> now because the new state is committed before disabling the old state.
Why?
Ander
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_displ
On Thu, Nov 26, 2015 at 12:43:19PM +, Chris Wilson wrote:
> On Thu, Nov 26, 2015 at 04:32:30PM +0530, Namrta Salonie wrote:
> > Found by static code analysis tool.
> >
> > v2: Inserted block instead of goto & renamed variables (Chris)
> >
> > Signed-off-by: Namrta Salonie
> > Signed-off-by:
On Tue, 2015-11-24 at 10:44 +0100, Maarten Lankhorst wrote:
> This makes it easier to verify correct dpll setup with only a single crtc.
> It it also useful to detect double dpll enable/disable.
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/
On Thu, Nov 26, 2015 at 02:17:53PM +0200, Joonas Lahtinen wrote:
> Capture the output from /dev/kmsg during test execution independantly
> of other concurrent watchers like Piglit test runner.
>
> The captured output is analyzed and the whole output dumped if message
> with priority LOG_WARNING or
On Wed, 25 Nov 2015, Ville Syrjälä wrote:
> On Wed, Nov 25, 2015 at 04:47:22PM +0200, Jani Nikula wrote:
>> We had the "The master control interrupt lied (SDE)!" check and error
>> message in place for a long time without any problems, until
>>
>> commit aaf5ec2e51ab1d9c5e962b4728a1107ed3ff7a3e
>
On Thu, Nov 26, 2015 at 12:03:51PM +0100, Gerd Hoffmann wrote:
> Commit "30c964a drm/i915: Detect virtual south bridge" detects and
> handles the southbridge emulated by vmware esx. Add the ich9 south
> bridge emulated by 'qemu -M q35'.
>
> Signed-off-by: Gerd Hoffmann
Queued for -next, thanks
On 26/11/15 10:01, Daniel Vetter wrote:
On Wed, Nov 25, 2015 at 10:16:37AM +, Tvrtko Ursulin wrote:
On 24/11/15 17:47, Daniel Vetter wrote:
On Mon, Nov 23, 2015 at 03:12:35PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Current code moves _any_ VMA to the inactive list only when
_
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion h
For dual link panel scenarios there are new fileds added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.
v2: Moving the comment to intel_dsi.h(Jani)
Cc: Jani Nikula
Cc: Daniel Vetter
Cc: Yetunde Adebisi
Signed-off-by: Deepak M
---
drivers/gpu/
On Thu, 2015-11-19 at 16:07 +0100, Maarten Lankhorst wrote:
> When the crtc is configured but not active we currently clip to (0,0)x(0,0).
> This results in differences in calculations depending on dpms setting.
Is this part of "and fix BAT!"?
> When the crtc is enabled but not active run check_p
On Tue, 24 Nov 2015, Daniel Vetter wrote:
> On Tue, Nov 24, 2015 at 03:08:17PM +0200, Ville Syrjälä wrote:
>> On Tue, Nov 24, 2015 at 01:44:46PM +0100, Daniel Vetter wrote:
>> > On Fri, Nov 20, 2015 at 12:18:41PM +0100, Takashi Iwai wrote:
>> > > On Thu, 19 Nov 2015 17:04:20 +0100,
>> > > Takashi
On Wed, 25 Nov 2015, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 03:26:47PM +0100, Takashi Iwai wrote:
>> The commit [cfb23ed622d0: drm/i915: Allow fuzzy matching in
>> pipe_config_compare, v2] relaxed the way to compare the pipe
>> configurations, but one new comparison sneaked in there: it ad
On Tue, Nov 24, 2015 at 6:46 AM, Dmitry V. Levin wrote:
> On Mon, Sep 07, 2015 at 08:23:57PM +0200, Patrik Jakobsson wrote:
>> On Mon, Sep 7, 2015 at 6:51 PM, Dmitry V. Levin wrote:
>> > On Mon, Aug 31, 2015 at 02:37:07PM +0200, Patrik Jakobsson wrote:
>> > [...]
>> >> Here's my take on it (I assu
We have relied upon the sole caller (wait_ioctl) validating the timeout
argument. However, when waiting for multiple requests I forgot to ensure
that the timeout was still positive on the later requests. This is more
simply done inside __i915_wait_request.
Fixes regression introduced in
commit b47
On Thu, 2015-11-26 at 15:31 +0200, Ander Conselvan De Oliveira wrote:
> On Thu, 2015-11-19 at 16:07 +0100, Maarten Lankhorst wrote:
> > On skylake when calculating plane visibility with the crtc in
> > dpms off mode the real cdclk may be different from what it would be
> > if the crtc was active. T
On Thu, 2015-11-19 at 16:07 +0100, Maarten Lankhorst wrote:
> On skylake when calculating plane visibility with the crtc in
> dpms off mode the real cdclk may be different from what it would be
> if the crtc was active. This may result in a WARN_ON(cdclk < crtc_clock)
> from skl_max_scale. The fix
On Thu, Nov 26, 2015 at 12:34:35PM +0100, Daniel Vetter wrote:
> Since $debugfs/i915_wedged restores a wedged gpu by using a normal gpu
> hang we need to be careful to not run into the "hanging too fast
> check":
>
> - don't restore the ban period, but instead keep it at 0.
> - make sure we idle t
On Thu, Nov 26, 2015 at 04:32:30PM +0530, Namrta Salonie wrote:
> Found by static code analysis tool.
>
> v2: Inserted block instead of goto & renamed variables (Chris)
>
> Signed-off-by: Namrta Salonie
> Signed-off-by: Deepak S
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 32 ++
Capture the output from /dev/kmsg during test execution independantly
of other concurrent watchers like Piglit test runner.
The captured output is analyzed and the whole output dumped if message
with priority LOG_WARNING or higher is emitted from any domain.
Also adding igt_capture to lib/tests w
On to, 2015-11-26 at 12:55 +0200, Marius Vlad wrote:
> On Wed, Nov 25, 2015 at 10:08:21PM +0200, Imre Deak wrote:
> > On ke, 2015-11-25 at 19:16 +0200, marius.c.v...@intel.com wrote:
> > > From: Marius Vlad
> > >
> > > Signed-off-by: Marius Vlad
> > > ---
> > > tests/pm_rpm.c | 120
> > > ++
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been written back to by the GPU.
Now that the context is pinned until later in the request/context
lifecycle, it no longer needs to be pinned from context_queue to
re
On Thu, Nov 26, 2015 at 09:41:36AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 04:35:31PM +0200, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > DPLL_SDVO_HIGH_SPEED must be set for SDVO/HDMI/DP, but nowhere is it
> > forbidden to set it for LVDS/CRT as well. So let
On Thu, Nov 26, 2015 at 10:30:57AM +, Chris Wilson wrote:
> On Thu, Nov 26, 2015 at 10:34:51AM +0100, Daniel Vetter wrote:
> > On Wed, Nov 25, 2015 at 09:58:28AM +, Chris Wilson wrote:
> > > One thing I did notice when also dealing with memory
> > > pressure flushing backbuffers was (a) the
Since $debugfs/i915_wedged restores a wedged gpu by using a normal gpu
hang we need to be careful to not run into the "hanging too fast
check":
- don't restore the ban period, but instead keep it at 0.
- make sure we idle the gpu fully before hanging it again (wait
subtest missted that).
With t
So there's 3 competing proposals for what wait_ioctl should do wrt
-EIO:
- return -EIO when the gpu is wedged. Not terribly useful for
userspace since it might race with a hang and then there's no
guarantee that a subsequent execbuf won't end up in an -EIO.
Terminally wedge really can only b
On Thu, Nov 26, 2015 at 11:51:09AM +0100, Daniel Vetter wrote:
> My apologies to Chris Wilson for being dense on this topic for
> essentially for years.
>
> This patch doesn't do any big redesign of the overall reset flow, but
> instead just applies changes where it's needed to obey gem_eio. We ca
On Thu, 2015-11-19 at 16:07 +0100, Maarten Lankhorst wrote:
> This leaves intel_crtc->atomic empty, so zap it as well.
I made some comments on this patch already. I think those are still valid:
http://lists.freedesktop.org/archives/intel-gfx/2015-November/079829.html
Ander
>
> Signed-off-by: M
On Wed, Nov 25, 2015 at 03:46:35PM -0500, Johannes Weiner wrote:
> On Wed, Nov 25, 2015 at 08:31:02PM +, Chris Wilson wrote:
> > On Wed, Nov 25, 2015 at 02:06:10PM -0500, Johannes Weiner wrote:
> > > On Wed, Nov 25, 2015 at 06:36:56PM +, Chris Wilson wrote:
> > > > +static bool swap_availab
Commit "30c964a drm/i915: Detect virtual south bridge" detects and
handles the southbridge emulated by vmware esx. Add the ich9 south
bridge emulated by 'qemu -M q35'.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/i915/i915_drv.c | 3 ++-
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files change
Found by static code analysis tool.
v2: Inserted block instead of goto & renamed variables (Chris)
Signed-off-by: Namrta Salonie
Signed-off-by: Deepak S
---
drivers/gpu/drm/i915/i915_debugfs.c | 32 +++-
1 file changed, 15 insertions(+), 17 deletions(-)
diff --gi
On Thu, Nov 26, 2015 at 09:09:37AM +0530, Goel, Akash wrote:
>
>
> On 11/25/2015 10:58 PM, Chris Wilson wrote:
> >On Wed, Nov 25, 2015 at 01:02:20PM +0200, Ville Syrjälä wrote:
> >>On Tue, Nov 24, 2015 at 10:39:38PM +, Chris Wilson wrote:
> >>>On Tue, Nov 24, 2015 at 07:14:31PM +0100, Daniel
On Wed, Nov 25, 2015 at 10:08:21PM +0200, Imre Deak wrote:
> On ke, 2015-11-25 at 19:16 +0200, marius.c.v...@intel.com wrote:
> > From: Marius Vlad
> >
> > Signed-off-by: Marius Vlad
> > ---
> > tests/pm_rpm.c | 120
> > +
> > 1 file chan
My apologies to Chris Wilson for being dense on this topic for
essentially for years.
This patch doesn't do any big redesign of the overall reset flow, but
instead just applies changes where it's needed to obey gem_eio. We can
redesign later on, but for now I prefer to make the testcase happy
with
On Thu, Nov 26, 2015 at 10:03:01AM +, Chris Wilson wrote:
> On Thu, Nov 26, 2015 at 09:36:14AM +0100, Daniel Vetter wrote:
> > On Wed, Nov 25, 2015 at 04:34:13PM +, Chris Wilson wrote:
> > > On Wed, Nov 25, 2015 at 04:29:01PM +, Chris Wilson wrote:
> > > > On Wed, Nov 25, 2015 at 04:58:
On Mon, Nov 23, 2015 at 03:12:35PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Current code moves _any_ VMA to the inactive list only when
> _all_ rendering on an object (so from any context or VM) has
> been completed.
>
> This creates an un-natural situation where the context (and
On Thu, Nov 26, 2015 at 10:34:51AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 09:58:28AM +, Chris Wilson wrote:
> > One thing I did notice when also dealing with memory
> > pressure flushing backbuffers was (a) they were unaligned and so needed
> > rebinding before pinning
> > http:/
On Wed, Nov 25, 2015 at 04:21:30PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Daniel Vetter
Aside: Build htmldocs results in a lot of complaints that many irq helpers
here aren't included ... we should fix that to make it mo
On Thu, Nov 26, 2015 at 09:19:44AM +, Nick Hoath wrote:
> On 26/11/2015 08:48, Daniel Vetter wrote:
> >On Wed, Nov 25, 2015 at 05:02:44PM +0200, Mika Kuoppala wrote:
> >>Nick Hoath writes:
> >>
> >>>Use the first retired request on a new context to unpin
> >>>the old context. This ensures that
On Wed, Nov 25, 2015 at 05:09:02PM +0530, Thulasimani, Sivakumar wrote:
>
>
>
> On 11/25/2015 3:34 PM, Daniel Vetter wrote:
> >On Tue, Nov 24, 2015 at 08:13:06PM +0100, Daniel Vetter wrote:
> >>Hi Ander&Sivakumar,
> >>
> >>Dave&I had a short discussion about reprobing DP (and MST) state on
> >>r
On Thu, Nov 26, 2015 at 09:34:01AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 04:28:02PM +, Chris Wilson wrote:
> > On Wed, Nov 25, 2015 at 05:19:24PM +0100, Daniel Vetter wrote:
> > > Since $debugfs/i915_wedged restores a wedged gpu by using a normal gpu
> > > hang we need to be car
On Thu, Nov 26, 2015 at 09:36:14AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 04:34:13PM +, Chris Wilson wrote:
> > On Wed, Nov 25, 2015 at 04:29:01PM +, Chris Wilson wrote:
> > > On Wed, Nov 25, 2015 at 04:58:19PM +0100, Daniel Vetter wrote:
> > > > This testcase tries to valida
On Wed, Nov 25, 2015 at 10:16:37AM +, Tvrtko Ursulin wrote:
>
> On 24/11/15 17:47, Daniel Vetter wrote:
> >On Mon, Nov 23, 2015 at 03:12:35PM +, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>Current code moves _any_ VMA to the inactive list only when
> >>_all_ rendering on an ob
On Thu, Nov 26, 2015 at 10:21:38AM +0100, Daniel Vetter wrote:
> On Wed, Nov 25, 2015 at 12:17:08PM +, Chris Wilson wrote:
> > On Wed, Nov 25, 2015 at 10:12:53AM +0100, Daniel Vetter wrote:
> > > On Tue, Nov 24, 2015 at 09:43:32PM +, Chris Wilson wrote:
> > > > On Tue, Nov 24, 2015 at 05:43
On Wed, Nov 25, 2015 at 09:58:28AM +, Chris Wilson wrote:
> On Wed, Nov 25, 2015 at 10:17:49AM +0100, Daniel Vetter wrote:
> > On Tue, Nov 24, 2015 at 11:17:38PM +, Chris Wilson wrote:
> > > On Tue, Nov 24, 2015 at 06:15:47PM +0100, Daniel Vetter wrote:
> > > > On Mon, Nov 23, 2015 at 09:20
On Thu, 26 Nov 2015 10:16:17 +0100,
Zhang, Xiong Y wrote:
>
>
> > On Thu, 26 Nov 2015 08:57:30 +0100,
> > Zhang, Xiong Y wrote:
> > >
> > > > > > BTW, I have a patchset to avoid the audio h/w wakeup by a new
> > > > > > component ops to get ELD and connection states. It was posted to
> > > > > >
On Wed, Nov 25, 2015 at 12:17:08PM +, Chris Wilson wrote:
> On Wed, Nov 25, 2015 at 10:12:53AM +0100, Daniel Vetter wrote:
> > On Tue, Nov 24, 2015 at 09:43:32PM +, Chris Wilson wrote:
> > > On Tue, Nov 24, 2015 at 05:43:22PM +0100, Daniel Vetter wrote:
> > > > On Fri, Nov 20, 2015 at 12:43
On 26/11/2015 08:48, Daniel Vetter wrote:
On Wed, Nov 25, 2015 at 05:02:44PM +0200, Mika Kuoppala wrote:
Nick Hoath writes:
Use the first retired request on a new context to unpin
the old context. This ensures that the hw context remains
bound until it has been written back to by the GPU.
Now
On 25/11/2015 19:29, Dai, Yu wrote:
From: Alex Dai
When GuC Work Queue is full, driver will wait GuC for avaliable
available
space by delaying 1ms. The wait needs to be out of spinlockirq /
unlock. Otherwise, lockup happens because jiffi
> On Thu, 26 Nov 2015 08:57:30 +0100,
> Zhang, Xiong Y wrote:
> >
> > > > > BTW, I have a patchset to avoid the audio h/w wakeup by a new
> > > > > component ops to get ELD and connection states. It was posted to
> > > > > alsa-devel shortly ago just as a reference, but this should work well
> >
On Wed, Nov 25, 2015 at 05:02:44PM +0200, Mika Kuoppala wrote:
> Nick Hoath writes:
>
> > Use the first retired request on a new context to unpin
> > the old context. This ensures that the hw context remains
> > bound until it has been written back to by the GPU.
> > Now that the context is pinne
On Wed, Nov 25, 2015 at 04:35:31PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> DPLL_SDVO_HIGH_SPEED must be set for SDVO/HDMI/DP, but nowhere is it
> forbidden to set it for LVDS/CRT as well. So let's move it out of the
> ironlake_compute_dpll() and just do it on demand
On Wed, Nov 25, 2015 at 04:35:30PM +0200, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> ironlake_crtc_compute_clock() gets called during atomic compute phase,
> so we must check the future pipe type instead of the current type.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Dan
On Wed, Nov 25, 2015 at 04:34:13PM +, Chris Wilson wrote:
> On Wed, Nov 25, 2015 at 04:29:01PM +, Chris Wilson wrote:
> > On Wed, Nov 25, 2015 at 04:58:19PM +0100, Daniel Vetter wrote:
> > > This testcase tries to validate -EIO behaviour by disabling gpu reset
> > > support in the kernel. E
On Wed, Nov 25, 2015 at 04:28:02PM +, Chris Wilson wrote:
> On Wed, Nov 25, 2015 at 05:19:24PM +0100, Daniel Vetter wrote:
> > Since $debugfs/i915_wedged restores a wedged gpu by using a normal gpu
> > hang we need to be careful to not run into the "hanging too fast
> > check":
>
> That's not
On Wed, Nov 25, 2015 at 05:52:57PM +, Chris Wilson wrote:
> On Wed, Nov 25, 2015 at 06:45:26PM +0100, Daniel Vetter wrote:
> > My apologies to Chris Wilson for being dense on this topic for
> > essentially for years.
> >
> > This patch doesn't do any big redesign of the overall reset flow, but
Hi Dave,
I figured it's more than time to open up drm-next for 4.5 ;-)
Here's the first drm-misc pull, with really mostly misc stuff all over.
Somewhat invasive is only Ville's change to mark the arg struct for
fb_create const - that might conflict with a new driver pull. So better to
get in fast
On Thu, 26 Nov 2015 08:57:30 +0100,
Zhang, Xiong Y wrote:
>
> > > > BTW, I have a patchset to avoid the audio h/w wakeup by a new
> > > > component ops to get ELD and connection states. It was posted to
> > > > alsa-devel shortly ago just as a reference, but this should work well
> > > > in such
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