From: Dave Airlie
While playing with MPX and sw cursor I noticed page flips won't
end up misrendering some bits, so the sw cursor was replacing the
bits on the wrong pixmap.
Fix the damage handling to be correct and append damage before swapping
the pointers and process damage after.
This fixes
On Wed, Oct 10, 2012 at 10:57:05PM +0100, Lespiau, Damien wrote:
> On Fri, Oct 5, 2012 at 4:06 PM, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > So WARN in case they're not. It also does not make any sense to
> > wait_for_vblank at this point.
> >
> > Signed-off-by: Paulo Zanoni
>
> Review
On Wed, 10 Oct 2012 23:14:01 +0200, Daniel Vetter
wrote:
> It doesn't work since the gtt pte range sits in the middle of the mmio
> bar. We didn't notice that since both my and Chris' gen2 machines
> don't support PAT and hence all wc io mapping request will
> automatically be demoted to uc.
>
>
On Fri, Oct 5, 2012 at 4:06 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> And also properly wait for its idle bit.
>
> You may notice that DDI_BUF_CTL is enabled in .enable but disabled in
> .post_disable instead of .disable. Yes, the mode set sequence is not
> exactly symmetrical, but let's a
It doesn't work since the gtt pte range sits in the middle of the mmio
bar. We didn't notice that since both my and Chris' gen2 machines
don't support PAT and hence all wc io mapping request will
automatically be demoted to uc.
This regression has been introduce in
commit edef7e685da05c13cce50c01
We need to check whether the _other plane is on our pipe, not whether
our plane is on the other pipe. Otherwise if not both pipes/planes are
active, we won't properly clean up the mess and set up our desired
plane->pipe mapping.
v2: Fixup the logic, I've totally fumbled it. Noticed by Chris Wilson
This seems to be the root-cause that breaks resume on my i855gm when I
apply the "drm/i915: fixup the plane->pipe fixup code" patch. And that
code doesn't even run on my machine, so it's pure timing changes
causing the regression.
Furthermore resume has been constantly switching between working an
On Fri, Oct 5, 2012 at 4:06 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> So WARN in case they're not. It also does not make any sense to
> wait_for_vblank at this point.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Damien Lespiau
--
Damien
___
On Wed, Oct 10, 2012 at 10:42:52PM +0100, Lespiau, Damien wrote:
> On Wed, Oct 10, 2012 at 10:09 PM, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
> > drm/i915: implement WaDisableEarlyCull for VLV and IVB
> >
> > Notice that t
On Wed, Oct 10, 2012 at 10:09 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
> drm/i915: implement WaDisableEarlyCull for VLV and IVB
>
> Notice that the original patch sent to the mailing list did not
> include the Haswell chunk,
This magic brings stability to HSW B0 CRW machines.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_gem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 61c3640..e59713c 100644
--- a/drivers/gpu/drm/i915/i9
> At least on my docs this bit is listed for SNB and IVB only. After
> this patch I get a GPU hang every time I boot the HSW machine. Maybe
> we need this only for some specific pre-production machines, but not
> all? (in this case, our docs need to be fixed)
Ooops, config db for the details on pr
From: Paulo Zanoni
Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
drm/i915: implement WaDisableEarlyCull for VLV and IVB
Notice that the original patch sent to the mailing list did not
include the Haswell chunk, it was added later.
The bit set by the commit does not exist on H
On Wed, Oct 10, 2012 at 5:08 PM, Chris Wilson wrote:
> If we have hit oom whilst holding our struct_mutex, then currently we
> cannot reap our own GPU buffers which likely pin most of memory, making
> an outright OOM more likely. So if we are running in direct reclaim and
> already hold the mutex,
Hi
2012/10/2 Ben Widawsky :
> On Tue, 2 Oct 2012 17:43:41 -0500
> Jesse Barnes wrote:
>
>> Workaround for a culling optimization.
>>
>> Signed-off-by: Jesse Barnes
>> ---
>> drivers/gpu/drm/i915/i915_reg.h |1 +
>> drivers/gpu/drm/i915/intel_pm.c |8
>> 2 files changed, 9 inse
On Wed, Oct 10, 2012 at 04:56:07PM +0200, Daniel Vetter wrote:
> On Wed, Oct 10, 2012 at 03:27:59PM +0100, Lespiau, Damien wrote:
> > On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> > > From: Paulo Zanoni
> > >
> > > Just set the only bit we need, everything else is either ignored on
> > >
On Wed, 10 Oct 2012 12:07:30 +0100, Chris Wilson
wrote:
> If the system is forced to start kswapd to recover pages, the system is
> very starved. Fortunately, kswapd is its own process context and can
> wait for the mutex.
Note this doesn't survive inspection with lockdep due to dependency upon
If we have hit oom whilst holding our struct_mutex, then currently we
cannot reap our own GPU buffers which likely pin most of memory, making
an outright OOM more likely. So if we are running in direct reclaim and
already hold the mutex, attempt to free buffers knowing that the
original function ca
On Wed, Oct 10, 2012 at 03:27:59PM +0100, Lespiau, Damien wrote:
> On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > Just set the only bit we need, everything else is either ignored on
> > HDMI or should be set to zero.
> >
> > Signed-off-by: Paulo Zanoni
>
> Is
On Wed, Oct 10, 2012 at 03:22:01PM +0100, Lespiau, Damien wrote:
> On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> > + val = SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz |
> > SPLL_PLL_SCC;
>
> We probably want a patch on top to fix the SCC typo (should be SSC,
> Spread Spectrum C
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Just set the only bit we need, everything else is either ignored on
> HDMI or should be set to zero.
>
> Signed-off-by: Paulo Zanoni
Is the assumption that intel_enable_ddi() will only ever be used by
the HDMI encore l
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> + val = SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SCC;
We probably want a patch on top to fix the SCC typo (should be SSC,
Spread Spectrum Clock).
There's also some fiddly bit with CPU Vs PCH SSC sources, but this can
b
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> It's a copy of ironlake_set_pipeconf with 2 differences:
> - There is no BPC field to set.
> - The interlaced mask is now 2 bits instead of 3.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Damien Lespiau
--
Damie
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> On ironlake_crtc_mode_set, WARN if not using IBX or CPT.
>
> On haswell_crtc_mode_set, only run IBX/CPT code on IBX/CPT. I am still
> not sure whether IBX/CPT will be possible with a Haswell CPU, so leave
> the code ther
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> It's just a copy of ironlake_crtc_mode_set.
>
> Signed-off-by: Paulo Zanoni
Reviewed-by: Damien Lespiau
--
Damien
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.or
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> Previously we were enabling it at mode_set but never disabling. Let's
> follow the mode set sequence.
>
> Signed-off-by: Paulo Zanoni
> Reviewed-by: Damien Lespiau
The r-b still holds with the resend.
--
Damien
Signed-off-by: Imre Deak
---
tests/testdisplay.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index 39c4265..cd83d9c 100644
--- a/tests/testdisplay.c
+++ b/tests/testdisplay.c
@@ -647,6 +647,7 @@ static void enter_exec_path( c
Signed-off-by: Imre Deak
---
tests/prime_nv_api.c |5 -
tests/prime_nv_test.c |5 -
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/tests/prime_nv_api.c b/tests/prime_nv_api.c
index 962e903..e1b7117 100644
--- a/tests/prime_nv_api.c
+++ b/tests/prime_nv_api.c
@@ -3
Signed-off-by: Imre Deak
---
tests/gem_reg_read.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/tests/gem_reg_read.c b/tests/gem_reg_read.c
index 1d6db1f..692dd98 100644
--- a/tests/gem_reg_read.c
+++ b/tests/gem_reg_read.c
@@ -52,29 +52,29 @@ static voi
Signed-off-by: Imre Deak
---
tests/sysfs_rc6_residency.c |5 -
tests/sysfs_rps.c |6 +-
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/tests/sysfs_rc6_residency.c b/tests/sysfs_rc6_residency.c
index 2f33697..cd62e77 100644
--- a/tests/sysfs_rc6_residency.
Signed-off-by: Imre Deak
---
tests/gem_readwrite.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/tests/gem_readwrite.c b/tests/gem_readwrite.c
index 68c3ff2..d3d69e3 100644
--- a/tests/gem_readwrite.c
+++ b/tests/gem_readwrite.c
@@ -44,34 +44
Signed-off-by: Imre Deak
---
tools/intel_reg_snapshot.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/intel_reg_snapshot.c b/tools/intel_reg_snapshot.c
index 83e76e5..9c5fa83 100644
--- a/tools/intel_reg_snapshot.c
+++ b/tools/intel_reg_snapshot.c
@@ -25,6 +25,7
Signed-off-by: Imre Deak
---
tools/intel_error_decode.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index e0ec8f6..ca03c83 100644
--- a/tools/intel_error_decode.c
+++ b/tools/intel_error_decode.c
@@ -49,6
Signed-off-by: Imre Deak
---
lib/drmtest.c|6 +++---
tests/gem_storedw_batches_loop.c |6 +++---
tests/gem_storedw_loop_blt.c |6 +++---
tests/gem_storedw_loop_bsd.c |6 +++---
tests/gem_storedw_loop_render.c |6 +++---
5 files changed, 15 insertio
These are harmless apart from ignoring eventual errors, but they
make it difficult to spot new errors/warnings in the build output.
Imre Deak (8):
fix warn: 'div' shadows a global declaration
fix warn in intel_error_decode: ignoring return value of 'asprintf'
fix warn in intel_reg_snapshot:
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> And the right time is exactly after/before changing PIPE_CONF. See the
> documentation about the mode set sequence.
>
> This code is not inside any encoder-specific callback because
> DDI_FUNC_CTL is part of the pipe, so
On Wed, Oct 10, 2012 at 1:47 PM, Lespiau, Damien
wrote:
> On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
>
>> +static int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
>> +{
>> + if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
>> + return 450;
>
> I don't t
On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni wrote:
> +static int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
> +{
> + if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
> + return 450;
I don't think reading this fused register is necessary here, it only
really
On Wed, Oct 10, 2012 at 12:11:52PM +0100, Chris Wilson wrote:
> Note that just because we have n == MAX elements left, does not imply
> that there are only MAX elements left in the scatterlist and so we may
> not be on the last chain, and the nth element may in fact be a chain ptr.
>
> This is exe
Note that just because we have n == MAX elements left, does not imply
that there are only MAX elements left in the scatterlist and so we may
not be on the last chain, and the nth element may in fact be a chain ptr.
This is exercised by the improved hangman tests and the gem_exec_big
test in i-g-t.
If the system is forced to start kswapd to recover pages, the system is
very starved. Fortunately, kswapd is its own process context and can
wait for the mutex.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
On Wed, 10 Oct 2012 11:21:44 +0200, Daniel Vetter wrote:
> On Wed, Oct 10, 2012 at 10:01:47AM +0100, Chris Wilson wrote:
> > On Tue, 09 Oct 2012 23:16:02 +0100, Chris Wilson
> > wrote:
> > > On Tue, 9 Oct 2012 22:50:48 +0200, Daniel Vetter
> > > wrote:
> > > > The obj->pages to obj->pages->sg
On Wed, Oct 10, 2012 at 10:01:47AM +0100, Chris Wilson wrote:
> On Tue, 09 Oct 2012 23:16:02 +0100, Chris Wilson
> wrote:
> > On Tue, 9 Oct 2012 22:50:48 +0200, Daniel Vetter
> > wrote:
> > > The obj->pages to obj->pages->sgl rework introduced this helper, but
> > > it doesn't actually work fo
On Wed, Oct 10, 2012 at 10:01:47AM +0100, Chris Wilson wrote:
> On Tue, 09 Oct 2012 23:16:02 +0100, Chris Wilson
> wrote:
> > On Tue, 9 Oct 2012 22:50:48 +0200, Daniel Vetter
> > wrote:
> > > The obj->pages to obj->pages->sgl rework introduced this helper, but
> > > it doesn't actually work fo
On Wed, 10 Oct 2012 10:06:40 +0200, Daniel Vetter
wrote:
> They seem to be implicated in render corruptions. And up to now no one
> really seems to understand the issue, so let's just disable them for
> now. Most of the machines exhibiting this issue have only a 128 gtt
> mmio window, so increase
On Tue, 09 Oct 2012 23:16:02 +0100, Chris Wilson
wrote:
> On Tue, 9 Oct 2012 22:50:48 +0200, Daniel Vetter
> wrote:
> > The obj->pages to obj->pages->sgl rework introduced this helper, but
> > it doesn't actually work for n >= SG_MAX_SINGLE_ALLOC.
> >
> > For simplicity (and since right now I
They seem to be implicated in render corruptions. And up to now no one
really seems to understand the issue, so let's just disable them for
now. Most of the machines exhibiting this issue have only a 128 gtt
mmio window, so increased pressure on the mappable part (and so higher
chance for cpu reloc
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