On Fri, Oct 5, 2012 at 4:05 PM, Paulo Zanoni <przan...@gmail.com> wrote: > + val = SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SCC;
We probably want a patch on top to fix the SCC typo (should be SSC, Spread Spectrum Clock). There's also some fiddly bit with CPU Vs PCH SSC sources, but this can be a later addition. Reviewed-by: Damien Lespiau <damien.lesp...@intel.com> -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
