On Fri, Oct 5, 2012 at 4:06 PM, Paulo Zanoni <przan...@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zan...@intel.com> > > And also properly wait for its idle bit. > > You may notice that DDI_BUF_CTL is enabled in .enable but disabled in > .post_disable instead of .disable. Yes, the mode set sequence is not > exactly symmetrical, but let's assume the spec is correct unless we > can prove it's wrong. > > Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Reviewed-by: Damien Lespiau <damien.lesp...@intel.com> -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
