Re: [Intel-gfx] [PATCH 2/2] drm/dp: Make sink count DP 1.2 aware

2012-09-20 Thread Paulo Zanoni
2012/9/20 Adam Jackson : > Signed-off-by: Adam Jackson Reviewed-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_dp.c |9 - > include/drm/drm_dp_helper.h |3 ++- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers

[Intel-gfx] [PATCH 5/5] drm/i915: extract intel_set_pipe_timings from crtc_mode_set

2012-09-20 Thread Paulo Zanoni
From: Paulo Zanoni Version 2: call intel_set_pipe_timings from both i9xx_crtc_mode_set and ironlake_crtc_mode_set, instead of just ironlake, as requested by Daniel Vetter. The problem caused by calling this function from i9xx_crtc_mode_set too is that now on i9xx we write to PIPESRC before writi

[Intel-gfx] [PATCH 4/5] drm/i915: remove unused variables from ironlake_crtc_mode_set

2012-09-20 Thread Paulo Zanoni
From: Paulo Zanoni The last patches moved a lot of code from ironlake_crtc_mode_set to sub-functions, so these variables became useless. You could get warnings by enabling -Wunused-but-set-variable. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 21 +++

[Intel-gfx] [PATCH 3/5] drm/i915: extract compute_dpll from ironlake_crtc_mode_set

2012-09-20 Thread Paulo Zanoni
From: Paulo Zanoni Too many lines just to compute the value of a single variable, so move this to its own function. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_display.c | 165 +- 1 file changed, 105 insertions(+), 60 deletions(-) diff --git a/d

[Intel-gfx] [PATCH 2/5] drm/i915: extract set_m_n from ironlake_crtc_mode_set

2012-09-20 Thread Paulo Zanoni
From: Paulo Zanoni The set_m_n code was spread all over the mode_set function. Version 2: Don't set the DP M/N registers on ironlake_set_m_n. Daniel Vetter has plans to add some encoder-specific callbacks. Also, on this version we don't change the order we're writing the registers, making the co

[Intel-gfx] [PATCH 1/5] drm/i915: don't recheck for invalid pipe bpp

2012-09-20 Thread Paulo Zanoni
From: Paulo Zanoni As noticed by Daniel Vetter, intel_pipe_choose_bpp_dither should already check for invalid bpp values and set a valid value, so remove the recheck inside ironlake_crtc_mode_set and also replace a "default" switch case inside ironlake_set_pipeconf with a BUG(). Signed-off-by: P

[Intel-gfx] [PATCH 0/5] Rework ironlake_crtc_mode_set V2

2012-09-20 Thread Paulo Zanoni
From: Paulo Zanoni Hi Here are the missing patches that received review during the last week. - Patch 0001 is the follow up requested by Daniel on his reply to the previous patch 0001. - Patch 0002 is just a new version with the comments from Daniel applied. - Patch 0003 is new, but we ca

[Intel-gfx] [PATCH 2/2] drm/dp: Make sink count DP 1.2 aware

2012-09-20 Thread Adam Jackson
Signed-off-by: Adam Jackson --- drivers/gpu/drm/i915/intel_dp.c |9 - include/drm/drm_dp_helper.h |3 ++- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 813b771..00f99e5 100644 --- a/driver

[Intel-gfx] [PATCH 1/2] drm/dp: Document DP spec versions for various DPCD registers

2012-09-20 Thread Adam Jackson
Note with a comment anything newer than DP 1.1a. Obviously this needs some work still... Signed-off-by: Adam Jackson --- include/drm/drm_dp_helper.h | 52 ++ 1 files changed, 32 insertions(+), 20 deletions(-) diff --git a/include/drm/drm_dp_helper.h b/

Re: [Intel-gfx] [PATCH 2/4] drm/dp: Update DPCD defines

2012-09-20 Thread Adam Jackson
On 9/20/12 10:10 AM, Paulo Zanoni wrote: 2012/9/18 Adam Jackson : Sources: DP, eDP, and DP interop specs, and a VESA slideshow about DP 1.2 for the MST bits. All I needed to review every bit was DP spec version 1.2. Lucky you! I don't have a copy. +#define DP_SINK_COUNT

Re: [Intel-gfx] [PATCH 2/4] drm/dp: Update DPCD defines

2012-09-20 Thread Paulo Zanoni
Hi See below: 2012/9/18 Adam Jackson : > Sources: DP, eDP, and DP interop specs, and a VESA slideshow about DP > 1.2 for the MST bits. All I needed to review every bit was DP spec version 1.2. > > Tested-by: Takashi Iwai > Signed-off-by: Adam Jackson > --- > include/drm/drm_dp_helper.h | 6

[Intel-gfx] Updated -testing

2012-09-20 Thread Daniel Vetter
Hi all, New code to beat on! Highlights: - rework of the gem backing pages handling (preps for stolen mem handling) from Chris - cpu freq interface in sysfs from Ben - cpu edp fixes and some related cleanups - write-combining ptes for pre-gen6 (Chris) - basic CADL support (Peter Wu) - some more

Re: [Intel-gfx] [PATCH 3/4] drm/i915/dp: Fetch downstream port info if needed during DPCD fetch

2012-09-20 Thread Jani Nikula
On Tue, 18 Sep 2012, Adam Jackson wrote: > v2: Fix parenthesis mismatch, spotted by Jani Nikula > > Tested-by: Takashi Iwai > Signed-off-by: Adam Jackson > --- > drivers/gpu/drm/i915/intel_dp.c | 25 - > 1 files changed, 20 insertions(+), 5 deletions(-) > > diff --git

Re: [Intel-gfx] [PATCH] drm/i915: Fix !CONFIG_PM sysfs for real this time

2012-09-20 Thread Daniel Vetter
On Wed, Sep 19, 2012 at 10:50:19AM -0700, Ben Widawsky wrote: > Somehow this hunk got dropped from my last patch. We do not have the > rc6_attrs when there is no CONFIG_PM so this causes a compilation error. > > Reported-by: Fengguang Wu > Signed-off-by: Ben Widawsky Queued for -next, thanks for

Re: [Intel-gfx] [PATCH] drm/i915: Assert that the exec object lookup table is a power-of-two

2012-09-20 Thread Daniel Vetter
On Tue, Sep 18, 2012 at 10:04:02AM +0100, Chris Wilson wrote: > As we make the simplification of using a power-of-two size for the > execbuffer handle-to-object TLB, we should validate that this is actually > true and so clarify that premise. > > Signed-off-by: Chris Wilson Queued for -next, than

[Intel-gfx] [regression] 3.6-rc6, gpu hang with vaapi

2012-09-20 Thread Guilherme M. Schroeder
Hi, I get a GPU hang every time i play an mkv using mplayer -vo vaapi with 3.6-rc6. With 3.5.4 no GPU hang at all. I'm using xf86-video-intel 2.20.8, xorg-server 1.12.4 and libva-1.1.0 on Intel(R) Sandybridge Mobile (GT2+). On dmesg, i915_error_state and Xorg.0.log: [ 105.822821] [drm:i915_han

Re: [Intel-gfx] [PATCH] drm/i915: WARN if asked to wait on an impossible future seqno

2012-09-20 Thread Daniel Vetter
On Thu, Sep 20, 2012 at 10:42 AM, Chris Wilson wrote: > On the hunt for an indefinite __wait_seqno() the most likely cause being > asked to wait upon a future seqno, we can lay a trap and see if anything > gets caught. > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_gem.c |

Re: [Intel-gfx] [PATCH] drm/i915: Flush pending operations to the CRTC prior to modeset

2012-09-20 Thread Daniel Vetter
On Thu, Sep 20, 2012 at 10:56 AM, Chris Wilson wrote: > We need to wait for pending operations on the CRTC to retire before we > can modify the CRTC. For example, if userspace has queued a batch that > uses a WAIT_FOR_EVENT associated with the current FB, we can not modify > the pipe with that out

[Intel-gfx] [PATCH] drm/i915: Flush pending operations to the CRTC prior to modeset

2012-09-20 Thread Chris Wilson
We need to wait for pending operations on the CRTC to retire before we can modify the CRTC. For example, if userspace has queued a batch that uses a WAIT_FOR_EVENT associated with the current FB, we can not modify the pipe with that outstanding, as we may then prevent that WAIT_FOR_EVENT from ever

[Intel-gfx] [PATCH] drm/i915: WARN if asked to wait on an impossible future seqno

2012-09-20 Thread Chris Wilson
On the hunt for an indefinite __wait_seqno() the most likely cause being asked to wait upon a future seqno, we can lay a trap and see if anything gets caught. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_gem.c |6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/

Re: [Intel-gfx] [PATCH] drm/i915: Wait upon the last request seqno, rather than a future seqno

2012-09-20 Thread Chris Wilson
On Thu, 20 Sep 2012 09:49:19 +0200, Daniel Vetter wrote: > On Wed, Sep 19, 2012 at 04:08:51PM +0100, Chris Wilson wrote: > > In commit 69c2fc891343cb5217c866d10709343cff190bdc > > Author: Chris Wilson > > Date: Fri Jul 20 12:41:03 2012 +0100 > > > > drm/i915: Remove the per-ring write list

Re: [Intel-gfx] [PATCH] drm/i915: Wait upon the last request seqno, rather than a future seqno

2012-09-20 Thread Daniel Vetter
On Wed, Sep 19, 2012 at 04:08:51PM +0100, Chris Wilson wrote: > In commit 69c2fc891343cb5217c866d10709343cff190bdc > Author: Chris Wilson > Date: Fri Jul 20 12:41:03 2012 +0100 > > drm/i915: Remove the per-ring write list > > the explicit flush was removed from i915_ring_idle(). However, w

Re: [Intel-gfx] [PATCH 3/8] drm/i915: extract set_pipe_timings from ironlake_crtc_mode_set

2012-09-20 Thread Daniel Vetter
On Wed, Sep 19, 2012 at 03:11:33PM -0300, Paulo Zanoni wrote: > Hi > > 2012/9/12 Daniel Vetter : > > On Wed, Sep 12, 2012 at 10:06:31AM -0300, Paulo Zanoni wrote: > >> From: Paulo Zanoni > >> > >> Signed-off-by: Paulo Zanoni > > > > Hm, I think we should extract the same code from i9xx_crtc_set_