Hi
2012/1/26 Daniel Vetter :
> Hi all,
>
> http://cgit.freedesktop.org/~danvet/drm/log/?h=interlaced
>
I just tested your patch set and it didn't work: my monitor reported
1920x539@50Hz. We're missing something from patch "fixup interlace
vertical timings confusion". The reg dump is attached.
By
On Thu, Jan 26, 2012 at 11:22 PM, Daniel Vetter wrote:
>
> git://people.freedesktop.org/~danvet/drm interlaced
Thank you Daniel,
is it normal that is super-slow? git repors 1K/sec. I download about
10 MB so far...
alfonso
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Intel-gfx mailing list
In
On Thu, Jan 26, 2012 at 11:10:32PM +0100, Alfonso Fiore wrote:
> >
> > It's a complete new git tree, so you need to clone it and the again check
> > out the branch. About testing, this contains all the patches I've already
> > posted and hence hopefully fixes all your issues. If you need further
>
On Thu, Jan 26, 2012 at 10:03:02PM +, Chris Wilson wrote:
> On Thu, 26 Jan 2012 22:01:30 +0100, Daniel Vetter
> wrote:
> > - /* XXX some encoders set the crtcinfo, others don't.
> > -* Obviously we need some form of conflict resolution here...
> > -*/
> > - if (adjusted_mode->crtc
>
> It's a complete new git tree, so you need to clone it and the again check
> out the branch. About testing, this contains all the patches I've already
> posted and hence hopefully fixes all your issues. If you need further
> help, please ask on irc, that's quicker.
>
can you please just tell me
On Thu, 26 Jan 2012 22:01:30 +0100, Daniel Vetter
wrote:
> - /* XXX some encoders set the crtcinfo, others don't.
> - * Obviously we need some form of conflict resolution here...
> - */
> - if (adjusted_mode->crtc_htotal == 0)
> + /* gen2 needs vertical crtc timing informati
On Thu, Jan 26, 2012 at 10:38:47PM +0100, Alfonso Fiore wrote:
> Hi Daniel,
> first of all thanks a lot for the effort!
> I'll be more than happy to test your work (both patches you sent
> today), but can you please write the code to download and apply these
> patches?
> Please consider I have alre
Dear Intel-gfx folks,
Am Donnerstag, den 26.01.2012, 22:01 +0100 schrieb Daniel Vetter:
> I've had tons of fun reading through docs and code to get to the bottom of
> who interlaced is supposed to work. The current work-in-progress is available
> at:
>
> http://cgit.freedesktop.org/~danvet/drm/
Hi Daniel,
first of all thanks a lot for the effort!
I'll be more than happy to test your work (both patches you sent
today), but can you please write the code to download and apply these
patches?
Please consider I have already download and compiled both trees.
Which git do they appy to? (Peter's p
From: Peter Ross
Signed-off-by: Peter Ross
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_hdmi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 64541f7..086288e 100644
--- a/dri
From: Peter Ross
Signed-off-by: Peter Ross
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_sdvo.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 5b480bb..80fb5da 100644
--- a/dri
According to Paulo Zanoni, this is what windows does.
Signed-Off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index be078cb..8d6ed5
We have a pretty decent confusion about vertical timings of interlaced
modes. Peter Ross has written a patch that makes interlace modes work
on a lot more platforms/output combinations by doubling the vertical
timings.
The issue with that patch is that core drm _does_ support specifying
whether we
Hi all,
I've had tons of fun reading through docs and code to get to the bottom of
who interlaced is supposed to work. The current work-in-progress is available
at:
http://cgit.freedesktop.org/~danvet/drm/log/?h=interlaced
The patches are completely untested because I lack a TV. So testing feedb
An identical patch has been merged for i9xx_crtc_mode_set:
ommit 59df7b1771c150163e522f33c638096ab0efbf42
Author: Christian Schmidt
Date: Mon Dec 19 20:03:33 2011 +0100
drm/intel: Fix initialization if startup happens in interlaced mode [v2]
But that one neglected to fix up the ironlake+
- Clarify which bits are for which chips.
- Note that gen2 can't do interlaced directly (only via sdvo tv chips).
- Move the mask to the top to make it clearer how wide this field is.
- Add defintions for all possible values.
This patch doesn't change anything, I still have to figure out how
inter
On Thu, 26 Jan 2012 06:54:48 -0500, Joel Heaton wrote:
> System: Dell Inspiron One
> Chipset: intel H61 Express
> CPU: Intel Pentium Dual Core Intel Core i3/i5i7 (this machine is
> probably an i3
> Video: Intel HD/HD 2000/HD 3000
> Max Resolution: 1920x1080
> OS-1 Windows 7 (shipped with this OS)
On Tue, 8 Nov 2011 23:17:34 +, Chris Wilson
wrote:
> Enabling FBC is causing the BLT ring to run between 10-100x slower than
> normal and frequently lockup. The interim solution is disable FBC once
> more until we know why.
I've pushed this to drm-intel-fixes-next (we're currently waiting
On Thu, 26 Jan 2012 15:31:38 +0100, Daniel Vetter wrote:
> Hi Keith, looks like I've forgotten to add you to the cc list. Can you
> pick this one up for -fixes?
Will do.
--
keith.pack...@intel.com
pgpoBvQeb8f8i.pgp
Description: PGP signature
___
In
- Clarify which bits are for which chips.
- Note that gen2 can't do interlaced directly (only via sdvo tv chips).
- Move the mask to the top to make it clearer how wide this field is.
- Add defintions for all possible values.
This patch doesn't change anything, I still have to figure out how
inter
An identical patch has been merged for i9xx_crtc_mode_set:
ommit 59df7b1771c150163e522f33c638096ab0efbf42
Author: Christian Schmidt
Date: Mon Dec 19 20:03:33 2011 +0100
drm/intel: Fix initialization if startup happens in interlaced mode [v2]
But that one neglected to fix up the ironlake+
On Thu, Jan 26, 2012 at 02:19:47PM +0100, Paul Menzel wrote:
> Am Donnerstag, den 26.01.2012, 06:54 -0500 schrieb Joel Heaton:
> > System: Dell Inspiron One
> > Chipset: intel H61 Express
> > CPU: Intel Pentium Dual Core Intel Core i3/i5i7 (this machine is
> > probably an i3
> > Video: Intel HD/HD
On Tue, Jan 17, 2012 at 16:12, Daniel Vetter wrote:
> On Tue, Jan 17, 2012 at 12:16, Chris Wilson wrote:
>> On Tue, 17 Jan 2012 11:57:05 +0100, Daniel Vetter wrote:
>>> On Tue, Nov 08, 2011 at 11:17:34PM +, Chris Wilson wrote:
>>> > Enabling FBC is causing the BLT ring to run between 10-100x
On Wed, Jan 25, 2012 at 03:46:51PM +, Chris Wilson wrote:
> The actual refactoring patch are also ok, though I'd like for Daniel
> to scope out who owns the seqno vs the request, especially in the light
> of no-more-domains...
I've thought a bit more about this and one great upside of seqnos o
On Thu, Jan 26, 2012 at 01:42:02PM +, Chris Wilson wrote:
> On Thu, 26 Jan 2012 11:41:11 +0100, Daniel Vetter
> wrote:
> > The locking in our setup and teardown paths is rather arbitrary, but
> > generally we try to protect gem stuff with dev->struct_mutex. Further,
> > the ums/gem ioctl to s
On Thu, 26 Jan 2012 11:41:11 +0100, Daniel Vetter
wrote:
> The locking in our setup and teardown paths is rather arbitrary, but
> generally we try to protect gem stuff with dev->struct_mutex. Further,
> the ums/gem ioctl to setup gem _does_ take the look. So fix up this
> benign inconsistency.
I
Dear Joel,
Am Donnerstag, den 26.01.2012, 06:54 -0500 schrieb Joel Heaton:
> System: Dell Inspiron One
> Chipset: intel H61 Express
> CPU: Intel Pentium Dual Core Intel Core i3/i5i7 (this machine is
> probably an i3
> Video: Intel HD/HD 2000/HD 3000
> Max Resolution: 1920x1080
> OS-1 Windows 7 (s
System: Dell Inspiron One
Chipset: intel H61 Express
CPU: Intel Pentium Dual Core Intel Core i3/i5i7 (this machine is
probably an i3
Video: Intel HD/HD 2000/HD 3000
Max Resolution: 1920x1080
OS-1 Windows 7 (shipped with this OS)
OS-2 Debian Sid liquorix kernel 3.2
DE: lxde no DM I start x
The locking in our setup and teardown paths is rather arbitrary, but
generally we try to protect gem stuff with dev->struct_mutex. Further,
the ums/gem ioctl to setup gem _does_ take the look. So fix up this
benign inconsistency.
Notice while reading through code.
Signed-Off-by: Daniel Vetter
--
On Mon, Jan 23, 2012 at 03:30:02PM -0800, Ben Widawsky wrote:
> This is only relevant when using module unloading, and really only helps
> get rid of a probably benign warning.
>
> I can't remember if I sent this out already, but it's not turning up in
> any of my searches.
>
> Signed-off-by: Ben
On Wed, Jan 25, 2012 at 03:33:24PM -0800, Ben Widawsky wrote:
> On 01/25/2012 03:31 PM, Daniel Vetter wrote:
> > On Wed, Jan 25, 2012 at 01:58:47PM -0800, Ben Widawsky wrote:
> >> On 01/24/2012 11:17 PM, Ben Widawsky wrote:
> >>> Revusion. Fail. null
> >>>
> >>>
> >> To clarify for posterity. I me
Hi All,
I'm closing this one out as a Motherboard/CPU fault...
I installed Windows 7 on a spare drive and it crashed before installing the
GPU drivers and again (much later) after the GPU drivers had been installed.
Also, I've had one hang when running with an nVidia G210 PCIe card and the
i915
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