On Thu, 26 Jan 2012 22:01:30 +0100, Daniel Vetter <daniel.vet...@ffwll.ch>
wrote:
> - /* XXX some encoders set the crtcinfo, others don't.
> - * Obviously we need some form of conflict resolution here...
> - */
> - if (adjusted_mode->crtc_htotal == 0)
> + /* gen2 needs vertical crtc timing information in fields because that's
> + * what dvo outputs want - the chip itself can't do interlaced. All
> + * later generations can do interlaced natively and want timings in
> + * full frames. */
> + if (IS_GEN2(dev))
> + drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
> + else
> drm_mode_set_crtcinfo(adjusted_mode, 0);
>
> diff --git a/drivers/gpu/drm/i915/intel_dvo.c
> b/drivers/gpu/drm/i915/intel_dvo.c
> index 6eda1b5..020a7d7 100644
> --- a/drivers/gpu/drm/i915/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/intel_dvo.c
> @@ -157,7 +157,6 @@ static bool intel_dvo_mode_fixup(struct drm_encoder
> *encoder,
> C(vsync_end);
> C(vtotal);
> C(clock);
> - drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
> #undef C
> }
Removing drm_mode_set_crtcinfo() scares me because of the above comment.
We need to make sure that the adjusted_mode is initialised along
some path, and the fixup in intel_crtc_mode_fixup is just a hack.
commit 897493504addc5609f04a2c4f73c37ab972c29b2
Author: Chris Wilson <ch...@chris-wilson.co.uk>
Date: Sun Sep 12 18:25:19 2010 +0100
drm/i915: Ensure that the crtcinfo is populated during mode_fixup()
This should fix the mysterious mode setting failures reported during
boot up and after resume, generally for i8xx class machines.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=16478
Reported-and-tested-by: Xavier Chantry <chantry.xav...@gmail.com>
Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29413
Tested-by: Daniel Vetter <dan...@ffwll.ch>
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: sta...@kernel.org
If you can work out exactly where it should be initialised, you'll be my
hero!
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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