[Intel-gfx] [PATCH v2] drm/i915: set scanout buffer as uncached on Sandybridge

Display engine on Sandybridge is not coherent with LLC, so try to always bind display buffer as uncached on Sandybridge. Old AGP_USER_MEMORY is bound as uncached by default, as Sandybridge buffer would try to live in LLC with CPU as possible, so it uses new flag AGP_USER_UNCACHED_MEMORY for uncache

Re: [Intel-gfx] [PATCH] enable blt acceleration on gen6

>>-Original Message- >>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] >>Sent: 2010年10月27日 17:08 >>To: Zou, Nanhai; intel-gfx@lists.freedesktop.org >>Subject: Re: [Intel-gfx] [PATCH] enable blt acceleration on gen6 >> >>On Wed, 27 Oct 2010 14:47:32 +0800, Zou Nan hai wrote: >>> uxa:

Re: [Intel-gfx] [patch] i915: signedness bug in check_overlay_src()

On Wed, 27 Oct 2010 23:17:25 +0200, Dan Carpenter wrote: > "depth" should be signed in case packed_depth_bytes() returns -EINVAL. > > This probably doesn't make a difference at runtime. In the original > code we would return -EINVAL later if (rec->offset_Y % 4294967274) is > non-zero. Applied t

Re: [Intel-gfx] [PATCH] enable blt acceleration on gen6

On Wed, 27 Oct 2010 14:47:32 +0800, Zou Nan hai wrote: > uxa: enable blt acceleration on gen6 hardware. That's pretty close to what I had in mind. I thought adding intel_batch_set_mode(BLT), intel_batch_set_mode(RENDER) etc a bit more explicit. That gives us a single point at which we can detect