>>-----Original Message----- >>From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] >>Sent: 2010年10月27日 17:08 >>To: Zou, Nanhai; intel-gfx@lists.freedesktop.org >>Subject: Re: [Intel-gfx] [PATCH] enable blt acceleration on gen6 >> >>On Wed, 27 Oct 2010 14:47:32 +0800, Zou Nan hai <nanhai....@intel.com> wrote: >>> uxa: enable blt acceleration on gen6 hardware. >> >>That's pretty close to what I had in mind. I thought adding >>intel_batch_set_mode(BLT), intel_batch_set_mode(RENDER) etc a bit more >>explicit. That gives us a single point at which we can detect a context >>switch and perform workarounds, rather than just continuing to add them ad >>hoc. >> >>e.g. >>static inline void >>intel_batch_set_mode(struct intel_screen_private *intel, int mode) >>{ >> if (mode == intel->batch.mode) >> return; >> >> intel->batch.context_switch(intel, mode); >> intel->batch.mode = mode; >>} >> >>static void >>gen6_batch_context_switch(struct intel_screen_private *intel, >> int mode) >>{ >> intel_batch_flush(intel); >> intel->batch.ring = mode; >>} >> >>static void >>gen5_batch_context_switch(struct intel_screen_private *intel, >> int mode) >>{ >> if (intel->batch.mode == BLT) { >> OUT_BATCH(3D_NP); /* 2D->3D non-pipeling workaround */ >> } >> intel_batch_flush(intel); >>} >> >>void intel_batch_submit(struct intel_screen_private *intel) >>{ >> execbuf.flags |= intel->batch.ring; >> ... >> intel->batch.mode = NONE; >>} >> >>etc. [Forgive me the bit of poetic licence in those snippets.] The only >>nasty side-effect of that is that you need to perform the >>intel_batch_set_mode() in both the prepare and done routines (in case the >>batch is emitted before done()). >> >>Btw, why the 32 NOOP workaround? I haven't stumbled across the reason >>for that yet.
I see in doc the 32 NOOP workaround but it does not tell the reason. Without this some heavy workload like x11perf may hang. Zou Nan hai >> >>Your patch works as advertised with just a s/I915_EXEC_BLIT/I915_EXEC_BLT/. >>-Chris Thanks >> >>-- >>Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx