Re: BSAM Read 31 bit mode

2023-02-23 Thread Joseph Reichman
They could of had had a exlst on the DCBE with xl5 ds x for the code and xl4 for the address -Original Message- From: IBM Mainframe Discussion List On Behalf Of Binyamin Dissen Sent: Sunday, February 19, 2023 10:38 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode

Re: BSAM Read 31 bit mode

2023-02-19 Thread Seymour J Metz
Subject: Re: BSAM Read 31 bit mode Shmuel I looked that up or browsed the macro there is no reference rmode/amode 31 in the macro. I did try sysstate amode64 generated the same code. -Original Message- From: IBM Mainframe Discussion List On Behalf Of Seymour J Metz Sent: Saturday, February

Re: BSAM Read 31 bit mode

2023-02-19 Thread Seymour J Metz
l (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of Paul Gilmartin [042bfe9c879d-dmarc-requ...@listserv.ua.edu] Sent: Sunday, February 19, 2023 12:52 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode On

Re: BSAM Read 31 bit mode

2023-02-19 Thread Paul Gilmartin
On Sun, 19 Feb 2023 17:14:14 +, Seymour J Metz wrote: >> THe ICM clears bits 0-7 of the (SYNAD?) address. > >It's the XR that clears bits 0-7, not the ICM. > The combination with a mask of B'0111' limits addressing to 24 bits. It does work in AMODE 31 and 24, but not on a 360. >That's not wh

Re: BSAM Read 31 bit mode

2023-02-19 Thread Seymour J Metz
: Sunday, February 19, 2023 9:37 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote: >The fact that your code is AMODE 31 does not mean that the access method MUST >be above the line. > >The actual expansion had

Re: BSAM Read 31 bit mode

2023-02-19 Thread Seymour J Metz
Reichman [reichman...@gmail.com] Sent: Sunday, February 19, 2023 9:38 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode My mistake was the BALR in AMODE 31 doesn't kill bits 1 - 7 thanks -Original Message- From: IBM Mainframe Discussion List On Behalf Of Binyamin D

Re: BSAM Read 31 bit mode

2023-02-19 Thread Seymour J Metz
Binyamin Dissen [bdis...@dissensoftware.com] Sent: Sunday, February 19, 2023 11:28 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode On Sun, 19 Feb 2023 10:12:31 -0600 Paul Gilmartin <042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote: :>On Sun, 19 Feb 2023 17:37:46

Re: BSAM Read 31 bit mode

2023-02-19 Thread Binyamin Dissen
On Sun, 19 Feb 2023 10:12:31 -0600 Paul Gilmartin <042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote: :>On Sun, 19 Feb 2023 17:37:46 +0200, Binyamin Dissen wrote: :>>: :>>:>With one line more context: :>>:>>:>ICM 15,B'0111',49(R6) :>>:>>:> BALR 14,15 :>>The ICM does not touch 0-7. : :>It d

Re: BSAM Read 31 bit mode

2023-02-19 Thread Paul Gilmartin
On Sun, 19 Feb 2023 17:37:46 +0200, Binyamin Dissen wrote: >: >:>With one line more context: >:>>:>ICM 15,B'0111',49(R6) >:>>:> BALR 14,15 > >The ICM does not touch 0-7. > It doesn't preserve them. >And it is the access method address, not the SYNAD > (These things would be more legible if IBM

Re: BSAM Read 31 bit mode

2023-02-19 Thread Binyamin Dissen
On Sun, 19 Feb 2023 08:37:39 -0600 Paul Gilmartin <042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote: :>On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote: :> :>>The fact that your code is AMODE 31 does not mean that the access method MUST :>>be above the line. : :>>The actual expansion

Re: BSAM Read 31 bit mode

2023-02-19 Thread Joseph Reichman
I believe are below Just wonder if you code an estate if that will get control before open abend -Original Message- From: IBM Mainframe Discussion List On Behalf Of Paul Gilmartin Sent: Sunday, February 19, 2023 9:38 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode

Re: BSAM Read 31 bit mode

2023-02-19 Thread Joseph Reichman
My mistake was the BALR in AMODE 31 doesn't kill bits 1 - 7 thanks -Original Message- From: IBM Mainframe Discussion List On Behalf Of Binyamin Dissen Sent: Sunday, February 19, 2023 5:16 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode The fact that your co

Re: BSAM Read 31 bit mode

2023-02-19 Thread Paul Gilmartin
On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote: >The fact that your code is AMODE 31 does not mean that the access method MUST >be above the line. > >The actual expansion had an XR 15,15 before the ICM. > >Why do you think that there is an issue? BALR does not change the AMODE. > With o

Re: BSAM Read 31 bit mode

2023-02-19 Thread Joseph Reichman
-MAIN@LISTSERV.UA.EDU Subject: Re: BSAM Read 31 bit mode What is on your SYSSTATE? -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of Joseph Reichman [reichman...@gmail.com

Re: BSAM Read 31 bit mode

2023-02-19 Thread Binyamin Dissen
The fact that your code is AMODE 31 does not mean that the access method MUST be above the line. The actual expansion had an XR 15,15 before the ICM. Why do you think that there is an issue? BALR does not change the AMODE. On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman wrote: :>Hi :> :> :

Re: BSAM Read 31 bit mode

2023-02-18 Thread Seymour J Metz
@LISTSERV.UA.EDU Subject: BSAM Read 31 bit mode Hi I see this documentation from IBM Addressing mode: When you issue the READ macro in 24-bit mode, provide only 24-bit addresses unless you code SF64 or SF64P. When you issue the READ macro in 31-bit addressing mode, provide only 31-bit addresses

Re: BSAM Read 31 bit mode

2023-02-17 Thread Michael Stein
On Fri, Feb 17, 2023 at 03:35:35PM -0500, Joseph Reichman wrote: > And yet my read macro expands to ICM 15,B'0111',49(R6) > > BALR 14,15 I can't see your read macro call, but if it's inline the macro is going to generate the DECB inline with the code. Since the DECB must be 24 bit addressa

BSAM Read 31 bit mode

2023-02-17 Thread Joseph Reichman
Hi I see this documentation from IBM Addressing mode: When you issue the READ macro in 24-bit mode, provide only 24-bit addresses unless you code SF64 or SF64P. When you issue the READ macro in 31-bit addressing mode, provide only 31-bit addresses unless documentation says otherwise or you