Re: [gem5-users] Cache line size

sers mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] modifying garnet routing

Hi all, I intend to simulate a CMP machine. In this machine, intra-chip network is mesh. But, I'm going to modify the way that garnet routes packets. I wonder could you tell me where my considered routing method can be implemented? Regards, ___ gem5-use

Re: [gem5-users] interconnection network between l1 and l2

Dear Jafari, You are able to determine l2 nodes from other nodes by considering their types. The type of l2 nodes are l2cache_controller. Regards, On Jan 18, 2015 8:37 PM, "Bahareh Jafari via gem5-users" < gem5-users@gem5.org> wrote: > Hi > > I am implementing my topology .. > in my topology ,eac

[gem5-users] Defining smart network in Gem5

Hi all, I am studying about intra-chip network connection in CMPs at the moment. So, I should not only able to define new network topologies, but also implement smart networks in Gem5. Routers and connections in smart networks are different from those of typical networks. For example, connections

[gem5-users] gem5 simulation speed

Hi all, I am working on CMP scheduling. My runs must be long, so I need a simulator which it's simulation speed is high. Therefore, I want to know how many instructions per second can Gem5+ruby simulate? Thanks ___ gem5-users mailing list gem5-users@gem

Re: [gem5-users] move threads to another cpu

> gem5-users mailing list > > gem5-users@gem5.org > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -

Re: [gem5-users] Adding a few changes to gem5 repository

> > > > > On Wed, May 16, 2012 at 1:00 PM, Hamid Reza Khaleghzadeh < > khaleghza...@gmail.com> wrote: > >> Hello, >> >> Diff command syntax is "diff source_file modified file > path_file". >> But I review a few diff files which

[gem5-users] multi-threaded applications for ALPHA SE

Hello, As you know ALPHA SE mode is not able to run multi-threaded applications which written by PThread library. So, I wrote a simple multi-threaded application by Parmacs library, and ran the application as following: ./gem5.fast ~/gem5/configs/example/se.py -n2 -c ~/myApp But I encountered wi

[gem5-users] Question about MOESI_CMP_token

Hi all, As you know MOESI_CMP_token models a two-level cache hierarchy. I intend to simulate Intel Clovertown quad-core processor. Clovertown is a multi-packaged CMP which consists of two dual-core processors and each package has a shared L2 cache. Could you tell me Clovertown can be simulated by

[gem5-users] Question about MOESI_CMP_token

Hi all, As you know MOESI_CMP_token models a two-level cache hierarchy. I intend to simulate Intel Clovertown quad-core processor. Clovertown is a multi-packaged CMP which consists of two dual-core processors and each package has a shared L2 cache. Could you tell me Clovertown can be simulated by

Re: [gem5-users] gem5 versus MARSS

ere an established benchmark > to run? > > ** ** > > Kindly, > > ** ** > > ** ** > > Ben Payne > > ** ** > > *From:* gem5-users-boun...@gem5.org [mailto:gem5-users-boun...@gem5.org] *On > Behalf Of *Hamid Reza Khaleghzadeh > *Sent:* Tues

Re: [gem5-users] gem5 versus MARSS

and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] Running my own binaries in gem5

m5-users@gem5.org <mailto:gem5-users@gem5.org> >>> >>> >>> http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> >>> >>> >>> >>> >>> __**_ >>> gem5-users mailing list >>> gem5-users@gem5.org >>> http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> >>> >>> >> __**_ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> >> > > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] Reseting the stats

t in my program. > > How can I that? > > ** ** > > Thanks, > > Yuval > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.web

Re: [gem5-users] Problem with ruby

the MOESI_CMP_token protocol? > > > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com

Re: [gem5-users] ALPHA_FS problem -Could not load kernel file-

elocal/abbas/gem5-stable/dist/disks/binaries/vmlinux >  @ cycle 0 > [System:build/ALPHA_FS/sim/system.cc, line 129] > Memory Usage: 220708 KBytes > abbas@fake:~/gem5-stable> -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] single chip vs. multiple chips

Hello, MOESI and MESI protocols are described in http://www.gem5.org/Ruby as following: 1. *MESI_CMP_directory*: single chip 2. *MOESI_CMP_directory*: multiple chips I have a few questions. I would be thankful if answer me. I want to know what is difference between single chip and multip

[gem5-users] Question about MOESI_CMP_directory

Hi, *MOESI_CMP_directory* is defined as following: *MOESI_CMP_directory*: multiple chips, 2-level caches, non-inclusive (neither strictly inclusive nor exclusive) hierarchy. Could you tell me what is the meaning of neither strictly inclusive nor exclusive? I'm going to simulate Intel Clovertown

[gem5-users] Inclusive OR exclusive cache

Hello, I am using ALPHA_FS for simulating. Used cache coherency protocol in my work is MOESI_CMP_token. May I know L2 cache is Inclusive or Exlusive? Thanks. ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-

Re: [gem5-users] Problem with ruby

ther > than "TOPOLOGY=MOESI_CMP_token" > > Tao > > > On 05/18/2012 01:04 PM, Hamid Reza Khaleghzadeh wrote: > > I have compile Gem5 as following: > scons ~/build/ALPHA/gem5.opt RUBY=True TOPOLOGY=MOESI_CMP_token > > Also, ruby.stats and stats.txt are att

Re: [gem5-users] Problem with ruby

I have using MOESI_CMP_token which support L2 cahce On Fri, May 18, 2012 at 9:11 PM, Nilay Vaish wrote: > On Fri, 18 May 2012, Hamid Reza Khaleghzadeh wrote: > > Hi, >> >> I found that ruby doesn't create L2 cache. I run execute gem5 as >> following: &

Re: [gem5-users] Problem with ruby

Excuse me, I forgot to determine that architecture is ALPH. Also, I cannot see any system.l2_cntrl. in ruby.stats. Sorry to bother you On Fri, May 18, 2012 at 8:39 PM, Hamid Reza Khaleghzadeh < khaleghza...@gmail.com> wrote: > Hi, > > I found that ruby doesn't create L2

[gem5-users] Problem with ruby

Hi, I found that ruby doesn't create L2 cache. I run execute gem5 as following: ./gem5.opt ruby_fs.py --caches --l2cache --l2_cachesize=32MB But I cannot find any system.l2_cntrl. Could you tell me why? ___ gem5-users mailing list gem5-users@gem5.org ht

[gem5-users] Add new option to ruby

Hi, I'm going to make a new network topology. The topology needs a few input parameters (like mesh_rows for Mesh). So, Could you tell me how I can add these options to Ruby? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin

Re: [gem5-users] Problem with creating diff file

t. I > will copy the script below. > > /sbin/m5 dumpstats > /sbin/m5 resetstats > echo "Done :D" > /sbin/m5 exit > /sbin/m5 exit > > Did I miss something? > > -- > Hongil > > > On 05/17/2012 12:43 AM, Hamid Reza Khaleghzadeh wrote: > >&

Re: [gem5-users] Creating diff file for gem5 review board

> * If you want to update a review, you go to review board and figure out >> what number it is (I get that from the URL, but it may also be somewhere >> else) and then, if that number is 123 for example, run this command: >> hg postreview -u -e 123 -o >> >> >> &g

Re: [gem5-users] Creating diff file for gem5 review board

u want to update a review, you go to review board and figure out >> what number it is (I get that from the URL, but it may also be somewhere >> else) and then, if that number is 123 for example, run this command: >> hg postreview -u -e 123 -o >> >> >> >> >> On Thu,

[gem5-users] Creating diff file for gem5 review board

Hello, I have created a diff as following: "diff -ru Gem5_source_code modified_Gem5_source_code > Patch_file" I apply the patch file to Gem5_source_code and it can modify source code correctly. But there is a problem when the patch file is uploaded to Gem5 review board by Web UI. I encounter

Re: [gem5-users] Problem with creating diff file

d in what directory, are you attempting to apply the > patch? > > Something like > > 'cd a; patch -p1 < ../modify.patch' > > Should be what you want. If you just made it, I don't see how you could > have an incorrect patch. > > > > On Thu,

[gem5-users] Problem with creating diff file

Hello, I have modified Gem5 source code. For creating diff file, main Gem5 source code has been copied in folder "a" and modified one into folder "b". I have created patch file as following: "diff -ru a/ b/ > modify.patch" but when this patch is executed as dry-run, there are a few errors. C

Re: [gem5-users] Adding a few changes to gem5 repository

h). Could you tell me how this syntax legitimated? Thanks On Wed, May 16, 2012 at 9:10 PM, Hamid Reza Khaleghzadeh < khaleghza...@gmail.com> wrote: > Thanks for reply. Could you tell me what is ef18d64a1fb4 and 76831ae2c840 > in following command? > > diff -r ef18d64a1fb4 -r 76831a

Re: [gem5-users] Adding a few changes to gem5 repository

h-file-using-patch-and-diff/ > > On 5/16/12, Hamid Reza Khaleghzadeh wrote: > > Hello > > > > I am going to know how diff file can be created?\ > > > > Thanks > > > > On Tue, May 15, 2012 at 10:55 PM, Steve Reinhardt > wrote: > > > >&

Re: [gem5-users] Adding a few changes to gem5 repository

x27;s also more extensive documentation on reviewboard here: > http://www.reviewboard.org/docs/manual/1.6/users/review-requests/ > > > On Tue, May 15, 2012 at 11:10 AM, Hamid Reza Khaleghzadeh < > khaleghza...@gmail.com> wrote: > >> Hello, >> >> Thanks for your

Re: [gem5-users] Adding a few changes to gem5 repository

if you haven't already) and > upload your patch there for review. > > Steve > > On Tue, May 15, 2012 at 8:03 AM, Hamid Reza Khaleghzadeh < > khaleghza...@gmail.com> wrote: > >> Hello, >> >> I have modified Gem5 source code so that ruby stats is rese

[gem5-users] Adding a few changes to gem5 repository

Hello, I have modified Gem5 source code so that ruby stats is reset and dumped when gem5 stats is reset and dumped, too. Could you tell me how this changes add to gem5 repository? thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/c

[gem5-users] question about registerResetCallback()

Hello, There is registerResetCallback(callback *) in statistics.cc which adds a callback to resetQueue. It's clear that when stats is reseted, this callback must be executed. Could you tell me how added callbacks to resetQueue are invoked when Gem5 stats is reseted? (in other word, how resetQueue

Re: [gem5-users] Fwd: question about gem5

Dear Black, Thanks for your response, but resetstats() only resets gem5 stats. On 5/13/12, Gabe Black wrote: > This might be what you're looking for: > > http://www.gem5.org/M5ops > > On 05/10/12 23:13, Hamid Reza Khaleghzadeh wrote: >> Hello, >> >> Yo

[gem5-users] Creating action and it's action handler (callback) in Gem5

Hello all, I intend to create an event in Gem5 which is activated when Gem5 stats is dumped. So, I have create a callback queue (it's name is dumpQueue) along with registerDumpCallback(Callback *cb); which add callbacks into dumpQueue. But I don't know how dump event can be created when gem5 stats

[gem5-users] what is virtual time

Hello, In Ruby_stats exists virtual time field. May I know what it is? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Fwd: question about gem5

Hello, You know that gem5 stats can be reset by M5_reset_stat(). I'm going to reset Ruby stats via application. Ruby profiler source codes exist in "gem5/src/mem/ruby/profiler" path. A reset method must be added to Ruby profiler for reseting stats. But I don't know how the function can be invoked

[gem5-users] Find m5_reset_stats()

Hi, Could you tell me where I can find source code of m5_reset_stats()? Thanks -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Reset Ruby stats

Hello, As you know, m5_reset_stats() resets Gem5 stats via application. There are a few files in /home/hamidreza/gem5/src/mem/ruby/profiler which responsible for creating ruby_stats. I am going to reset the ruby stats via application. Could you tell me how this is done? Thanks ___

Re: [gem5-users] Multicores configuration

s and support. >> > Best Regards >> > Wael Amr >> > >> >> >> -- >> // Naderan *Mahmood; >> ___ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh http://hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] reseting ruby stats via m5 resetstats

Hello, Is there any way to reset ruby stats when m5 resetstats is invoked? ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] reset ruby stats

Hi all, As you know, Gem5 stats (stats.txt) can be reset by m5 resetstats. I found that reseting stats in ruby stats (ruby.stat) is not possible. Could you tell me where I can add this facility to Gem5? Thanks ___ gem5-users mailing list gem5-users@gem5

Re: [gem5-users] obtain L2 cache misses

> and i was advised to use performance measurement tools for real system to > see cache misses. > > So have you tried this way ? > > Thanks > Best Regards > Wael Amr > > On Thu, May 3, 2012 at 5:30 PM, Hamid Reza Khaleghzadeh < > khaleghza...@gmail.com> wrote: >

Re: [gem5-users] obtain L2 cache misses

L2 cache controllers. To do that, you'll need to > understand the profiling code src/mem/ruby/profilers/* and the various > "printStats" functions in the ruby objects. > > -Korey > > > On Thu, May 3, 2012 at 10:11 AM, Hamid Reza Khaleghzadeh < > khaleghza...@g

Re: [gem5-users] obtain L2 cache misses

I cannot find any useful information about L2 miss count in this file. On 5/3/12, Nilay Vaish wrote: > On Thu, 3 May 2012, Hamid Reza Khaleghzadeh wrote: > >> Hello guys, >> >> I use ruby_fs.py for simulating a CMP machine. Could you tell me where >> number of L

[gem5-users] obtain L2 cache misses

Hello guys, I use ruby_fs.py for simulating a CMP machine. Could you tell me where number of L2 cache misses can be found? I cannot find any information about L2 cache misses in stats.txt file. ___ gem5-users mailing list gem5-users@gem5.org http://m5sim

[gem5-users] question about m5_reset_stats

Hello, m5_reset_stats resets stats result. May I know whether "m5_reset_stats" resets ruby-stats, too? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Checkpoint problem

Hi, I cannot create any checkpoint when I run gem5 by following command: ./gem5.opt ~/gem5/configs/example/*ruby_fs.py* -n 4 --caches --l2cache --l1i_size=32kB --l1d_size=32kB --num-l2caches=2 --l2_size=16MB By the way, Coherency protocol is MOESI_CMP_token and architecture is ALPHA. Could you

[gem5-users] Question about Exec trace flag

Hello guys, I run gem5 with --debug-flag=exec -ExecKernel (remove base flag ExecKernel from Exec flag). In this case, whether information about the user threads are *only* logged? If your answer is negative, May I know which additional information are logged? __

Re: [gem5-users] Problem with threadID

gem5-users mailing list > > gem5-users@gem5.org > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/l

[gem5-users] Linking error

Hi, There is following error when I want to build gem5. [LINK] -> ALPHA/gem5.opt `.text._ZN6PacketD2Ev' referenced in section `.text._ZN6PacketD1Ev[non-virtual thunk to Packet::~Packet()]' of /home/hamidreza/build/ALPHA/mem/packet.o: defined in discarded section `.text._ZN6PacketD2Ev[_ZN6Pa

[gem5-users] FInd application threadID

Hi, Could you tell me where I can find thread id of user applications? Thasnk ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Access to hard disk

Hi all, Could you tell me there is any way to access to hard disk drives from Gem5 in FS mode? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Adding new disk to Gem5

Hi, I want to access to some big files by FS mode. Therefore, I must create an image and add the files. But, I don't know how this image can be used in Gem5. Could you help me? ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mail

Re: [gem5-users] Multicore Scheduling

id, > can you please explain more how i can determine a thread runs on which > core? > > > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Kha

Re: [gem5-users] Multicore Scheduling

Hi, I think Gem5 is appropriate. In Fs mode, application is executed on Linux. So, threads of the application can be bound to cores by Linux system calls. By the way, In Se mode, you can determine a thread runs on which core. Hope this helpful. On Mon, Apr 23, 2012 at 8:10 AM, Hossein Nikoonia w

[gem5-users] Disabling/enabling debugger during the simulation

Hi all, May I know there is any approach to enable or disable gem5 debugger during the simulation? ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] Problem with running new revision of Gem5

ght not be able to merge your changes with the recent version of > FSConfig .. > > On Tue, Apr 17, 2012 at 12:08 PM, Hamid Reza Khaleghzadeh > wrote: >> Hello dear Mahmood, >> >> It worked. But I have a question. I go to gem5 repository and find >> that this corre

Re: [gem5-users] Problem with running new revision of Gem5

Naderan wrote: > PhysicalMemory -> SimpleMemory > > On 4/16/12, Hamid Reza Khaleghzadeh wrote: >> Hi, >> >> I cannot execute new revision of Gem5 by fs.py script. The problem is: >> >> Traceback (most recent call last): >> File "", line 1,

[gem5-users] Problem with running new revision of Gem5

Hi, I cannot execute new revision of Gem5 by fs.py script. The problem is: Traceback (most recent call last): File "", line 1, in File "/home/hamidreza/gem5/src/python/m5/main.py", line 357, in main exec filecode in scope File "/home/hamidreza/gem5/configs/example/fs.py", line 96, in

[gem5-users] compile time error

Hi, I have updated gem5 but I cannot build it. There are following errors. Could you tell me how the problems can be solved? By the way, I have installed Gem5 on Ubuntu 11.10 (32-bit). In file included from /home/hamidreza/build/ALPHA/base/inifile.hh:40:0, from /home/hamidreza/bu

[gem5-users] Controlling debug by application

Hi all, Could you tell me how debugging in gem5 can be enabled or disabled with application? You know that there are some facilities in Gem5 for restarting and dumping stat results. Are there same facilities for gem5 debugging? ___ gem5-users mailing lis

[gem5-users] Adding new debug flag

Hi all, I have added a debug flag by adding debugflag() command to gem5/src/cpu/SConscript file. I want to use the flag in gem5/src/cpu/exetrace.cc file, But I don't know how to do it. Could you help me? Thanks ___ gem5-users mailing list gem5-users@gem

[gem5-users] Define new debug flag

Hi, I have added a new debug flag to Gem5. Now, Could you tell me how this flag can be accessed in source code? ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Problem with threadID

I have executed a multi-threaded application on Gem5 by Exec debug flag. In the obtained trace file, All threadIDs are T0. How do you legitimize it? ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Question about Exec debug flags

Hello, Could you tell me what the functionality of following flags is? ExecEffAddr, ExecEnable, ExecFaulting, ExecKernel, ExecMicro, ExecOpClass, ExecResult, ExecSymbol, ExecThread, ExecTicks, ExecUser. Thanks ___ gem5-users mailing list gem5-users@gem

[gem5-users] Obtain memory trace by debug flags

Hello, I want to obtain memory trace of multi-threaded applications by Gem5. I think that Exec debug-flag can meet my need. Do you agree with me or you believe that there are better ways? Thanks for your answer in advance. ___ gem5-users mailing list ge

Re: [gem5-users] Question about debug-flags

> gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Question about debug-flags

Hi, As you know, there are various debug flags in Gem5. Could you tell me where I can find function of each of them? Best regards ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] --Ruby option in Ruby

Hello, Ruby has an option called "Ruby". May I know what the option does? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] --Cahces option in Ruby

Hi list, Ruby has an option called "caches". May I know what the option is? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Obtain memory trace

Hi, May I know how I can modify gem5 to log address of all data which accessed by a multi-threaded program? The memory trace must contain information about thread ID, accessed memory address and Access type (read/write). Thanks for your answer in advance -- Hamid Reza Khaleghzadeh

[gem5-users] Checkpoint in ALPHA RUBY_FS

Hi all, I found that in new revision of Gem5, m5 checkpoint doesn't work correctly. Are there any solutions for it? Thanks. ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Error in Set.cc

Hi all, There is an compile time error in Set.cc file, line 357. Please developers correct this error. Thanks. ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] Alpha Ruby Full System: 'm5 checkpoint'

By the way, For finding answer of your question, you can visit flowing URL: http://www.gem5.org/Cache_Coherence_Protocols On Mon, Mar 26, 2012 at 12:39 PM, Hamid Reza Khaleghzadeh < khaleghza...@gmail.com> wrote: > Sorry, I have chosen MOESI_token as coherency protocol. May I know Gem5

Re: [gem5-users] Alpha Ruby Full System: 'm5 checkpoint'

g our > desired protocol? > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org h

Re: [gem5-users] Alpha Ruby Full System: 'm5 checkpoint' Fails

Does it mean we can not take checkpoint with the ruby model full system? >> >> __**_ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> > -- Hamid Reza Khaleghzadeh hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] ERROR Checkpointing in ALPHA full system

OMIC)) { > return Event:Store; > } else { > error("Invalid RubyRequestType"); *HERE is the LINE 221 > > } > } > > > I guess this is because CPU send a wrong type of RubyRequest message > to a L1 cache and I

Re: [gem5-users] A segmentation fault of running ruby memory model

--- > Chuanlei > > _______ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] Problem with FS in new revision of Gem5

Hi all, When I run the latest revision of Gem5 with ruby_fs script (ALPHA_FS), I encounter with Segmentation fault error. Could you help me how I can solve it? Thanks -- Hamid Reza Khaleghzadeh hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5

Re: [gem5-users] pthread, ALPHA_SE

ulti-core ALPHA_SE system, i haven't > found how to do it. Could anyone tell me how to do it? > Thank you. > Kostadinos Parasyris > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-us

[gem5-users] Running New revision Gem5 by ruby_fs.py

ss__.__name__, attr) AttributeError: Class Bus has no parameter master_port Could you help me how this problem can be solved? Thanks -- Hamid Reza Khaleghzadeh hkhaleghzadeh.webs.com ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] New revision Gem5 problem with Ruby

(self.__class__.__name__, attr) > > AttributeError: Class Bus has no parameter master_port > > > .... > > > > > -- > -- > // Naderan *Mahmood; > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- Hamid Reza Khaleghzadeh ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

[gem5-users] New revision Gem5 problem with Ruby

Hi I have built new revision of Gem5. Now, I cannot run Gem5 by Ruby_fs.py script. I set cpu-type to 'timing' or 'detailed', but encounter with following problem. Could you help me? Sorry to bother you.

Re: [gem5-users] "Ruby requires TimingSimpleCPU or O3CPU!!" ERROR

ood Naderan wrote: > that is straight. use either detailed or timing model. If you have an > old revisiosn, --detailed and --timing are used. If you have the > latest revision, --cpu-type=detailed and --cpu-type=timing are > available. > > On 3/5/12, Hamid Reza Khaleghzadeh wrote: >

[gem5-users] "Ruby requires TimingSimpleCPU or O3CPU!!" ERROR

Hi all, I cannot run Gem5 by following command line becuase of encountering with "Ruby requires TimingSimpleCPU or O3CPU!!" error: ./gem5.opt ruby_fs.py -n 4 --l1i_size=32kB --l1d_size=256kB --l2_size=16MB --num-l2caches=2 Could you help me? Thanks. __

[gem5-users] Recording accesed data addresses

Hi I need address of all accessed data by the executed application in ALPHA_FS. I think a recording module must be added to Gem5. The recorder must be able to log threadID, data address and access type (Read/Write). I don't know where I can add this module. Could you help me? _

[gem5-users] Shared L2 cache in Gem5

Hi MOESI_CMP_directory is a coherency protocol that is used in my case. I simulate a multi-core processors which consists of 6 cores. I want to the cmp contains 3 L2 caches and each of them is shared with 2 cores. For this reason, I have implemented an intra-chip network which defines how cores mu

[gem5-users] Number of cahce miss

Hi list, I have simulated a CMP which contains two level caches (L1 and L2). I want to know the number of cache misses that occurs in L2. Could you tell me where I can find my desired information? ___ gem5-users mailing list gem5-users@gem5.org http://m5

[gem5-users] Obtain L2 miss count

Hi I use ruby_fs.py script for running Gem5. Could you tell me where I can find number of L2 cache miss count? Thanks ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Re: [gem5-users] using m5op.h in C Program

and compiling with the alpha cross > compiler? Why wouldnt you use the alpha version? > > > -- > - Korey > > ___ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-

[gem5-users] using m5op.h in C Program

Dear Joel, In slide 78 of isca_pres_2011.pdf, you described instrumenting a benchmark. I have written a C program: #include #include int main() { m5_dump_stats(1,0); printf("hello world\n"); return 0; m5_dump_stats(1,0); } I have compiled this application as following: alphaev6

Re: [gem5-users] using m5op.h in C programs

stats' collect2: ld returned 1 exit status On Fri, Jan 13, 2012 at 5:11 PM, Hamid Reza Khaleghzadeh < khaleghza...@gmail.com> wrote: > Hi > > Assume I want to reset simulation statistics from through a C program. So, > I must add m5op.h header file to the application, and call reset

[gem5-users] using m5op.h in C programs

Hi Assume I want to reset simulation statistics from through a C program. So, I must add m5op.h header file to the application, and call resetstats(...) function in the application. I have done it, but encountered with following error when I compiled the program. Could you tell me how facilities o

[gem5-users] questions about Gem5 stat

Hi all, I use gem5 for running an application and obtain execution time and the number of L1 and L2 miss count which *only* caused by the application and occur in the execution time of the program. I have already used Simics+gems for simulation. In the Simics, there are features that allow the pro

[gem5-users] Alpha with more than 4 cpus

Hi I need to simulate a CMP processor which consists of more than 4 cpus. I found that gem5 has implemented BigTsunami. It supports up to 64 processors. Could you tell me where I can find BigTsunami or how I can create it? Thanks ___ gem5-users mailing

Re: [gem5-users] alphaev67-unknown-linux-gnu-gcc and static linking

Hi Thanks for your reply. I have replaced current kernel image with 2.6.27 one. 2012/1/13 yanke > http://www.cs.utexas.edu/~cart/parsec_m5/ > > > > At 2012-01-13 01:38:02,"Hamid Reza Khaleghzadeh" > wrote: > > Thanks for your answer, but could you expla

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