Michael Meissner
* gcc.target/powerpc/paddi-1.c: New test to test using PLI to
load up a large DImode constant.
* gcc.target/powerpc/paddi-2.c: New test to test using PLI to
load up a large SImode constant.
* gcc.target/powerpc/paddi-3.c: New test to test
operation.
Can I check test this into the FSF trunk?
2019-11-14 Michael Meissner
* gcc.target/powerpc/prefix-odd-memory.c: New test to make sure
prefixed instructions are generated if an offset would not be
legal for the non-prefixed DS/DQ instructions.
--- /tmp/Clb8P3_prefix
The prefixed instructions do not support the update form of the memory
instruction (i.e. internally this is addresses using PRE_INC, PRE_DEC, or
PRE_MODIFY).
Can I check this into the FSF trunk?
2019-11-14 Michael Meissner
* gcc.target/powerpc/prefix-premodify.c: New test to make
This patch tests whether using large numeric offsets causes prefixed loads or
stores to be generated.
Can I check this patch into the FSF trunk?
2019-11-14 Michael Meissner
* gcc/testsuite/gcc.target/powerpc/prefix-large.h: New set of
tests to test prefixed addressing on
This patch adds tests for using the PC-relative addressing on the 'future'
system.
Can I check this patch into the FSF trunk after the patch in the V7 series that
enables PC-relative addressing by default on 64-bit Linux systems has been
commited?
2019-11-14 Michael Meissner
This patch checks whether the -fstack-protect-strong option works with a large
stack frame on -mcpu=future systems where prefixed instructions are generated.
Can I check this into the FSF trunk?
2019-11-14 Michael Meissner
* gcc.target/powerpc/prefix-stack-protect.c: New test to make
tension to PCREL_OPT.
The third patch adds support for optimizing stores with PCREL_OPT.
The fourth patch is a series of tests to test whether the right number of
PCREL_OPT relocations are generated.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: me
using that
address.
I have bootstrapped a compiler with this a little endian power8 system, and
there were no regressions in the test suite. Can I check this into the FSF
trunk once the patches it depends on from the V7 series have been checked in?
2019-11-15 Michael Meissner
the test suite. Can I check this in once the previous
patch has been checked in?
2019-11-15 Michael Meissner
* config/rs6000/pcrel-opt.c (pcrel_opt::do_pcrel_opt_load): Add
support to do the PCREL_OPT optimization with sign, zero, and
float extension.
* config
Michael Meissner
* config/rs6000/pcrel-opt.c: Update comments saying we support the
PCREL_OPT optimization for both loads and stores.
(class pcrel_opt): Add do_pcrel_opt_store declaration. Add
counters for the # of PCREL_OPT stores.
(pcrel_opt
This patch adds the tests for PCREL_OPT.
These tests all pass with the compiler using the previous 3 patches. Can I
check these tests in once the previous patches have been checked in?
2019-11-15 Michael Meissner
* gcc.target/powerpc/pcrel-opt-inc-di.c: New PCREL_OPT test
On Fri, Nov 22, 2019 at 06:06:19PM -0600, Segher Boessenkool wrote:
> On Thu, Nov 14, 2019 at 05:40:10PM -0500, Michael Meissner wrote:
> > --- gcc/config/rs6000/rs6000.c (revision 278173)
> > +++ gcc/config/rs6000/rs6000.c (working copy)
> > @@ -5552,7
On Fri, Nov 22, 2019 at 06:20:52PM -0600, Segher Boessenkool wrote:
> On Thu, Nov 14, 2019 at 05:42:43PM -0500, Michael Meissner wrote:
> > -;; Split a load of a large constant into the appropriate two-insn
> > -;; sequence.
> > +;; Split a load of a large constant into the
On Fri, Nov 22, 2019 at 06:32:08PM -0600, Segher Boessenkool wrote:
> On Thu, Nov 14, 2019 at 05:44:42PM -0500, Michael Meissner wrote:
> > This patch generates PADDI to add 34-bit immediate constants on the 'future'
> > system, and prevents such adds from being split.
&
On Fri, Nov 22, 2019 at 06:52:42PM -0600, Segher Boessenkool wrote:
> On Thu, Nov 14, 2019 at 05:51:14PM -0500, Michael Meissner wrote:
> > In some of my previous work, I had make a mistake forgetting that the PADDI
> > instruction did not allow adding a PC-relative reference to
4
patch that will be submitted next, and there were no problems with the
bootstrap or tests that regressed. I compared Spec 2017 INT benchmarks and the
number of each instruction matches the previous version I tested. Can I check
this into the GCC trunk?
2019-11-26 Michael Meissner
* con
4
patch that will be submitted next, and there were no problems with the
bootstrap or tests that regressed. I compared Spec 2017 INT benchmarks and the
number of each instruction matches the previous version I tested. Can I check
this into the GCC trunk?
2019-11-26 Michael Meissner
* con
Here is the patch that I committed for movsi_internal:
2019-11-27 Michael Meissner
* config/rs6000/rs6000.md (movsi_internal): Reformat.
Index: gcc/config/rs6000/rs6000.md
===
--- gcc/config/rs6000/rs6000.md (revision
Here is the patch I committed for movdi_internal64:
2019-11-27 Michael Meissner
* config/rs6000/rs6000.md (movdi_internal64): Reformat.
Index: gcc/config/rs6000/rs6000.md
===
--- gcc/config/rs6000/rs6000.md (revision
On Mon, Nov 25, 2019 at 06:49:49PM -0600, Segher Boessenkool wrote:
> On Mon, Nov 25, 2019 at 05:17:08PM -0500, Michael Meissner wrote:
> > On Fri, Nov 22, 2019 at 06:20:52PM -0600, Segher Boessenkool wrote:
> > > > (define_split
> > > >[(set (ma
On Fri, Nov 22, 2019 at 08:11:16PM -0600, Segher Boessenkool wrote:
> On Thu, Nov 14, 2019 at 05:56:50PM -0500, Michael Meissner wrote:
> > * lib/target-supports.exp
> > (check_effective_target_powerpc_future_ok): Do not require 64-bit
> > or Linux support before d
On Tue, Nov 26, 2019 at 01:20:20PM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Nov 14, 2019 at 06:09:09PM -0500, Michael Meissner wrote:
> > In this case, the current code re-uses the temporary for calculating the
> > offset
> > of the element to load up the ad
On Fri, Aug 10, 2018 at 11:04:50AM -0500, Segher Boessenkool wrote:
> On Tue, Jul 31, 2018 at 10:39:21AM -0400, Michael Meissner wrote:
> > This patch adds an insn to load a LABEL_REF into a GPR. This is needed so
> > the
> > FWPROP1 pass can convert the load the of the l
hout this patch and there were no regressions.
Can I apply this patch to the trunk? Can I backport this patch to GCC 7 and
GCC 8 as well with a suitable delay to catch any problems?
[gcc]
2018-08-20 Michael Meissner
PR target/87033
* config/rs6000/rs6000.md (extendsi2): Change c
(the labelref insn is created by the fwprop pass).
I did a bootstrap test on a little endian power8 system and there were no
regressions. Can I commit this patch? Assuming I put it into the tree, should
I back port it to GCC 8 and possibly GCC 7.
[gcc]
2018-08-29 Michael Meissner
On Tue, Jun 06, 2017 at 09:38:04AM +0200, Richard Biener wrote:
> On Sat, 3 Jun 2017, Richard Biener wrote:
>
> > On June 3, 2017 1:38:14 AM GMT+02:00, Michael Meissner
> > wrote:
> > >On Fri, Jun 02, 2017 at 03:22:27PM +0200, Richard Biener wrote:
> > >>
ional FPRs
ws Any FPR/Altivec register DFmode can go in for ISA 2.06 insns
wk Like ws, but only if 64-bit direct moves are supported
wv Only altivec registers (used for 64-bit load/stores)
Note, you have to be careful not to allow a register constraint that the
current type cannot go into. This is due to a 'feature' in the LRA register
allocator that it will trap if such a case occurs. For example, for ISA 2.06,
we do not have 32-bit floating point instructions in the Altivec registers.
This means you can't use "v" (just the Altivec registers) on any code where
-mcpu=power7 (or -mno-upper-regs-sf) is allowed.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
oat2_code (true, rtx_dst, rtx_src1, rtx_src2);
DONE;
})
Since the gen* pattern never generates the code due to the DONE (the call to
rs6000_generate_float2_code does that). And since it is a define_expand,
the constraints are not used.
Now, if it had been a define_insn_and_split, then you would have needed the
unspec and the constraints.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
the XOR operation and
then back to the vector/floating point registers.
Note, the PowerPC has an instruction that does copysign directly. It would be
better just to do the copysign/multiply.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
o the
trunk?
I would also like to backport it to GCC 7 after a burn-in period on the trunk.
The patch will not apply to earlier revisions. Can I install the patch after a
burn-in period of time, assuming it applies cleanly?
[gcc]
2017-06-14 Michael Meissner
PR target/79799
* c
I thought the patch was fine as I posted. I had an optimization I thought
about (optimizing for inserting 0.0f) and I noticed some problems with it.
However, even in backing out the change, there are some problems. So, I will
hopefully reissue the patch tomorrow.
--
Michael Meissner, IBM
IBM
On Thu, Jun 15, 2017 at 07:39:39PM -0400, Michael Meissner wrote:
> I thought the patch was fine as I posted. I had an optimization I thought
> about (optimizing for inserting 0.0f) and I noticed some problems with it.
> However, even in backing out the change, there are some problem
On Fri, Jun 16, 2017 at 02:52:46PM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Thu, Jun 15, 2017 at 10:10:28PM -0400, Michael Meissner wrote:
> > +(define_insn_and_split "vsx_set_v4sf_p9"
> > + [(set (match_operand:V4SF 0 "gpc_reg_
On Fri, Jun 16, 2017 at 04:30:48PM -0500, Segher Boessenkool wrote:
> On Fri, Jun 16, 2017 at 04:26:58PM -0400, Michael Meissner wrote:
> > > > + "&& reload_completed"
> > >
> > > I still don't think it is such a good idea to do all of thi
d support for STXSDX and STXSSPX.
I've checked the following into trunk, and I will check it into the gcc-7 and
gcc-6 branches so that the test is run only on 64-bit systems, but I want to
look at enabling the support in 32-bit systems.
2017-06-21 Michael Meissner
PR target/80510
it to
install the patch until after 6.4 ships.
[gcc]
2017-06-22 Michael Meissner
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov_hardfloat32): Reorder ISA 2.07 load/stores befor
functions, since they have the DECL_FUNCTION_VERISIONED bit set.
I have done bootstrap builds on both x86_64 and PowerPC and this patch builds
the current GCC and has no regressions in the test suite. Can I check it into
the trunk?
2017-06-22 Michael Meissner
PR
ds on both little endian power8 and an x86_64 system
right now (both builds are at stage3, so I don't expect any problems).
Assuming there is no regression, can I check this patch in to the trunk?
2017-06-27 Michael Meissner
PR ipa/81238
* multiple_target.c (create_dispat
this into the trunk?
Given that GCC 7 supports __builtin_cpu_is and __builtin_cpu_supports, I would
ask if I could backport this to GCC 7.x as well to allow future tests to be
back ported.
2017-06-27 Michael Meissner
PR target/81193
* lib/target-support
On Tue, Jun 27, 2017 at 07:34:13PM -0400, Michael Meissner wrote:
> In going through the target_clone support for the PowerPC, I noticed
> that the default target clone function was not explicitly set to private.
> This
> patch fixes this. I have checked both the x86_64 and PowerPC
-3 libraries, and verified that the 2 clone tests were run.
Are these patches ok to apply to the trunk?
[gcc]
2017-06-28 Michael Meissner
* config/rs6000/rs6000.c
(rs6000_get_function_versions_dispatcher): Add warning if the
compiler is not configured to use at least
On Wed, Jun 28, 2017 at 09:58:40AM -0500, Peter Bergner wrote:
> On 6/27/17 6:53 PM, Michael Meissner wrote:
> > This adds a target supports option in dejagnu so that future tests can use
> > this
> > to determine whether or not to test target_clones.
>
> I like
Is that just copy-paste?
Just copy-paste.
Like the target_clones stuff, right now, it is only x86 and PowerPC that
supports __builtin_cpu*.
I don't really see the point of having a machine independent test for
__builtin_cpu_*, but if you feel strongly about it go for it.
--
Michael Meis
bootstraps on little endian Power8 and Power9 systems (with the default
cpu set to power8 and power9 respectively). There were no regressions. Can I
check this patch into the trunk?
[gcc]
2017-11-08 Michael Meissner
* config/rs6000/rs6000.md (bswaphi2_reg): On ISA 3.0 systems,
enable
On Wed, Nov 08, 2017 at 08:01:06AM -0600, Segher Boessenkool wrote:
> Hi Mike,
>
> On Wed, Nov 08, 2017 at 08:14:31AM -0500, Michael Meissner wrote:
> > PowerPC ISA 3.0 does not have a byte-reverse instruction that operates on
> > the
> > GPRs, but it does have vecto
I suspect this patch got lost among the FMA patches at the same time. This
patch enables the rounding functions. Segher has already approved the rs6000
bits.
https://gcc.gnu.org/ml/gcc-patches/2017-10/msg02124.html
On Fri, Oct 27, 2017 at 06:39:21PM -0400, Michael Meissner wrote:
> The pow
the trunk?
[gcc]
2017-11-09 Michael Meissner
* match.pd: Convert fminf, fminfx, fmax, and fmaxx
into the min/max operations for _Float and _FloatX types.
[gcc/testsuite]
2017-11-09 Michael Meissner
* gcc.target/powerpc/float128-minmax.c: New test.
--
Michael
test directory passes. Can I
check this into the trunk? Can I also check this info the active branches (gcc
6/7) providing it causes no regressions?
[gcc]
2017-11-09 Michael Meissner
PR middle_end/82333
* varasm.c (compare_constant): Take the mode of the constants into
On Fri, Nov 10, 2017 at 11:45:23AM -0600, Segher Boessenkool wrote:
> Hi Mike,
>
> On Wed, Nov 08, 2017 at 03:02:30PM -0500, Michael Meissner wrote:
> > > Should this somehow be joined with p9_xxbrd_? Or maybe you should
> > > generate that, instead.
> >
> &
will make sure the compiler bootstraps before committing the changes.
Is it ok to install in the trunk?
[gcc]
2017-11-10 Michael Meissner
* config/rs6000/rs6000-c.c (is_float128_p): New helper function.
(rs6000_builtin_type_compatible): Treat _Float128 and long double
no
regressions. Once David verifies that it builds on AIX, can I check this into
the trunk?
2017-11-15 Michael Meissner
* config/rs6000/rs6000.c (rs6000_expand_builtin): Do not use a
switch to map KFmode built-in functions to TFmode.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 K
check this into the trunk?
[gcc/testsuite]
2017-11-15 Michael Meissner
* gcc.target/powerpc/bfp/bfp.exp: Look for *.c files, not *.c*
files to prevent ~ files from getting recognized.
* gcc.target/powerpc/dfp/dfp.exp: Likewise.
* gcc.target/powerpc/vsu/vsu.exp: Lik
On Thu, Nov 16, 2017 at 04:48:18AM -0600, Segher Boessenkool wrote:
> On Wed, Nov 15, 2017 at 04:56:10PM -0500, Michael Meissner wrote:
> > David tells me that the patch to enable float128 built-in functions to work
> > with the -mabi=ieeelongdouble option broke AIX because on AI
heck
this patch into the trunk?
[gcc]
2017-11-16 Michael Meissner
* builtins.def: (_Float and _FloatX BUILT_IN_CEIL): Add
_Float and _FloatX variants for rounding built-in
functions.
(_Float and _FloatX BUILT_IN_FLOOR): Likewise.
(_Float and _FloatX BUI
On Fri, Nov 17, 2017 at 08:06:09AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Nov 17, 2017 at 12:04:45AM -0500, Michael Meissner wrote:
> > This patch is an enhancement of a previous page that never got approved.
> > https://gcc.gnu.org/ml/gcc-patches/2017-
On Fri, Nov 17, 2017 at 08:06:09AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Nov 17, 2017 at 12:04:45AM -0500, Michael Meissner wrote:
> > This patch is an enhancement of a previous page that never got approved.
> > https://gcc.gnu.org/ml/gcc-patches/2017-
On Mon, Nov 20, 2017 at 11:32:08AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Nov 17, 2017 at 07:35:05PM -0500, Michael Meissner wrote:
> > Here is the fixed patch. It fixes the btrunc2 insn to use the correct
> > XSRPQI variant for truncf128. I added the floa
on power9. Can I
check this into the trunk?
2017-11-27 Michael Meissner
PR libgcc/83112
* config/rs6000/float128-ifunc.c (__addkf3_resolve): Use the
correct type for all ifunc resolvers to silence -Wattribute-alias
warnings.
(__subkf3_resolve): Likewise
on a power8 system, and it runs using the software emulation.
Can I check this patch into the trunk, assuming that the previously posted
patch for PR libgcc/813112 has also been applied?
2017-11-27 Michael Meissner
PR libgcc/83103
* config/rs6000/quad-float128.h (TF): Don't
On Mon, Nov 27, 2017 at 03:40:58PM -0700, Martin Sebor wrote:
> On 11/27/2017 12:21 PM, Michael Meissner wrote:
> >The new -Wattribute-alias option now issues warnings for old-style ifunc
> >declarations that coerce the pointer to the function to void *. The
> >float128-ifu
; -/* { dg-final { scan-assembler "load fusion, type DF" } } */
> -/* { dg-final { scan-assembler "store fusion, type SF" } } */
> -/* { dg-final { scan-assembler "store fusion, type DF" } } */
> +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_sf_load} } } */
> +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_df_load} } } */
> +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_sf_store} } } */
> +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_df_store} } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/fusion4.c
> b/gcc/testsuite/gcc.target/powerpc/fusion4.c
> index 2f3ad12..703c06c 100644
> --- a/gcc/testsuite/gcc.target/powerpc/fusion4.c
> +++ b/gcc/testsuite/gcc.target/powerpc/fusion4.c
> @@ -1,8 +1,7 @@
> -/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
> /* { dg-skip-if "" { powerpc*-*-darwin* } } */
> /* { dg-require-effective-target powerpc_p9vector_ok } */
> /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
> "-mcpu=power7" } } */
> -/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float" } */
> +/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float -dp" } */
>
> #define LARGE 0x12345
>
> @@ -10,4 +9,4 @@ float fusion_float_read (float *p){ return p[LARGE]; }
>
> void fusion_float_write (float *p, float f){ p[LARGE] = f; }
>
> -/* { dg-final { scan-assembler "store fusion, type SF" } } */
> +/* { dg-final { scan-assembler {fusion_gpr_[sd]i_sf_store} } } */
> --
> 1.8.3.1
>
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
On Wed, Nov 29, 2017 at 08:42:51PM -0600, Segher Boessenkool wrote:
> Hi,
>
> On Mon, Nov 27, 2017 at 06:40:09PM -0500, Michael Meissner wrote:
> > @@ -33,3 +35,13 @@ $(fp128_hw_obj) : $(srcdir)/config/rs6
> >
> > $(fp128_ifunc_obj) : INTERNAL_
I submitted the original version of the patch back in August, and then I forgot
about it.
https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01600.html
Hi Mike,
On Mon, Aug 28, 2017 at 02:50:02PM -0400, Michael Meissner wrote:
> When I added the optimization for loading 32-bit values directly i
, and those have
built-in declarations. I installed this patch as being obvious:
2017-11-30 Michael Meissner
* config/rs6000/_mulkc3.c (__mulkc3): Add forward declaration.
* config/rs6000/_divkc3.c (__divkc3): Likewise.
Index: libgcc/config/rs6000/_div
On Fri, Dec 01, 2017 at 05:33:39PM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Nov 30, 2017 at 04:52:44PM -0500, Michael Meissner wrote:
> > No, then it tends to generate worse code if it is done before the first
> > split
> > pass (because it no longer keeps t
ere were no regressions in the build.
This patch will not be needed in GCC 6.
[gcc]
2017-12-04 Michael Meissner
Back port from trunk
2017-12-01 Michael Meissner
PR target/81959
* config/rs6000/rs6000.c (rs6000_address_for_fpconvert): Check for
whether
On Fri, Dec 01, 2017 at 05:53:55PM -0600, Segher Boessenkool wrote:
> On Fri, Dec 01, 2017 at 12:40:22AM -0500, Michael Meissner wrote:
> > After committing the previous patch, I noticed that it was now generating
> > warnings for __{mul,div}kc3_{sw,hw} not having a prototyp
On Fri, Oct 27, 2017 at 06:39:21PM -0400, Michael Meissner wrote:
> The power9 (running PowerPC ISA 3.0) has a round to integer instruction
> (XSRQPI) that does various flavors of round an IEEE 128-bit floating point to
> integeral values. This patch adds the support to the machine in
On Tue, Dec 12, 2017 at 11:04:55AM -0600, Segher Boessenkool wrote:
> On Mon, Dec 11, 2017 at 03:57:51PM -0500, Michael Meissner wrote:
> > > > +extern KCtype __divkc3 (KFtype, KFtype, KFtype, KFtype);
> > > > +
> > > > KCtype
> > > >
=ibmlongdouble
configurations.
Can I apply these patches to libgcc?
2017-12-14 Michael Meissner
* config/rs6000/_divkc3.c: Switch to using soft-fp.h and
quad-float128.h include files and use the types that they define,
instead of hand-rolling the types.
* config/rs6000
On Thu, Dec 21, 2017 at 06:16:16PM +, Joseph Myers wrote:
> On Fri, 17 Nov 2017, Michael Meissner wrote:
>
> > Here is the fixed patch. It fixes the btrunc2 insn to use the correct
> > XSRPQI variant for truncf128. I added the float128-hw11.c test as a runtime
> >
On Thu, Dec 21, 2017 at 01:03:26PM -0600, Segher Boessenkool wrote:
> On Thu, Dec 21, 2017 at 06:16:16PM +, Joseph Myers wrote:
> > On Fri, 17 Nov 2017, Michael Meissner wrote:
> > The architecture-independent changes are OK. However, I have a comment on
>
s into the trunk?
[gcc]
2018-01-04 Michael Meissner
* configure.ac (--with-long-double-format): Add support for
configuration option to change the default long double format in
PowerPC Linux systems.
* configure: Regenerate.
* config.gcc (powerpc*-linu
On Fri, Jan 05, 2018 at 05:28:03PM +, Joseph Myers wrote:
> On Thu, 4 Jan 2018, Michael Meissner wrote:
>
> > (CVT_FLOAT128_TO_IBM128): Use TFtype instead of __float128 to
> > accomidate -mabi=ieeelongdouble multilibs.
>
> Why is that correct in the -mabi=
On Fri, Jan 05, 2018 at 06:33:50PM +0100, Jakub Jelinek wrote:
> On Thu, Jan 04, 2018 at 06:05:55PM -0500, Michael Meissner wrote:
> > This patch is the beginning step to switching the PowerPC long double
> > support
> > from IBM extended double to IEEE 128-bit floating poi
On Fri, Jan 05, 2018 at 05:47:39PM +, Joseph Myers wrote:
> On Fri, 5 Jan 2018, Jakub Jelinek wrote:
>
> > On Thu, Jan 04, 2018 at 06:05:55PM -0500, Michael Meissner wrote:
> > > This patch is the beginning step to switching the PowerPC long double
> > > s
On Thu, Jan 04, 2018 at 06:05:55PM -0500, Michael Meissner wrote:
> This patch is the beginning step to switching the PowerPC long double support
> from IBM extended double to IEEE 128-bit floating point on PowerPC servers.
> It
> will be necessary to have this patch or a similar pa
On Fri, Jan 05, 2018 at 08:22:57PM +0100, Jakub Jelinek wrote:
> On Fri, Jan 05, 2018 at 02:07:51PM -0500, Michael Meissner wrote:
> > Yes, in C code _Float128 _Comples works. The trouble is compiling
> > libstdc++-v3. In C++, we don't have _Float128, and __float128 _Compl
On Mon, Jan 08, 2018 at 10:17:06AM -0600, Segher Boessenkool wrote:
> On Thu, Jan 04, 2018 at 06:05:55PM -0500, Michael Meissner wrote:
> > This patch is the beginning step to switching the PowerPC long double
> > support
> > from IBM extended double to IEEE 128-bit floa
. Assuming that build has no regressions, can I check this into
GCC 9? This bug appears in GCC 8, and I would like to back port this patch to
GCC 8 as well before GCC 8.2 goes out.
[gcc]
2018-05-25 Michael Meissner
PR target/85358
* target.def (default_fp_widening_p): New target hook
On Sat, May 26, 2018 at 08:13:04AM +0200, Richard Biener wrote:
> On May 25, 2018 8:49:47 PM GMT+02:00, Michael Meissner
> wrote:
> >I redid the patch to make the target hook only apply for scalar float
> >points,
> >and I removed all of the integer only subcases.
> &g
.
I could imagine having an alternative *_FLOAT_MODE that essentially marks which
modes shouldn't be widened to/from and binop/unop could use. Or I could
imagine making two widening tables, one for initialization, and one for
binop/unop, or other possibilities.
--
Michael Meissner, IBM
IBM,
the name mangling changes and these patches back to GCC 8.2 as well.
I will need to re-issue the patch for __builtin_{,un}pack_longdouble and
__builtin_{,un}pack_ibm128 due to changes made by these patches.
[gcc]
2018-06-01 Michael Meissner
* config/rs6000/rs6000.c (rs6000_pa
On Mon, Jun 04, 2018 at 08:46:42AM +0200, Richard Biener wrote:
> On Fri, 1 Jun 2018, Joseph Myers wrote:
>
> > On Fri, 1 Jun 2018, Michael Meissner wrote:
> >
> > > I'm wondering if there are other suggestions to make this patch
> > > acceptable.
&g
On Mon, Jun 04, 2018 at 12:46:42PM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Fri, Jun 01, 2018 at 07:28:40PM -0400, Michael Meissner wrote:
> > This patch also makes __ibm128 or __float128 use the long double mode if
> > long
> > double uses the IBM exte
e the hook in rs6000.c gets called. I frankly don't see it as
> > simplifying the code.
>
> Not even if we can also get rid of TFmode as separate mode?
We have to keep TFmode for the non float128 ports, so I don't see it as buying
us much of anything.
But also it is a matter of how much you want to destabilize things.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
running Linux. There were no
regressions. Can I install this in the trunk and eventually back port it to
GCC 8.2?
2018-06-05 Michael Meissner
* config/rs6000/rs6000.c (rs6000_passes_ieee128): New boolean to
track if we pass or return IEEE 128-bit f
ower8 system and there were no
regressions. As I mentioned previously, the pr85657.C now passes.
[gcc]
2018-06-05 Michael Meissner
* config/rs6000/rs6000.c (rs6000_init_builtins): Make __ibm128 use
the long double type if long double is IBM extended double. Make
__flo
IEEE 128-bit.
I have checked this on a little endian power8 Linux system, and there were no
regressions. All three of the new tests pass. Can I check this into the
trunk, and eventually back port it to the GCC 8.2 branch?
[gcc]
2018-06-05 Michael Meissner
PR target/85657
On Wed, Jun 06, 2018 at 02:52:27PM -0500, Segher Boessenkool wrote:
> On Tue, Jun 05, 2018 at 07:11:41PM -0400, Michael Meissner wrote:
> > This patch makes the long double pack/unpack built-in functions only
> > available
> > if the long double format is IBM extended double.
), --with-cpu=power8;
3) Big endian power8 system (64/32-bit), no --with-cpu;
I'm currently building it on:
4) Big endian power6 system (64/32-bit), no --with-cpu.
2018-06-11 Michael Meissner
PR target/85358
* config/rs6000/rs6000-modes.def (toplevel): Rework th
On Mon, Jun 11, 2018 at 07:31:44PM -0400, Michael Meissner wrote:
> This patch is a complete rework of the previous patch. Previously I used new
> target hooks to provide IFmode (__ibm128) from being widened by default to
> TFmode (long double) on power9 systems when long double is IEE
in using this patch. Can I check it in, and eventually back port
it to GCC 8.2 with the other long double transition patches?
2018-06-11 Michael Meissner
* config/rs6000/t-float128 (FP128_CFLAGS_SW): Compile float128
support modules with -mno-gnu-attribute.
* config
port it to GCC 8.2 with the other long
double transition patches.
2018-06-13 Michael Meissner
* gcc.target/powerpc/divkc3-1.c: If long double is IEEE 128-bit,
use __complex long double instead of KC attribute.
* gcc.target/powerpc/mulkc3-1.c: Likewise
it in, and eventually back port
it to GCC 8.2 with the other long double transition patches.
2018-06-13 Michael Meissner
* config/rs6000/rs6000.c (rs6000_init_libfuncs): Do not re-run the
initialization during clone or target pragma/attribute
processing.
--
Michael Mei
were no
regressions in using this patch. Can I check it in, and eventually back port
it to GCC 8.2 with the other long double transition patches.
2018-06-13 Michael Meissner
* config/rs6000/rs6000.md (copysign3, IEEE iterator): Rework
copysign of float128 on ISA 2.07 to use
On Wed, Jun 13, 2018 at 05:21:55PM -0400, Michael Meissner wrote:
> In addition to the previous patch to aid in transitioning the PowerPC long
> double format to IEEE 128-bit, I have some additional patches that are needed.
> The previous patch is:
> https://gcc.gnu.org/ml/gcc-pat
On Thu, Jun 14, 2018 at 04:27:26PM -0500, Segher Boessenkool wrote:
> Hi!
>
> Many thanks for all your work on this.
>
> On Mon, Jun 11, 2018 at 07:31:44PM -0400, Michael Meissner wrote:
> > This patch is a complete rework of the previous patch. Previously I used
> &
On Thu, Jun 14, 2018 at 06:25:49PM -0500, Segher Boessenkool wrote:
> On Wed, Jun 13, 2018 at 05:10:15PM -0400, Michael Meissner wrote:
> > In addition to the previous patch to aid in transitioning the PowerPC long
> > double format to IEEE 128-bit, I have some additional p
On Thu, Jun 14, 2018 at 07:00:52PM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Wed, Jun 13, 2018 at 05:16:37PM -0400, Michael Meissner wrote:
> > This fixes some of the PowerPC tests that had implicit assumptions about the
> > long double format. The fixes inv
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