tches/308910/focus=308917
--
Maxim Kuvyrkov
www.linaro.org
0001-Fix-libstdc-ABI-baseline-for-aarch64-linux-gnu.patch
Description: Binary data
On Nov 14, 2014, at 4:57 AM, Vladimir Makarov wrote:
> On 2014-10-21 12:06 AM, Maxim Kuvyrkov wrote:
>
...
> I'd prefer symbolic constants for dont_delay. Also the address can contains
> other parts, e.g. index for some targets. It is not necessary to change the
> code
On Nov 14, 2014, at 8:38 AM, Jeff Law wrote:
> On 10/20/14 22:06, Maxim Kuvyrkov wrote:
>> Hi,
>> Ramana, this change requires benchmarking, which I can't easily do
>> at
> the moment. I would appreciate any benchmarking results that you can
> sh
On Nov 19, 2014, at 12:27 PM, Ramana Radhakrishnan
wrote:
>
>
> On 14/11/14 15:12, Maxim Kuvyrkov wrote:
>> On Nov 14, 2014, at 8:38 AM, Jeff Law wrote:
>>
>>> On 10/20/14 22:06, Maxim Kuvyrkov wrote:
>>>> Hi,
>>>> Ramana, this change
"imm"))
(const_string "wTP43")
(eq_attr "type" "neon_arith_acc,neon_shift_acc")
(if_then_else (match_test
The point of this is that definitions of many architectures that don't care
about operand type don't need to change.
--
Maxim Kuvyrkov
www.linaro.org
gt; +
> + subrtx_iterator::array_type array;
> + FOR_EACH_SUBRTX (iter, array, rvalue, ALL)
> +{
> + /* Has shift operation. */
> + RTX_CODE code = GET_CODE (*iter);
> + if (code == ASHIFT || code == ASHIFTRT
> + || code == LSHIFTRT || code == ROTATERT)
> + return true;
> +}
> +
> + return false;
> +}
Same comment as above.
Otherwise looks good.
Thanks!
--
Maxim Kuvyrkov
www.linaro.org
d
> into
> an integer/memory unit and another one for FP/NEON units to reduce the state
> space.
> Look at cortex-a15.md and cortex-a15-neon.md or some other description of
> that kind.
I think converting the C predicates to attributes would reduce the number of
states since DFA generator will be able to fold them.
--
Maxim Kuvyrkov
www.linaro.org
> On Mar 2, 2015, at 1:41 PM, Ilya Enkovich wrote:
>
> Committed to trunk.
Hi Ilya,
Was this approved offline? If so, it is a good habit to note in the "Committed
to trunk" message who approved it. This way we have reviewer's name on file.
Thank you,
--
Maxim
arm-protos.h, then a new
dedicated file (e.g., arm-fl.h) would be a better choice for new home of FL_*
definitions.
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
> On Mar 4, 2015, at 5:46 AM, Terry Guo wrote:
>
> On Wed, Mar 4, 2015 at 10:44 AM, Terry Guo wrote:
>> On Mon, Mar 2, 2015 at 9:08 PM, Maxim Kuvyrkov
>> wrote:
>>>> On Mar 2, 2015, at 4:44 AM, Terry Guo wrote:
>>>>
>>>> Hi there,
that using "csneg" is faster on all implementations, can you say
the same for "abs"? Especially given the fact that csneg requires 4 operands
instead of abs'es 2?
Wouldn't it be better to have (define_expand "abs2") that would expand
into either csneg3 or second alternative of current absdi2?
Other than this, the patch looks OK.
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
> On Mar 4, 2015, at 3:30 PM, Wilco Dijkstra wrote:
>
>> Maxim Kuvyrkov wrote:
>>
>> You are removing the 2nd alternative that generates "abs" with your patch.
>> While I agree that
>> using "csneg" is faster on all implementations, can
On Mar 4, 2015, at 6:00 PM, Wilco Dijkstra wrote:
>
>> Maxim Kuvyrkov wrote:
>>> On Mar 4, 2015, at 3:30 PM, Wilco Dijkstra wrote:
>>>
>>>> Maxim Kuvyrkov wrote:
>>>>
>>>> You are removing the 2nd alternative that generates "
g/arm/arm-protos.h
>>> +++ b/gcc/config/arm/arm-protos.h
>>> @@ -325,75 +325,6 @@ extern const char *arm_rewrite_selected_cpu (const
>>> char *name);
>>>
>>> extern bool arm_is_constant_pool_ref (rtx);
>>>
>>> -/* Flags used to identify the presence of processor capabilities. */
>>
>> You've lost this comment in the new file. Was it intentional?
>>
>
> The line is used as first line in new file arm-flags.h.
Ack.
Thanks,
--
Maxim Kuvyrkov
www.linaro.org
its own merits: Is it a worthwhile improvement? --
[Probably, "yes".] Does it make current spaghetti code significantly more
difficult to understand? -- [Probably, "no", if we update the current comments.]
Let's discuss the effort of cleaning RTX costs as a separate task. It can be
either a joint effort for ARM and Linaro, or one of us can tackle it.
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
ChangeLog:
>
> 2015-04-15 Kugan Vivekanandarajah
> Maxim Kuvyrkov
>
> PR target/65139
> * config/aarch64/aarch64.md (3): Expand lshr with
>gen_aarch64_lshr_sisd_or_int_3.
> (*aarch64_lshr_sisd_or_int_3): Rename to
>aarch64_ls
assignments from or to volatile things
> diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
> index e7f7eab..cb891b1 100644
> --- a/gcc/emit-rtl.c
> +++ b/gcc/emit-rtl.c
> @@ -5228,7 +5228,8 @@ set_for_reg_notes (rtx insn)
>reg = SET_DEST (pat);
>
>/* Notes apply to the contents of a STRICT_LOW_PART. */
> - if (GET_CODE (reg) == STRICT_LOW_PART)
> + if (GET_CODE (reg) == STRICT_LOW_PART
> + || GET_CODE (reg) == ZERO_EXTRACT)
> reg = XEXP (reg, 0);
>
>/* Check that we have a register. */
> --
> 1.9.1
>
>
--
Maxim Kuvyrkov
www.linaro.org
st.
>
> gcc.
>
> 2015-06-26 Kugan Vivekanandarajah
>
> * config/arm/arm.c (arm_emit_movpair): Add REG_EQUAL notes to
> instruction.
> <0002-Add-REG_EQUAL-note-for-arm_emit_movpair.patch>
LGTM, but you need ARM maintainer's approval.
--
Maxim Kuvyrkov
www.linaro.org
> On Jun 30, 2015, at 6:54 AM, Kugan wrote:
>
>
> On 29/06/15 21:56, Maxim Kuvyrkov wrote:
>>> On Jun 28, 2015, at 2:28 PM, Kugan
>>> wrote:
>>>
>>> This patch allows setting REG_EQUAL for ZERO_EXTRACT and handle that in
>>> cse (
dimir a while ago).
I'll commit ARM part of the patch once Ramana is happy with it.
I've addressed all review comments and updated patch is attached.
Any objections?
> On 14/11/14 15:12, Maxim Kuvyrkov wrote:
>> On Nov 14, 2014, at 8:38 AM, Jeff Law wrote:
>>
>&
trapped and regtested on arm-linux-gnueabihf/cortex-a15.
OK to commit?
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
0001-Fix-scheduling-undeterminism-from-sorting-with-DEBUG.patch
Description: Binary data
On Jan 19, 2015, at 4:34 PM, Alexander Monakov wrote:
> On Mon, 19 Jan 2015, Maxim Kuvyrkov wrote:
>> The underlying problem is that the order in which elements of ready_list are
>> compared matters to the final result. This is because rank_for_schedule
>> sorting he
On Jan 19, 2015, at 6:05 PM, Richard Earnshaw wrote:
> On 16/01/15 15:06, Maxim Kuvyrkov wrote:
>> @@ -1874,7 +1889,8 @@ const struct tune_params arm_cortex_a15_tune =
>> true, true, /* Prefer 32-bit encodings.
On Jan 19, 2015, at 6:48 PM, Mike Stump wrote:
> On Jan 19, 2015, at 5:41 AM, Maxim Kuvyrkov wrote:
>> In A < B < C < A case all A, B and C are normal instructions. It is a
>> pre-existing condition. When compiling without debug information we have
>> ready l
On Jan 20, 2015, at 12:11 AM, Mike Stump wrote:
> On Jan 19, 2015, at 10:14 AM, Maxim Kuvyrkov
> wrote:
>> On Jan 19, 2015, at 6:48 PM, Mike Stump wrote:
>>> On Jan 19, 2015, at 5:41 AM, Maxim Kuvyrkov
>>> wrote:
>>>> In A < B < C < A ca
On Jan 20, 2015, at 6:32 AM, Mike Stump wrote:
> On Jan 19, 2015, at 1:28 PM, Maxim Kuvyrkov wrote:
>>
>> Yes, the ordering relation is screwed, as you put it. With the number of
>> independent heuristics that rank_for_schedule has to consider there is no
>&g
how to set up the various parameters to meet
> those goals.
>
> So something like
>
> ARM_SCHED_AUTOPREF_OFF
> ARM_SCHED_AUTOPREF_RANK
> ARM_SCHED_AUTOPREF_FULL
A patch is attached. I bootstrapped it on arm-linux-gnueabihf. OK to apply?
--
Maxim Kuvyrkov
www.linaro.org
0001-Use-enum-for-sched_autopref-tune-settings.patch
Description: Binary data
On Jan 22, 2015, at 8:11 PM, Jeff Law wrote:
> On 01/19/15 06:07, Maxim Kuvyrkov wrote:
>>
>> The underlying problem is that the order in which elements of
>> ready_list are compared matters to the final result. This is because
>> rank_for_schedule sorting heuristic
On Oct 23, 2014, at 4:18 AM, Jeff Law wrote:
> On 10/22/14 17:01, Maxim Kuvyrkov wrote:
>> On Oct 23, 2014, at 9:02 AM, Jeff Law wrote:
>>
>>> On 10/20/14 21:35, Maxim Kuvyrkov wrote:
>>>> Hi,
>>>>
>>>> This patch is a simple fix to
On Jan 29, 2015, at 10:36 AM, Alexandre Oliva wrote:
> On Jan 19, 2015, Maxim Kuvyrkov wrote:
>
>> Presence or absence of DEBUG_INSNs in the ready list can change the
>> comparison order, and cause slightly different instruction schedules.
>
>> The solution that I
On Jan 31, 2015, at 7:33 AM, Jeff Law wrote:
> On 01/22/15 12:01, Maxim Kuvyrkov wrote:
>> On Jan 22, 2015, at 8:11 PM, Jeff Law wrote:
>>
>>> On 01/19/15 06:07, Maxim Kuvyrkov wrote:
>>>>
>>>> The underlying problem is that the order in which
,
--
Maxim Kuvyrkov
www.linaro.org
0001-Fix-debug-output-for-sched-autoprefetcher-model.patch
Description: Binary data
ootstrap and test
the patch on trunk before committing.
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
0002-Support-disabling-of-sched-autoprefetcher-from-comma.patch
Description: Binary data
is refactored/gone now, I think), but the logic should have
stayed their.
I'm at a conference at the moment (Linaro Connect) and can look at this on
Monday/Tuesday (Feb 16/17).
--
Maxim Kuvyrkov
www.linaro.org
00])) 4))
>
>
> Looking at the RTL dumps all shifts are gone by the time combine is reached
> (in this case cse1 removes the shifts)
FYI, (and not related to the core issue of this patch)
The use of mult vs shift by combine is a problem that Venkat is working on, see
"[RFC] Ti
nu with no
>> issues and given it a quick check on the problem code from before,
>> where it has the desired impact.
>>
>> Thanks,
>> James
>>
>> ---
>> 2015-02-10 James Greenhalgh
>>
>> * haifa-sched.c (recompute_todo_spec): Treat SCHED_GROUP_P
>> as forcing a HARD_DEP between instructions, thereby
>> disallowing rewriting to break dependencies.
> OK.
> jeff
The patch looks good to me too. Once SCHED_GROUP_P is set on an insn, it
becomes untouchable due to lack of complete dependency information.
--
Maxim Kuvyrkov
www.linaro.org
erand 0) and inputs (operands 1
and 2).
Did you consider using SCRATCHes instead of re-using operand 0 with early
clobber like in the attached [untested] patch? If I got it all correct,
register allocator will get more freedom in deciding which register to use for
negated shift temporary, while still allowing reusing register from operand 0
for one of the inputs.
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
bz1149.patch
Description: Binary data
On Feb 18, 2015, at 3:32 PM, Maxim Kuvyrkov wrote:
> First of all, applauses! I realize how difficult it was to reduce this
> problem.
>
> Your patch looks OK to me, but I can't shake off feeling that it will
> pessimize cases when d8 is not used afterwards. In pa
On Feb 18, 2015, at 4:42 PM, Kyrill Tkachov wrote:
>
> On 18/02/15 12:32, Maxim Kuvyrkov wrote:
>> On Feb 18, 2015, at 2:35 PM, Kyrill Tkachov wrote:
>>
>>> Hi all,
>>>
>>> This patch fixes a wrong-code bug with the *aarch64_lshr_sisd_or_int_3
quot;
The attached patch fixes the problem. OK for trunk and 4.9 branch?
Thanks,
--
Maxim Kuvyrkov
www.linaro.org
fix-race-on-additional_sources.ChangeLog
Description: Binary data
fix-race-on-additional_sources.patch
Description: Binary data
linux-gnu and cross-tested on
arm-linux-gnueabihf. Markus also tested this patch on powerpc64-linux-gnu.
OK for trunk?
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
0001-Fix-PR64935.patch
Description: Binary data
> On Feb 19, 2015, at 4:31 PM, H.J. Lu wrote:
>
> On Wed, Feb 18, 2015 at 7:05 AM, Maxim Kuvyrkov
> wrote:
>> Hi,
>>
>> This testsuite patch fixes race on additional_source testsuite variable.
>> When a test has both dg-additional-sources and "dg-do r
hange more anyway.
I have reverted the original change on 4.9 branch, and will re-apply it
together with this patch in about a week if everything looks OK.
Sorry about the breakage,
--
Maxim Kuvyrkov
www.linaro.org
0001-Fix-PR-testsuite-65116.patch
Description: Binary data
On Oct 21, 2014, at 8:06 AM, Maxim Kuvyrkov wrote:
> Hi,
>
> This patch adds auto-prefetcher modeling to GCC scheduler. The
> auto-prefetcher model is currently enabled only for ARM Cortex-A15, since
> this is the only CPU that I know of to have the hardware auto-prefetcher
these scripts to satisfy my own
curiosity, and to give GCC community another option to choose from for the
final migration. If by end of Summer 2019 we have 2-3 git repos to choose
from, then we are likely to push GCC [kicking and screaming] into 2010's by the
end of this decade.
--
> On Jul 22, 2019, at 12:05 PM, Maxim Kuvyrkov
> wrote:
>
...
>>>> As far as GCC conversion goes, below is what I plan to do and what not to
>>>> do. This is based on comments from everyone in this thread:
>>>>
>>>> 1. Construct G
> On Aug 1, 2019, at 11:43 PM, Jason Merrill wrote:
>
> On Mon, Jul 22, 2019 at 5:05 AM Maxim Kuvyrkov
> wrote:
>>
>>> On Jul 16, 2019, at 5:14 PM, Maxim Kuvyrkov
>>> wrote:
>>>
>>>> On Jul 16, 2019, at 3:34 PM, Jason Merrill
> On Aug 2, 2019, at 1:26 PM, Martin Liška wrote:
>
> On 8/2/19 10:41 AM, Maxim Kuvyrkov wrote:
>> In the end, I don't care much to which version of the repo we switch, as
>> long as we switch.
>
> Hi Maxim.
>
> I really appreciate that you've been w
> On Aug 2, 2019, at 11:35 AM, Maxim Kuvyrkov wrote:
>
>> On Jul 22, 2019, at 12:05 PM, Maxim Kuvyrkov
>> wrote:
>>
> ...
>>>>> As far as GCC conversion goes, below is what I plan to do and what not to
>>>>> do. This is based
> On Aug 2, 2019, at 2:06 PM, Richard Biener wrote:
>
> On Fri, Aug 2, 2019 at 1:01 PM Martin Liška wrote:
>>
>> On 8/2/19 12:54 PM, Maxim Kuvyrkov wrote:
>>>> On Aug 2, 2019, at 1:26 PM, Martin Liška wrote:
>>>>
>>>> On 8/2/19 10:41
> On Aug 2, 2019, at 11:41 AM, Maxim Kuvyrkov wrote:
>
>> On Aug 1, 2019, at 11:43 PM, Jason Merrill wrote:
>>
...
>>> Unfortunately, current mirror does not and could not account for rewrites
>>> of SVN commit log messages. For trunk the histories o
> On Aug 5, 2019, at 11:24 AM, Maxim Kuvyrkov wrote:
>
>
>> On Aug 2, 2019, at 11:41 AM, Maxim Kuvyrkov
>> wrote:
>>
>>> On Aug 1, 2019, at 11:43 PM, Jason Merrill wrote:
>>>
> ...
>>>> Unfortunately, current mirror does no
> On Aug 6, 2019, at 12:32 PM, Maxim Kuvyrkov wrote:
>
...
> I've setup uploads and updates of fully converted GCC history (all branches
> and all tags) in 3 flavors. These will be updated roughly hourly.
>
> 1. https://git-us.linaro.org/people/maxim-kuvyrkov/gcc-pretty
etcher-friendly schedule we should prioritize
"irrelevant" instructions before memory writes.
Obvious patch to implement the above is attached. It brings 70% of regressed
performance on this testcase back.
OK to commit?
Regards,
--
Maxim Kuvyrkov
www.linaro.org
0001-Imp
Hi,
The first patch adds ranking statistics for autoprefetcher heuristic.
The second one makes it easier to diff scheduler debug dumps by adding more
context lines for diff at clock increments.
OK to commit?
--
Maxim Kuvyrkov
www.linaro.org
0002-Add-missing-entry-for-rank_for_schedule
> On Aug 29, 2019, at 7:29 PM, Richard Biener
> wrote:
>
> On August 29, 2019 5:40:47 PM GMT+02:00, Maxim Kuvyrkov
> wrote:
>> Hi,
>>
>> This patch tweaks autoprefetcher heuristic in scheduler to better group
>> memory loads and stores together.
&
> On Aug 24, 2019, at 12:30 AM, Joseph Myers wrote:
>
> On Fri, 23 Aug 2019, Maxim Kuvyrkov wrote:
>
>> I propose that we switch to gcc-pretty.git repository, because it has
>> accurate Committer and Author fields. Developer names and email
>> addresses are extr
ttps://ci.linaro.org/view/tcwg_kernel-gnu/job/tcwg_kernel-bisect-gnu-master-aarch64-lts-allmodconfig/8/artifact/artifacts/
Regards,
--
Maxim Kuvyrkov
www.linaro.org
> On Aug 22, 2018, at 2:43 AM, Jeff Law wrote:
>
> [ I'm still digesting, but saw something in this that ought to be bro
import process because the tool gives only SVN committer ID without
much else. We could do much better by matching SVN committer ID with person's
name in the map file, and then searching for person's current-at-the-time email
address in the commit diff. I.e., mkuvyrkov -> Maxi
> On Jul 16, 2019, at 3:34 PM, Jason Merrill wrote:
>
> On Tue, Jul 16, 2019 at 12:18 PM Maxim Kuvyrkov
> wrote:
>>
>> Hi Everyone,
>>
>> I've been swamped with other projects for most of June, which gave me time
>> to digest all the feedba
> On Jul 16, 2019, at 5:14 PM, Maxim Kuvyrkov wrote:
>
>> On Jul 16, 2019, at 3:34 PM, Jason Merrill wrote:
>>
...
>>
>>> b. Re-write tags/ branches into annotated tags. Note that tags/* are
>>> included into history of several branches via merge or
> On Jul 16, 2019, at 5:14 PM, Maxim Kuvyrkov wrote:
>
>> On Jul 16, 2019, at 3:34 PM, Jason Merrill wrote:
>>
>> On Tue, Jul 16, 2019 at 12:18 PM Maxim Kuvyrkov
>> wrote:
>>>
>>> Hi Everyone,
>>>
>>> I've been swamped
, [old2] "+&r"(c), [v] "+Q"(a)
: [new1] "r"(d), [new2] "r"(e));
}
===
Is this the same bug that Jeff reported?
Thanks,
--
Maxim Kuvyrkov
www.linaro.org
> On Mar 26, 2019, at 3:20 PM, Vladimir Makarov wrote:
>
> On 3/26/19 4:25 AM, Maxim Kuvyrkov wrote:
>>> On Mar 26, 2019, at 12:22 AM, Vladimir Makarov wrote:
>>>
>>> Jeff Law recently found that my latest patch break some existing code
>>> com
This patch adds scripts to contrib/ to migrate full history of GCC's subversion
repository to git. My hope is that these scripts will finally allow GCC
project to migrate to Git.
The result of the conversion is at
https://github.com/maxim-kuvyrkov/gcc/branches/all . Branches with
> On May 15, 2019, at 12:20 AM, Segher Boessenkool
> wrote:
>
> On Tue, May 14, 2019 at 07:11:18PM +0300, Maxim Kuvyrkov wrote:
>> This patch adds scripts to contrib/ to migrate full history of GCC's
>> subversion repository to git. My hope is that these scri
> On May 15, 2019, at 2:19 PM, Richard Biener
> wrote:
>
> On Tue, May 14, 2019 at 6:11 PM Maxim Kuvyrkov
> wrote:
>>
>> This patch adds scripts to contrib/ to migrate full history of GCC's
>> subversion repository to git. My hope is that these scripts
> On May 15, 2019, at 9:47 PM, Segher Boessenkool
> wrote:
>
> On Wed, May 15, 2019 at 11:34:34AM +0300, Maxim Kuvyrkov wrote:
>>> On May 15, 2019, at 12:20 AM, Segher Boessenkool
>>> wrote:
>>> On Tue, May 14, 2019 at 07:11:18PM +0300, Maxim Kuvyrkov
vn branches,
and I would appreciate a list of svn branches in GCC's repo that caused
problems. It would be best to double-check conversion of these branches for
any artifacts.
Regards,
--
Maxim Kuvyrkov
www.linaro.org
keep in the new repo.
With git, we can always split away unneeded history by removing unnecessary
branches and tags and re-packing the repo. We can equally easily bring that
history back if we change our minds.
--
Maxim Kuvyrkov
www.linaro.org
> On May 17, 2019, at 2:06 AM, Joseph Myers wrote:
>
> On Tue, 14 May 2019, Maxim Kuvyrkov wrote:
>
>> The scripts convert svn history branch by branch. They rely on git-svn
>> on convert individual branches. Git-svn is a good tool for converting
>> indivi
try that.
>
> Is it desired for the transition to use the author map? Do we want it?
IIUC, the downside is that converted repo will not match current git mirror
unless we do log re-writing, which would add extra info on the side.
--
Maxim Kuvyrkov
www.linaro.org
> On May 17, 2019, at 4:07 PM, Jason Merrill wrote:
>
> On Tue, May 14, 2019 at 12:11 PM Maxim Kuvyrkov
> wrote:
>>
>> This patch adds scripts to contrib/ to migrate full history of GCC's
>> subversion repository to git. My hope is that these scripts wi
ifact/artifacts/5-count_linux_objs/console.log/*view*/
.
This should be trivial to reproduce, but let me know if you need assistance.
Regards,
--
Maxim Kuvyrkov
www.linaro.org
> On Jan 18, 2019, at 2:10 PM, Jakub Jelinek wrote:
>
> On Thu, Jan 17, 2019 at 04:00:47PM -0800, H.J. Lu w
fects the testsuite I am
> OK with the change if the RMs have no objections.
Hi Jonathan,
This issue dropped off my patch queue. The original patch still applies
without conflicts, and I'm retesting it on fresh mainline -- both cross and
native.
OK to commit if no regressions?
Thanks,
--
Maxim Kuvyrkov
www.linaro.org
es.
>
> OK for commit?
Looks good to me. I'm not an official scheduler maintainer, so wait for an ack
from a maintainer.
--
Maxim Kuvyrkov
www.linaro.org
r avr, which appears to be the best
> maintained cc0 target. There were no regressions for any of the 3
> targets.
>
> The patch was applied.
FWIW, the patch looks good.
--
Maxim Kuvyrkov
www.linaro.org
ins are mostly due to less spilling, so enable this on AArch64
> by default.
Hi Wilco,
Any notable regressions?
>
> OK for commit?
Looks good to me.
--
Maxim Kuvyrkov
www.linaro.org
>
> 2017-11-02 Wilco Dijkstra
>
> * config/aarch64/aarch64.c (aarch
r SuSe colleagues (Richard B., Jan H.) to commit under their assignment.
--
Maxim Kuvyrkov
www.linaro.org
>
> R.
>
> On Fri, Jul 07, 2017 at 09:30:28PM +0200, Torsten Duwe wrote:
>> Change since v11:
>>
>> < +#if TARGET_HAVE_NAMED_SECTIONS
>>
>>
> On Jul 20, 2017, at 3:06 PM, Torsten Duwe wrote:
>
> On Thu, Jul 20, 2017 at 01:58:06PM +0300, Maxim Kuvyrkov wrote:
>>> On Jul 17, 2017, at 3:10 PM, Torsten Duwe wrote:
>>>
>>> What is the next step now? Is anybody going to commit that patch?
>>
&
> On Jul 20, 2017, at 4:12 PM, Maxim Kuvyrkov wrote:
>
>> On Jul 20, 2017, at 3:06 PM, Torsten Duwe wrote:
>>
>> On Thu, Jul 20, 2017 at 01:58:06PM +0300, Maxim Kuvyrkov wrote:
>>>> On Jul 17, 2017, at 3:10 PM, Torsten Duwe wrote:
>>>>
>
r14 = @ltoffx(a#), r1
;;
ld8.mov r14 = [r14], a#
nop 0
;;
.mmi
ld4 r14 = [r14]
;;
shladd r8 = r14, 2, r0
nop 0
;;
.mib
nop 0
add r8 = r8, r14
br.ret.sptk.many b0
I don't se
> On Aug 1, 2017, at 1:52 PM, Andreas Schwab wrote:
>
> On Aug 01 2017, Gerald Pfeifer wrote:
>
>> On Mon, 31 Jul 2017, Maxim Kuvyrkov wrote:
>>> I don't see an easy way to correctly differentiate between "attribute"
>>> nops and "bu
> On Jan 30, 2017, at 2:48 PM, Maxim Kuvyrkov wrote:
>
> This patch port prefetch configuration from aarch32 backend to aarch64.
> There is no code-generation change from this patch.
>
> This patch also happens to address Kyrill's comment on Andrew's p
On 3 February 2017 at 14:58, Maxim Kuvyrkov wrote:
>> On Jan 30, 2017, at 5:50 PM, Maxim Kuvyrkov
>> wrote:
>>
>>> On Jan 30, 2017, at 3:23 PM, Kyrill Tkachov
>>> wrote:
>>>
>>> Hi Maxim,
>>>
>>> On 30/01/17 12:06, Maxi
Hi Andrew,
Thanks for pinging this. I've re-started the submission.
On 28 May 2017 at 08:01, Andrew Pinski wrote:
> On Tue, Feb 28, 2017 at 1:53 AM, Maxim Kuvyrkov
> wrote:
>>> On Feb 20, 2017, at 5:38 PM, Kyrill Tkachov
>>> wrote:
>>>
>>> Hi M
on_entry_value1);
> + else
> + gcc_unreachable ();
> +
> + patch_area_entry = 0;
> + if (list_length (pp_val) > 1)
> + {
> + tree patchable_function_entry_value2 =
> + TREE_VALUE (TREE_CHAIN (pp_val));
> +
> + if (tree_fits_uhwi_p (patchable_function_entry_value2))
> + patch_area_entry = tree_to_uhwi (patchable_function_entry_value2);
> + else
> + gcc_unreachable ();
> + }
> +}
> +
> + if (patch_area_entry > patch_area_size)
> +{
> + if (patch_area_size > 0)
> + warning (OPT_Wattributes, "Patchable function entry > size");
> + patch_area_entry = 0;
> +}
> +
> + /* Emit the patching area before the entry label, if any. */
> + if (patch_area_entry > 0)
> +targetm.asm_out.print_patchable_function_entry (asm_out_file,
> + patch_area_entry, true);
> +
>/* Do any machine/system dependent processing of the function name. */
> #ifdef ASM_DECLARE_FUNCTION_NAME
>ASM_DECLARE_FUNCTION_NAME (asm_out_file, fnname, current_function_decl);
> @@ -1838,6 +1878,12 @@ assemble_start_function (tree decl, const char *fnname)
>ASM_OUTPUT_FUNCTION_LABEL (asm_out_file, fnname, current_function_decl);
> #endif /* ASM_DECLARE_FUNCTION_NAME */
>
> + /* And the area after the label. Record it if we haven't done so yet. */
> + if (patch_area_size > patch_area_entry)
> +targetm.asm_out.print_patchable_function_entry (asm_out_file,
> +patch_area_size-patch_area_entry,
> + patch_area_entry == 0);
> +
>if (lookup_attribute ("no_split_stack", DECL_ATTRIBUTES (decl)))
> saw_no_split_stack = true;
> }
--
Maxim Kuvyrkov
quot;relevant", then call autopref_rank_data.
I don't have immediate answer on whether "relevant" or "irrelevant"
instructions should be pushed towards beginning of the ready list. Possibly,
we want to delay "relevant" instructions and push "irreleva
> On Sep 19, 2017, at 5:25 PM, Alexander Monakov wrote:
>
> On Tue, 19 Sep 2017, Maxim Kuvyrkov wrote:
>> How about the following:
>> 1. if both instructions are "irrelevant", then return "0".
>> 2. if one instruction is "relevant" and a
base'), then
> you should introduce ordering between classes (i.e. for two items with a
> different 'base' say if one is greater than the other).
Right. Let me meditate for couple of days on this :-) .
--
Maxim Kuvyrkov
www.linaro.org
apply this patch now to unblock qsort checking? Further changes or
> adjustments can then go in independently at a later time.
Yes, feel free to commit one of your versions.
--
Maxim Kuvyrkov
www.linaro.org
> Thanks.
> Alexander
>
>> --- a/gcc/haifa-sched.c
>> +++ b/
rt check due to not being symmetric for
load/store analysis (write == 0 or write == 1) in comparisons with "irrelevant"
instructions. Wilco's patch does not seem to address that, and, possibly,
makes the failure latent (I may be wrong here, it's late and I didn't finish
an
> On Oct 5, 2017, at 11:28 PM, Alexander Monakov wrote:
>
> On Thu, 5 Oct 2017, Maxim Kuvyrkov wrote:
>> I'm still working on analysis, but it appears to me that Alexander's patch
>> (current state of trunk) fails qsort check due to not being symmetric for
>&g
es were bootstrapped and regtested on x86_64-linux-gnu and
aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
This patch adds a debug counter to -fprefetch-loop-arrays pass. It can be
activated by "-fdbg-cnt=prefetch:10" to allow only 10 first prefetches to be
issued.
Bootstrapped and regtested on x86_64-linux-gnu and aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
0001-Add-debug-c
change in code-generation from this patch.
Bootstrapped and regtested on x86_64-linux-gnu and aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
0002-Improve-debug-output-of-loop-data-prefetching.patch
Description: Binary data
essive, which causes regressions on other benchmarks.
Bootstrapped and regtested on x86_64-linux-gnu and aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
0003-Fix-prefetch-heuristic-calculation.patch
Description: Binary data
so fixes a minor bug in aarch64_override_options_internal(), which
used "selected_cpu->tune" instead of "aarch64_tune_params".
Bootstrapped and regtested on x86_64-linux-gnu and aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
0004-Port-prefetch-configuration-from-aarc
it
suitable for -O2. I'll post this work in the next month.
Bootstrapped and regtested on x86_64-linux-gnu and aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
0005-Enable-fprefetch-loop-arrays-at-O3-for-cores-that-be.patch
Description: Binary data
This patch enables software prefetching at -O3 for Qualcomm's qdf24xx cores.
Bootstrapped and regtested on x86_64-linux-gnu and aarch64-linux-gnu.
--
Maxim Kuvyrkov
www.linaro.org
0006-Update-prefetch-tuning-parameters-for-falkor-and-qdf.patch
Description: Binary data
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