On Feb 18, 2015, at 3:32 PM, Maxim Kuvyrkov <maxim.kuvyr...@linaro.org> wrote:

> First of all, applauses!  I realize how difficult it was to reduce this 
> problem.
> 
> Your patch looks OK to me, but I can't shake off feeling that it will 
> pessimize cases when d8 is not used afterwards.  In particular, your patch 
> makes it impossible to use same register for output (operand 0) and inputs 
> (operands 1 and 2).
> 
> Did you consider using SCRATCHes instead of re-using operand 0 with early 
> clobber like in the attached [untested] patch?  If I got it all correct, 
> register allocator will get more freedom in deciding which register to use 
> for negated shift temporary, while still allowing reusing register from 
> operand 0 for one of the inputs.

There is a typo in the patch I sent (mode for last match_scratch should be QI, 
not DI).  Corrected patch attached.

--
Maxim Kuvyrkov
www.linaro.org


Attachment: bz1149.patch
Description: Binary data

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