Re: [PATCH] FreeBSD: Stop linking _p libs for -pg as of FreeBSD 14

I now also pushed this back to the gcc-14 and gcc-13 release branches. (The gcc-12 branch is presumably to end in a couple of months, so I have not pushed it there yet, but can do so if there is desire.) Sorry this fell through the cracks originally - and thank you for the contribution, Andreas

Re: [PATCH] arm: Increment LABEL_NUSES when using minipool_vector_label

On 13/02/2025 21:43, H.J. Lu wrote: > Increment LABEL_NUSES when using minipool_vector_label to avoid the zero > use count on minipool_vector_label. > > PR target/118866 > * config/arm/arm.cc (arm_reorg): Increment LABEL_NUSES when > using minipool_vector_label. > Whilst this patch isn't wrong p

[wwwdocs] gcc-15/changes: Mention the new -mveclibabi=aocl option in the IA-32/x86-64 section

Hi, I'm mentioning a change I made in the gcc-15/changes.html file. Validated with the W3 Validator. Is this ok to be pushed? Cheers, Filip Kastl -- 8< -- --- htdocs/gcc-15/changes.html | 6 ++ 1 file changed, 6 insertions(+) diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/cha

[PING][PATCH v2] libcpp: Fix incorrect line numbers in large files [PR108900]

From: Yash Shinde This patch addresses an issue in the C preprocessor where incorrect line number information is generated when processing files with a large number of lines. The problem arises from improper handling of location intervals in the line map, particularly when locations exceed LINE

Re: [r15-7532 Regression] FAIL: g++.dg/asan/pr118763.C -Os execution test on Linux/x86_64

"haochen.jiang" writes: > On Linux/x86_64, > > e96e1bb69c7b46db18e747ee379a62681bc8c82d is the first bad commit > commit e96e1bb69c7b46db18e747ee379a62681bc8c82d > Author: Jason Merrill > Date: Fri Feb 14 10:53:01 2025 +0100 > > c++: extended temp cleanups [PR118856] > > caused > > FAIL: g

Ping: [PATCH] late-combine: Tighten register class check [PR108840]

Ping Richard Sandiford writes: > gcc.target/aarch64/pr108840.c has failed since r15-268-g9dbff9c05520 > (which means that I really ought to have looked at it earlier). > > The test wants us to fold an SImode AND into all shifts that use it. > This is something that late-combine is supposed to do,

Re: [PING][PATCH v2] libcpp: Fix incorrect line numbers in large files [PR108900]

Hi, you may want to Cc Lewis Hyatt on such patches (adding him now), I didn't touch this area. Alexander On Mon, 17 Feb 2025, yash.shi...@windriver.com wrote: > From: Yash Shinde > > This patch addresses an issue in the C preprocessor where incorrect line > number information is generated wh

Re: [PATCH v1] RISC-V: Make VXRM as global register [PR118103]

"Li, Pan2" writes: > Thanks Jeff and Richard S. > > Not sure if I followed up the discussion correct, but this patch only try to > fix the vxrm insn > deleted during late-combine (same scenario as frm) by adding it to > global_regs. > > If global_regs is not the right place according to the sema

Re: [PATCH v3] x86: Properly find the maximum stack slot alignment

On Fri, Feb 14, 2025 at 2:11 PM Uros Bizjak wrote: > > On Fri, Feb 14, 2025 at 4:56 AM H.J. Lu wrote: > > > > On Thu, Feb 13, 2025 at 5:17 PM Uros Bizjak wrote: > > > > > > On Thu, Feb 13, 2025 at 9:31 AM H.J. Lu wrote: > > > > > > > > Don't assume that stack slots can only be accessed by stack

[PATCH v1] Vect: Fix ICE when get DImode from get_related_vectype_for_scalar_type [PR116351]

From: Pan Li This patch would like to fix the ICE similar as below, assump we have sample code: 1 │ int a, b, c; 2 │ short d, e, f; 3 │ long g (long h) { return h; } 4 │ 5 │ void i () { 6 │ for (; b; ++b) { 7 │ f = 5 >> a ? d : d << a; 8 │ e &= c

Re: [to-be-committed][RISC-V][PR target/118248] Avoid bogus alloca call in RISC-V backend

On Sun, Feb 16, 2025 at 4:38 PM Jeff Law wrote: > > This is Jakub's patch and Ian's testcase for the slightly vexing fault > building the D runtime with an s390x-x-riscv cross compiler. > > The core issue is we're allocating a vector to hold temporary registers > unconditionally, including cases w

Re: [PATCH] libgomp: avoid unused-variable-error when configured with CFLAGS=-DNDEBUG

Hi! On 2025-02-16T05:25:35+, "shynur ." wrote: > (The *new* patch is attached.) > > Hi, Jakub and Thomas~ I found some problems when compiling GCC, and it turns > out it was related to libgomp. > > $ git clone ... > $ mkdir gcc-build > $ cd gcc-build > > If I configure GCC

Re: [PATCH v1] Vect: Fix ICE when get DImode from get_related_vectype_for_scalar_type [PR116351]

On Mon, Feb 17, 2025 at 10:38 AM wrote: > > From: Pan Li > > This patch would like to fix the ICE similar as below, assump we have > sample code: > >1 │ int a, b, c; >2 │ short d, e, f; >3 │ long g (long h) { return h; } >4 │ >5 │ void i () { >6 │ for (; b; +

RE: [PATCH v1] Vect: Fix ICE when get DImode from get_related_vectype_for_scalar_type [PR116351]

> But that's wrong - read the comment before the code. We do support integer > mode > "generic" vectorization just fine. Iff there's anything to plug then > it's how we end > up thinking there's with_len support for DImode vectors. I see, then we need another place to fix this, let me have a tr

Re: [PATCH] Simplify _Hashtable::_M_merge_multi

On 16/02/2025 23:14, Jonathan Wakely wrote: On Sun, 16 Feb 2025 at 21:15, François Dumont wrote: Hi A minor simplification. libstdc++: Simplify _Hashtable::_M_merge_multi When merging two hashtable instances of the same type we do not need to go through _M_src_hash_code that also check for

Re: [PATCH v1] RISC-V: Make VXRM as global register [PR118103]

Richard Sandiford writes: > The problem seems to be that mode-switching overloads VXRM_MODE_NONE > to mean both "no requirement" and "unknown state". So we have: > > static int > singleton_vxrm_need (void) > { > /* Only needed for vector code. */ > if (!TARGET_VECTOR) > return VXRM_MODE_

Re: [PATCH] arm: Increment LABEL_NUSES when using minipool_vector_label

On Mon, Feb 17, 2025 at 7:08 PM Richard Earnshaw (lists) wrote: > > On 13/02/2025 21:43, H.J. Lu wrote: > > Increment LABEL_NUSES when using minipool_vector_label to avoid the zero > > use count on minipool_vector_label. > > > > PR target/118866 > > * config/arm/arm.cc (arm_reorg): Increment LABEL

Re: [PATCH] COBOL 3/15 92K bld: config and build machinery

"James K. Lowden" writes: > On Sat, 15 Feb 2025 21:18:50 + > Sam James wrote: > >> Please generate these files with vanilla autoconf-2.69, not >> distro-patched autoconf. > > Sure thing, Sam. I meant to do that; I thought I did. It might be that the > distro's autoconf still sneaked in aga

Re: [PATCH] COBOL 12/15 24K pos: Posix adapter framework

On Sat, 15 Feb 2025 21:24:52 + Sam James wrote: > > +prototypes.cpp: posix.txt > > + awk -F'[/.]' '{ print $$6 }' $^ | \ > > + while read F; do echo "/* $$F */" && man 2 $$F | \ > > + ./scrape.awk -v funcname=$$6; done > $@~ > > + @mv $@~ $@ > > + > > +posix.txt: > > +

Re: [PATCH] COBOL 8/15 360K cbl: parser support

On Sat, 15 Feb 2025 23:37:20 -0500 David Malcolm wrote: > +const char * > +cobol_get_sarif_source_language(const char *) > +{ > +return "cobol"; > +} > > Out of curiosity, did you try the SARIF output? This is a good test > for whether you?re properly using the GCC diagnostics subsy

[PATCH v2 09/16] Add assembler_name to cgraph_function_version_info.

This adds the assembler_name member to cgraph_function_version_info to store the base assembler name for the function to be mangled. This is used in later patches for refactoring FMV mangling. gcc/ChangeLog: * cgraph.cc (cgraph_node::insert_new_function_version): Record assembler

Re: [PATCH] COBOL 12/15 24K pos: Posix adapter framework

"James K. Lowden" writes: > On Sat, 15 Feb 2025 21:24:52 + > Sam James wrote: > >> > +prototypes.cpp: posix.txt >> > + awk -F'[/.]' '{ print $$6 }' $^ | \ >> > + while read F; do echo "/* $$F */" && man 2 $$F | \ >> > + ./scrape.awk -v funcname=$$6; done > $@~ >> > + @mv

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Sat, 15 Feb 2025 23:32:37 -0500 David Malcolm wrote: In defense of lack of free(3) ... > > +const char * > > +esc( size_t len, const char input[] ) { > > +  static char spaces[] = "([,;]?[[:space:]])+"; > > +  static char spaceD[] = "(\n {6}D" "|" "[,;]?[[:space:]])+"; > > +  static char buff

Re: [PATCH] COBOL 5/15 380K hdr: header files

"James K. Lowden" writes: > On Sat, 15 Feb 2025 21:30:16 + > Sam James wrote: > >> > + * This stand-in for std::regex was written because the >> > implementation provided >> > + * by the GCC libstdc++ in GCC 11 proved too slow, where "slow" >> > means "appears >> > + * not to terminate". So

Re: [PATCH] COBOL 5/15 380K hdr: header files

On Sat, 15 Feb 2025 21:30:16 + Sam James wrote: > > +cbl_refer_t * > > +negate( cbl_refer_t * refer, bool neg = true ) { > > + if( ! neg ) return refer; > > + assert( is_numeric(refer->field) ); > > These should be gcc_assert or gcc_checking_assert in general, > depending on the severity (

Re: [PATCH] COBOL 6/15 156K lex: lexer

"James K. Lowden" writes: > On Sat, 15 Feb 2025 23:32:37 -0500 > David Malcolm wrote: > > In defense of lack of free(3) ... > >> > +const char * >> > +esc( size_t len, const char input[] ) { >> > +  static char spaces[] = "([,;]?[[:space:]])+"; >> > +  static char spaceD[] = "(\n {6}D" "|" "[,;]

[pushed] c++: add fixed test [PR102455]

Tested x86_64-pc-linux-gnu, applying to trunk. -- >8 -- Fixed by r13-4564 but the tests are very different. PR c++/102455 gcc/testsuite/ChangeLog: * g++.dg/ext/vector43.C: New test. --- gcc/testsuite/g++.dg/ext/vector43.C | 7 +++ 1 file changed, 7 insertions(+) create mod

Re: [PATCH] COBOL 8/15 360K cbl: parser support

On Sat, 15 Feb 2025 23:37:20 -0500 David Malcolm wrote: > + rich_location richloc (line_table, token_location); > + bool ret = global_dc->diagnostic_impl (&richloc, nullptr, > option_id, > + gmsgid, &ap, DK_ERROR); > + va_end (ap); > + global_dc->end_gr

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Sat, 15 Feb 2025 23:32:37 -0500 David Malcolm wrote: > > +  free(copier); > > There?s a manual free of "copier" here, but there?s are various error- > handling early returns paths that will leak. Maybe just use a > std::string? > > Similarly with ?path?; I think this is always leaked. Maybe

Re: [PATCH] COBOL 9/15 532K api: GENERIC interface

On Sun, Feb 16, 2025 at 9:20 PM Robert Dubner wrote: > > > > > -Original Message- > > From: David Malcolm > > Sent: Saturday, February 15, 2025 23:39 > > To: James K. Lowden ; gcc-patches@gcc.gnu.org > > Subject: Re: [PATCH] COBOL 9/15 532K api: GENERIC interface > > > > On Sat, 2025-02-1

[PATCH] tree-optimization/118895 - ICE during PRE

When we simplify a NARY during PHI translation we have to make sure to not inject not available operands into it given that might violate the valueization hook constraints and we'd pick up invalid context-sensitive data in further simplification or as in this case later ICE when we try to insert th

Re: [PATCH v2] ira: Add a target hook for callee-saved register cost scale

> Jan Hubicka writes: > >> As described below, the patch also shows no change to AArch64 SPEC2017 > >> scores. I'm afraid I'll need help from x86 folks to do performance > >> testing there. > > > > I will look into this over weekend. I can write x86 version of the > > hooks. Though in earlier ema

[PATCH v2 15/16] Add error cases and tests for Aarch64 FMV.

This changes the ambiguation error for C++ to cover cases of differently annotated FMV function sets whose signatures only differ by their return type. It also adds tests covering many FMV errors for Aarch64, including redeclaration, and mixing target_clones and target_versions. gcc/cp/ChangeLog

[PATCH v2 04/16] Remove unnecessary `record` argument from maybe_version_functions.

Previously, the `record` argument in maybe_version_function allowed the call to cgraph_node::record_function_versions to be skipped. However, this was only skipped when both decls were already marked as versioned, in which case we trigger the early exit in record_function_versions instead. Theref

[PATCH v2 12/16] Refactor FMV name mangling.

This patch is an overhaul of how FMV name mangling works. Previously mangling logic was duplicated in several places across both target specific and independent code. This patch changes this such that all mangling is done in targetm.mangle_decl_assembler_name (including for the dispatched symbol a

[PATCH v2 11/16] Add clone_identifier function.

This is similar to clone_function_name and its siblings but takes an identifier tree node rather than a function declaration. This is to be used in conjunction with the identifier node stored in cgraph_function_version_info::assembler_name to mangle FMV functions in later patches. gcc/ChangeLog:

[PATCH v2 13/16] Change target_version semantics to follow ACLE specification.

This changes behavior of target_clones and target_version attributes to be inline with what is specified in the Arm C Language Extension. Notably this changes the scope and signature of multiversioned functions to that of the default version, and changes the resolver to be created at the implemen

Re: [PATCH] pair-fusion: Check for invalid use arrays [PR118320]

On 29/01/2025 18:46, Richard Sandiford wrote: > As Andrew says in the bugzilla comments, this PR is about a case where > we tried to fuse two stores of x0, one in which x0 was defined and one > in which it was undefined. merge_access_arrays failed on the conflict, > but the failure wasn't caught.

[PATCH v2 16/16] Remove FMV beta warning.

This patch removes the warning for target_version and target_clones in aarch64 as it is now spec compliant. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_process_target_version_attr): Remove warning. * config/aarch64/aarch64.opt: Mark -Wno-experimental-fmv-target

Re: [PATCH] pair-fusion: Check for invalid use arrays [PR118320]

Alex Coplan writes: > On 29/01/2025 18:46, Richard Sandiford wrote: >> As Andrew says in the bugzilla comments, this PR is about a case where >> we tried to fuse two stores of x0, one in which x0 was defined and one >> in which it was undefined. merge_access_arrays failed on the conflict, >> but

Re: [PATCH v2] ira: Add a target hook for callee-saved register cost scale

Jan Hubicka writes: >> As described below, the patch also shows no change to AArch64 SPEC2017 >> scores. I'm afraid I'll need help from x86 folks to do performance >> testing there. > > I will look into this over weekend. I can write x86 version of the > hooks. Though in earlier email you mention

Re: [PATCH] COBOL 3/15 92K bld: config and build machinery

On Sat, Feb 15, 2025 at 10:20 PM Sam James wrote: > > "James K. Lowden" writes: > > > From 5d53920602e234e4d99ae2d502e662ee3699978e 4 Oct 2024 12:01:22 -0400 > > From: "James K. Lowden" > > Date: Sat 15 Feb 2025 12:50:52 PM EST > > Subject: [PATCH] Add 'cobol' to 17 files > > The commit message

[PATCH v2 02/16] Add x86 FMV symbol tests

This is for testing the x86 mangling of FMV versioned function assembly names. gcc/testsuite/ChangeLog: * g++.target/i386/mv-symbols1.C: New test. * g++.target/i386/mv-symbols2.C: New test. * g++.target/i386/mv-symbols3.C: New test. * g++.target/i386/mv-symbols4.C

[PATCH v2 10/16] Add dispatcher_resolver_function and is_target_clone to cgraph_node.

These flags are used to make sure mangling is done correctly. gcc/ChangeLog: * cgraph.h (struct cgraph_node): Add dispatcher_resolver_function and is_target_clone. --- gcc/cgraph.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/gcc/cgraph.h b/gcc/cgr

[PATCH v2 07/16] Add version of make_attribute supporting string_slice.

gcc/ChangeLog: * attribs.cc (make_attribute): New function overload. * attribs.h (make_attribute): New function overload. --- gcc/attribs.cc | 14 +- gcc/attribs.h | 1 + 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/gcc/attribs.cc b/gcc/attribs.cc

[PATCH v2 03/16] Add string_slice class.

The string_slice inherits from array_slice and is used to refer to a substring of an array that is memory managed elsewhere without modifying the underlying array. For example, this is useful in cases such as when needing to refer to a substring of an attribute in the syntax tree. This commit al

[PATCH v2 08/16] Add get_clone_versions function.

This is a reimplementation of get_target_clone_attr_len, get_attr_str, and separate_attrs using string_slice and auto_vec to make memory management and use simpler. gcc/c-family/ChangeLog: * c-attribs.cc (handle_target_clones_attribute): Change to use get_clone_versions. gcc/Cha

[PATCH v2 06/16] Change function versions to be implicitly ordered.

This changes function version structures to maintain the default version as the first declaration in the linked data structures by giving priority to the set containing the default when constructing the structure. This allows for removing logic for moving the default to the first position which w

[PATCH v2 05/16] Update is_function_default_version to work with target_version.

Notably this respects target_version semantics where an unannotated function can be the default version. gcc/ChangeLog: * attribs.cc (is_function_default_version): Add target_version logic. --- gcc/attribs.cc | 27 --- 1 file changed, 20 insertions(+), 7 deletion

[PATCH] tree-optimization/98845 - ICE with tail-merging and DCE/DSE disabled

The following shows that tail-merging will make dead SSA defs live in paths where it wasn't before, possibly introducing UB or as in this case, uses of abnormals that eventually fail coalescing later. The fix is to register such defs for stmt comparison. Bootstrap and regtest running on x86_64-un

[PATCH v2 01/16] Add PowerPC FMV symbol tests.

This tests the mangling of function assembly names when annotated with target_clones attributes. gcc/testsuite/ChangeLog: * g++.target/powerpc/mvc-symbols1.C: New test. * g++.target/powerpc/mvc-symbols2.C: New test. * g++.target/powerpc/mvc-symbols3.C: New test. *

[PATCH v2 00/16] FMV refactor and ACLE compliance.

Hello all, Thank you for the feedback. There are some minor changes for this version: * Correctly attributed the symbol test patches to Andrew Calotti. * Changed the recording of the assembly name to be done by insert_new_function_version. To me this seems a much more natural time to do this

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Sat, 15 Feb 2025 23:32:37 -0500 David Malcolm wrote: > > +static bool > > +is_word_char( char ch ) { > > +  switch(ch) { > > +  case '0' ... '9': > > +  case 'a' ... 'z': > > +  case 'A' ... 'Z': > > +  case '$': > > +  case '-': > > +  case '_': > > +    return true; > > +  } > > +  return fa

[PATCH] testsuite, powerpc: Fix vsx-vectorize-* after alignment peeling [PR118567]

Hi, After the recent alignment peeling enhancements in the vectorizer we started vectorizing the "checking" loops (that check for the right result) in gcc.target/powerpc/vsx-vectorize-*.c, thus skewing the expected counts of various scan-dump-times tests (causing them to FAIL). This adds #pragma

Re: [PATCH] arm: Increment LABEL_NUSES when using minipool_vector_label

On 17/02/2025 13:54, Richard Earnshaw (lists) wrote: > On 17/02/2025 12:42, H.J. Lu wrote: >> On Mon, Feb 17, 2025 at 7:08 PM Richard Earnshaw (lists) >> wrote: >>> >>> On 13/02/2025 21:43, H.J. Lu wrote: Increment LABEL_NUSES when using minipool_vector_label to avoid the zero use count

Re: [PATCH] pair-fusion: A couple of fixes for sp updates [PR118429]

On 17/02/2025 16:15, Richard Sandiford wrote: > Alex Coplan writes: > > Hi Richard, > > > > On 29/01/2025 16:44, Richard Sandiford wrote: > >> The PR showed two issues with pair-fusion. The first is that the pass > >> treated stack pointer deallocations as ordinary register updates, and so > >> m

Re: [PATCH] libgomp: avoid unused-variable-error when configured with CFLAGS=-DNDEBUG

> As part of the Git commit message, please include a ChangeLog update (see > and 'git log'). I've written a new patch which is attached. > Basically, 'contrib/gcc-changelog/git_check_commit.py --print-changelog' > needs to accept your commi

[pushed] c++: add fixed test [PR96364]

Tested x86_64-pc-linux-gnu, applying to trunk. -- >8 -- We were rejecting this, but the test compiles correctly since r14-6346. PR c++/96364 gcc/testsuite/ChangeLog: * g++.dg/cpp0x/gen-attrs-88.C: New test. --- gcc/testsuite/g++.dg/cpp0x/gen-attrs-88.C | 14 ++ 1 fi

Re: [PATCH] COBOL 3/15 92K bld: config and build machinery

On Sat, 15 Feb 2025 21:18:50 + Sam James wrote: > > Subject: [PATCH] Add 'cobol' to 17 files > > The commit message summary (first line) should say something like the > email title, so 'cobol: bld: config and build machinery'. Roger, will do next time. > > +YFLAGS = -Werror -Wmidrule-val

Re: [PATCH] libgcc: i386/linux-unwind.h: always rely on sys/ucontext.h

On Thu, Jan 02, 2025 at 04:32:17PM +0100, Roman Kagan wrote: > When gcc is built for x86_64-linux-musl target, stack unwinding from > within signal handler stops at the innermost signal frame. The reason > for this behaviro is that the signal trampoline is not accompanied with > appropiate CFI dir

[pushed] c++: extended temps and statement-exprs [PR118763]

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- My last patch for 118856 broke the test for 118763 (which my testing didn't catch, for some reason), because it effectively reverted Jakub's recent fix (r15-7415) for that bug. It seems we need a new flag to indicate internal temporaries.

Re: [PATCH] COBOL 5/15 380K hdr: header files

On Sat, 15 Feb 2025 21:30:16 + Sam James wrote: > > + * This stand-in for std::regex was written because the > > implementation provided > > + * by the GCC libstdc++ in GCC 11 proved too slow, where "slow" > > means "appears > > + * not to terminate". Some invocations of std::regex_search to

Re: [PATCH] arm: Increment LABEL_NUSES when using minipool_vector_label

On 17/02/2025 12:42, H.J. Lu wrote: > On Mon, Feb 17, 2025 at 7:08 PM Richard Earnshaw (lists) > wrote: >> >> On 13/02/2025 21:43, H.J. Lu wrote: >>> Increment LABEL_NUSES when using minipool_vector_label to avoid the zero >>> use count on minipool_vector_label. >>> >>> PR target/118866 >>> * conf

Re: [PATCH] pair-fusion: A couple of fixes for sp updates [PR118429]

Hi Richard, On 29/01/2025 16:44, Richard Sandiford wrote: > The PR showed two issues with pair-fusion. The first is that the pass > treated stack pointer deallocations as ordinary register updates, and so > might move them earlier than another stack access (through a different > base register) th

Re: [PATCH] pair-fusion: A couple of fixes for sp updates [PR118429]

Alex Coplan writes: > Hi Richard, > > On 29/01/2025 16:44, Richard Sandiford wrote: >> The PR showed two issues with pair-fusion. The first is that the pass >> treated stack pointer deallocations as ordinary register updates, and so >> might move them earlier than another stack access (through a

[PATCH v2 14/16] Support mixing of target_clones and target_version for aarch64.

This patch adds support for the combination of target_clones and target_version in the definition of a versioned function. This patch changes is_function_default_version to consider a function declaration annotated with target_clones containing default to be a default version. It also changes the

Re: [PATCH] COBOL 7/15 492K par: parser

On Sat, 15 Feb 2025 23:35:16 -0500 David Malcolm wrote: On better messages ... > + if( ($$ & $2) == $2 ) { > +error_msg(@2, "%s clause repeated", clause); > +YYERROR; > + } > > Obviously not needed for initial release, bu

[PATCH v2] [testsuite] add x86 effective target

On Feb 13, 2025, Alexandre Oliva wrote: > @@ -14108,10 +14113,9 @@ proc dg-require-python-h { args } { > # Return 1 if the target supports heap-trampoline, 0 otherwise. > proc check_effective_target_heap_trampoline {} { > if { [istarget aarch64*-*-linux*] > - || [istarget i?86-*-darwi

[PATCH 2/2] libstdc++: Some concat_view bugfixes [PR115215, PR115218, LWG 4082]

Tested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- - Use __builtin_unreachable to suppress a false-positive "control reaches end of non-void function" warning in the recursive lambda (which the existing tests failed to notice since test01 wasn't being called at runtime) -

Re: [PATCH] RISC-V: Bugfix ICE for RVV intrinisc when using no-extension parameters

On 2/15/25 10:40 PM, Jin Ma wrote: On Sun, 16 Feb 2025 11:59:37 +0800, Jeff Law wrote: On 2/14/25 12:12 AM, Jin Ma wrote: When using riscv_v_abi, the return and arguments of the function should be adequately checked to avoid ICE. PR target/118872 gcc/ChangeLog: * config/riscv/r

Re: [PATCH] RISC-V: Fix failed tests for regression due to fix ICE patch

On 2/16/25 7:51 PM, Jin Ma wrote: Ref: https://github.com/ewlu/gcc-precommit-ci/issues/3096#issue-2854419069 gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/bug-9.c: Added new failure check. * gcc.target/riscv/rvv/base/target_attribute_v_with_intrinsic-17.c: Likewise.

Re: [PATCH v1] RISC-V: Fix ICE for target attributes has different xlen size

On 2/14/25 11:33 PM, pan2...@intel.com wrote: From: Pan Li This patch would like to avoid the ICE when the target attribute specific the xlen different to the cmd. Aka compile with rv64gc but target attribute with rv32gcv_zbb. For example as blow: 1 │ long foo (long a, long b) 2

Re: [PATCH] RISC-V: Bugfix ICE for RVV intrinisc when using no-extension parameters

On Mon, 17 Feb 2025 22:49:47 -0700, Jeff Law wrote: > > > On 2/15/25 10:40 PM, Jin Ma wrote: > > On Sun, 16 Feb 2025 11:59:37 +0800, Jeff Law wrote: > >> > >> > >> On 2/14/25 12:12 AM, Jin Ma wrote: > >>> When using riscv_v_abi, the return and arguments of the function should > >>> be adequately

RE: [PATCH v1] RISC-V: Fix ICE for target attributes has different xlen size

> So OK with the two whitespace fixes. Thanks Jeff, will commit with the whitespace fixes. Pan -Original Message- From: Jeff Law Sent: Tuesday, February 18, 2025 2:00 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject:

[PATCH] i386: Re-order i386.opt.urls

(Seems patch not sent out, resending) Hi all, The order of i386.opt.urls need to be the same as i386.opt according to auto builder. I thought the urls file is a dict but actually not. Commit as obvious. Thx, Haochen gcc/ChangeLog: * config/i386/i386.opt.urls: Adjust the order for avx1

Re: [PATCH] tree-optimization/98845 - ICE with tail-merging and DCE/DSE disabled

On Mon, 17 Feb 2025, Richard Biener wrote: > The following shows that tail-merging will make dead SSA defs live > in paths where it wasn't before, possibly introducing UB or as > in this case, uses of abnormals that eventually fail coalescing > later. The fix is to register such defs for stmt com

Re: [PATCH 1/1] AArch64: Fold builtins with highpart args to highpart equivalent [PR117850]

Hi Spencer, > On 17 Feb 2025, at 20:07, Spencer Abson wrote: > > Add a fold at gimple_fold_builtin to prefer the highpart variant of a builtin > if the arguments are better suited to it. This helps us avoid copying data > between lanes before operation. > > E.g. We prefer to use UMULL2 rather t

[PATCH 1/1] AArch64: Fold builtins with highpart args to highpart equivalent [PR117850]

Add a fold at gimple_fold_builtin to prefer the highpart variant of a builtin if the arguments are better suited to it. This helps us avoid copying data between lanes before operation. E.g. We prefer to use UMULL2 rather than DUP+UMULL for the following: uint16x8_t foo(const uint8x16_t s) {

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Mon, 2025-02-17 at 12:29 -0500, James K. Lowden wrote: > On Sat, 15 Feb 2025 23:32:37 -0500 > David Malcolm wrote: > > In defense of lack of free(3) ... > > > > +const char * > > > +esc( size_t len, const char input[] ) { > > > +  static char spaces[] = "([,;]?[[:space:]])+"; > > > +  static

[PATCH] builtins: Ensure sin and cos properly set errno when INFINITY is passed [PR80042]

POSIX says that sin and cos should set errno to EDOM when infinity is passed to them. Make sure this is accounted for in builtins.def, and add tests. gcc/ PR middle-end/80042 * builtins.def: (sin|cos)(f|l) can set errno. gcc/testsuite/ * gcc.dg/pr80042.c: New testcase. ---

Re: [PATCH] builtins: Ensure sin and cos properly set errno when INFINITY is passed [PR80042]

Peter Damianov writes: > POSIX says that sin and cos should set errno to EDOM when infinity is passed > to > them. Make sure this is accounted for in builtins.def, and add tests. > > gcc/ > PR middle-end/80042 > * builtins.def: (sin|cos)(f|l) can set errno. > gcc/testsuite/ > *

[PATCH 1/2] libstdc++: Sync concat_view with final paper revision [PR115209]

Tested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- The original implementation was accidentally based off of an older revision of the paper, P2542R7 instead of R8. As far as I can tell the only semantic change in the final revision is the relaxed constraints on the iterator's

Re: [PATCH] COBOL 7/15 492K par: parser

On Mon, Feb 17, 2025 at 1:43 PM James K. Lowden wrote: > > On Sat, 15 Feb 2025 23:35:16 -0500 > David Malcolm wrote: > > On better messages ... > > > + if( ($$ & $2) == $2 ) { > > +error_msg(@2, "%s clause repeated", clause); > > +YYERROR;

[PATCH 0/1] AArch64: Fold builtin calls w/ highpart args to highpart equivalent [PR117850]

Hi all, This patch implements the missed optimisation noted in PR117850. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117850 It covers all the AArch64 builtins that I can imagine this is sensible for, excluding vshll/vshll_n (for now) due to a discrepancy in their declarations. Bootstrapped and

Re: [PATCH] rx: allow cmpstrnsi len to be zero

On 2/15/25 12:32 PM, Keith Packard wrote: It's as reasonable as other methods such as turning it into a define_expand and emitting a conditional branch around the sequence when the count is zero. Thanks much. I suspect the cost of the PSW setting instructions is far less than a branch, so

Re: Ping: [PATCH] late-combine: Tighten register class check [PR108840]

On 2/17/25 4:33 AM, Richard Sandiford wrote: Ping Feel through the cracks. We really should acknowledge that you know this code better than anyone and shouldn't need to wait on review. Anyway, LGTM. jeff

[committed] i386: Simplify PARALLEL RTX scan in ix86_find_all_reg_use

UNSPEC and UNSPEC_VOLATILE never store. Remove unnecessary checks and simplify RTX scan in ix86_find_all_reg_use to scan only for SET RTX in the PARALLEL. gcc/ChangeLog: * config/i386/i386.cc (ix86_find_all_reg_use): Scan only for SET RTX in PARALLEL. Bootstrapped and regression tested o

Re: [PATCH][_Hashtable] Fix hash code cache usage

Ping for this bug fix, would you like a PR ? On 20/01/2025 22:12, François Dumont wrote: Hi In my work on fancy pointer support I've decided to always cache the hash code. Doing so I spotted a bug in the management of this cache when hash functor is stateful.     libstdc++: [_Hashtable] F

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Mon, 17 Feb 2025 15:35:16 -0500 David Malcolm wrote: > > > Have you tried running the compiler under valgrind?  Configure > > > with ?enable-valgrind-annotations and pass -wrap per=valgrind to > > > the driver. > a benefit of my suggested approach is that if you *do* need to use > valgrind at

[PATCH v2] builtins: Ensure sin and cos properly set errno when INFINITY is passed [PR80042]

POSIX says that sin and cos should set errno to EDOM when infinity is passed to them. Make sure this is accounted for in builtins.def, and add tests. gcc/ PR middle-end/80042 * builtins.def: (sin|cos)(f|l) can set errno. gcc/testsuite/ * gcc.dg/pr80042.c: New testcase. ---

Re: [PATCH] COBOL 8/15 360K cbl: parser support

On Mon, 17 Feb 2025 15:13:21 -0500 David Malcolm wrote: > > How do I do that?  I barely know the term; I have to look it up > > every time.  I don't find "sarif" anywhere in gcc.info or > > gccint.info.  > > (caveat: SARIF is one of my particular interests and thus I'm biased > towards it; not

Re: [PATCH] COBOL 8/15 360K cbl: parser support

On Mon, 17 Feb 2025 15:02:35 -0500 David Malcolm wrote: > > (Maybe zero_option_id would be a better name?) > > Ah - yes, now I see what you mean. I like that name. > > Can it be "const"? Already is! I renamed it to "option_zero" to prevent future confusion. --jkl

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Mon, 17 Feb 2025 15:28:48 -0500 David Malcolm wrote: > We shouldn't rely on assert to do checking of user-controllable input; > it should always be checked. Quite so. I think you'll like the change. --jkl

Re: [PATCH v3 0/8] LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization

在 2025/2/14 下午8:21, Xi Ruoyao 写道: This series is intended to fix some test failures on vect-reduc-chain-*.c by adding the [su]dot_prod* expand for LSX and LASX vector modes. But the code base of the related instructions was not readable, so clean it up first (using the approach learnt from AAr

Re: [PATCH] COBOL 8/15 360K cbl: parser support

On Mon, 2025-02-17 at 12:42 -0500, James K. Lowden wrote: > On Sat, 15 Feb 2025 23:37:20 -0500 > David Malcolm wrote: > > > +  rich_location richloc (line_table, token_location); > > +  bool ret = global_dc->diagnostic_impl (&richloc, nullptr, > > option_id, > > + 

RE: [PATCH] COBOL 8/15 360K cbl: parser support

> -Original Message- > From: Richard Biener > Sent: Monday, February 17, 2025 08:24 > To: James K. Lowden > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] COBOL 8/15 360K cbl: parser support > > On Sat, Feb 15, 2025 at 10:08 PM James K. Lowden > wrote: > > > > From 5d53920602e234e

Re: [PATCH] middle-end: Fixup constant integers when expanding __builtin_crc [PR118288]

On 2/16/25 2:07 PM, Uros Bizjak wrote: Constant integers with MSB set have to be represented as corresponding signed integers. Use gen_int_mode to emit them in the correct way. PR middle-end/118288 gcc/ChangeLog: * builtins.cc (expand_builtin_crc_table_based): Use gen_int_mo

Re: [PATCH] COBOL 7/15 492K par: parser

On Mon, 2025-02-17 at 13:42 -0500, James K. Lowden wrote: > On Sat, 15 Feb 2025 23:35:16 -0500 > David Malcolm wrote: > > On better messages ... > > > +  if( ($$ & $2) == $2 ) { > > +    error_msg(@2, "%s clause repeated", clause); > > +    YYERROR

Re: [PATCH] COBOL 6/15 156K lex: lexer

On Mon, 2025-02-17 at 12:42 -0500, James K. Lowden wrote: > On Sat, 15 Feb 2025 23:32:37 -0500 > David Malcolm wrote: > > > > +  free(copier); > > > > There?s a manual free of "copier" here, but there?s are various > > error- > > handling early returns paths that will leak. Maybe just use a > >

[Patch] OpenMP/Fortran: extend 'adjust_args' clause, fixes for it and declare variant [PR115271]

Hi all, on the fixes side: If a function only appeared in an INTERFACE block, the declare variant handling wasn't triggered - i.e. all diagnostic handled there wasn't. Additionally, when it was written as such in a module - and the module got used, it wasn't active such that the wrong (the non v

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