[PATCH] asan: Add --param=asan-kernel-mem-intrinsic-prefix= [PR108777]

Hi! While in the -fsanitize=address case libasan overloads memcpy, memset, memmove and many other builtins, such that they are always instrumented, Linux kernel for -fsanitize=kernel-address recently changed or is changing, such that memcpy, memset and memmove actually aren't instrumented because

Re: [PATCH 2/2] vect: Make partial trapping ops use predication [PR96373]

"Kewen.Lin" writes: > on 2023/2/13 21:57, Richard Sandiford wrote: >> "Kewen.Lin" writes: >>> Hi Richard, >>> >>> on 2023/1/27 19:08, Richard Sandiford via Gcc-patches wrote: PR96373 points out that a predicated SVE loop currently converts trapping unconditional ops into unpredicated ve

[PATCH] RISC-V: Finish all integer C/C++ intrinsics

From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/predicates.md: Refine codes. * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro. * config/riscv/riscv-v.cc: Refine codes. * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New enum. (clas

Re: [PATCH] asan: Add --param=asan-kernel-mem-intrinsic-prefix= [PR108777]

On Tue, 14 Feb 2023, Jakub Jelinek wrote: > Hi! > > While in the -fsanitize=address case libasan overloads memcpy, memset, > memmove and many other builtins, such that they are always instrumented, > Linux kernel for -fsanitize=kernel-address recently changed or is changing, > such that memcpy, m

nvptx: Adjust 'scan-assembler' in 'gfortran.dg/weak-1.f90' (was: Support for NOINLINE attribute)

Hi! On 2023-02-13T18:50:23+0100, Harald Anlauf via Gcc-patches wrote: > Pushed as: > > commit 086a1df4374962787db37c1f0d1bd9beb828f9e3 > On 2/12/23 22:28, Harald Anlauf via Gcc-patches wrote: >> There is one thing I cannot test, which is the handling of weak symbols >> on other platforms. A qu

Re: OpenMP Patch Ping – including "[13 Regression]" patches

* The 'loop' patch fixes a long-standing bug exposed by a GCC 13 commit, making it a "13 Regression" fix * The next two are simple bug fixes, relatively obvious and have very limited-scope code changes - fixing wrong-code issues. * The next two are a bit longer but also rather contained. * Jul

Re: [PATCH] debug: Support "phrs" for dumping a HARD_REG_SET

Hans-Peter Nilsson via Gcc-patches writes: > Ok to commit? It survived both a cris-elf regtest and a > x86_64-linux-gnu native regtest. :) OK, thanks. Richard > 8< > The debug-function in sel-sched-dump.cc that would be > suitable for a hookup to a command in gdb is guarded by > #ifd

[Patch] More LLP64 fixes and __PIC__ values fixes for PE targets

Attached patches OK?From 616e43ac41879040e73a266065874148553cddcc Mon Sep 17 00:00:00 2001 From: Jonathan Yong <10wa...@gmail.com> Date: Tue, 14 Feb 2023 10:37:03 + Subject: [PATCH 2/2] gcc/testsuite/gcc.dg: fix pic test case for PE targets gcc/testsuite/ChangeLog: * pic-2.c: fix expected _

[PATCH] c++: Add testcases from some Issaquah DRs

Hi! The following patch adds testcases for 5 DRs. In the DR2475, DR2530 and DR2691 my understanding is we already implement the desired behavior, in DR2478 partially (I've added 2 dg-bogus there, I think we inherit rather than overwrite DECL_DECLARED_CONSTINIT_P for explicit specialization somewh

Re: [PATCH] c++: Add testcases from some Issaquah DRs

On Tue, Feb 14, 2023 at 12:22:33PM +0100, Jakub Jelinek via Gcc-patches wrote: > 2023-02-14 Jakub Jelinek > > * g++.dg/DRs/dr2691.C: New test. Actually, this one isn't a DR, so maybe it should go into: * gcc/testsuite/c-c++-common/cpp/delimited-escape-seq-8.c: New test. instead.

[PATCH] tree-optimization/108782 - nested first order recurrence vectorization

First order recurrence vectorization isn't possible for nested loops. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/108782 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p): Make sure we're not vectorizing an inner loop. *

[PATCH] Fix small regression in Ada

It is present on the mainline and 12 branch and comes from Andrew P. and me forgetting about the VOID_TYPE_P case of SAVE_EXPRs. Tested on x86-64/Linux, applied on mainline and 12 branch as obvious. 2023-02-14 Eric Botcazou gcc/ * gimplify.cc (gimplify_save_expr): Add missing guard.

[og12] In 'libgomp/allocator.c:omp_realloc', route 'free' through 'MEMSPACE_FREE' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator)

Hi Andrew! On 2022-01-13T11:13:51+, Andrew Stubbs wrote: > Updated patch: this version fixes some missed cases of malloc in the > realloc implementation. Right, and as it seems I've run into another issue: a stray 'free'. > --- a/libgomp/allocator.c > +++ b/libgomp/allocator.c Re 'omp_real

Re: [PATCH] target/108738 - optimize bit operations in STV

On Thu, 9 Feb 2023, Richard Biener wrote: > The following does low-hanging optimizations, combining bitmap > test and set and removing redundant operations. > > This shaves off half of the testcase compile time. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, OK? Ping - sorry, forgot t

Re: [PATCH] target/108738 - STV bitmap operations compile-time hog

On Thu, 9 Feb 2023, Richard Biener wrote: > When the set of candidates becomes very large then repeated > bit checks on it during the build of an actual chain can become > slow because of the O(n) nature of bitmap tests. The following > switches the candidates bitmaps to the tree representation b

[PATCH] RISC-V: Add ternary constraint tests

From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/ternop_vv_constraint-1.c: New test. * gcc.target/riscv/rvv/base/ternop_vv_constraint-2.c: New test. * gcc.target/riscv/rvv/base/ternop_vx_constraint-1.c: New test. * gcc.target/riscv/rvv/base/

[PATCH] Speedup DF dataflow solver

The following makes sure to process blocks that follow the current block in the iteration order in the same iteration and only postpone blocks that would be visited earlier to the next iteration. For the all.i testcase in PR26854 at -O2 this shaves off 50% of the time to solve the DF RD problem, o

Re: [PATCH] amdgcn: Add instruction patterns for vector operations on complex numbers

On 09/02/2023 20:13, Andrew Jenner wrote: This patch introduces instruction patterns for complex number operations in the GCN machine description. These patterns are cmul, cmul_conj, vec_addsub, vec_fmaddsub, vec_fmsubadd, cadd90, cadd270, cmla and cmls (cmla_conj and cmls_conj were not found t

[PATCH] ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679)

Hi, PR 108679 testcase shows a situation when IPA-CP is able to track a scalar constant in a single-field structure that is part of a bigger structure. This smaller struture is however also passed in a few calls to other functions, but the two same-but-different entities, originally places at the

[PATCH] More DF worklist solver improvements

The following switches the double-queue iteration solver with a single-queue one that prioritizes backward data flow solving over forward progress. That is, it first converges on earlier cycles before propagating the (possibly again chainging) data to the following blocks. This improves data loca

[PATCH] RISC-V: Replace simm32_p with immediate_operand (Pmode)

From: Ju-Zhe Zhong simm32_p is used to check constant int value within 32-bit. It's used in handling SEW = 64 in rv32 system since such constant int value with 32-bit allow us use vx instruction. The current implementation of simm32_p is quite ugly and now I figure out immedate_operand (op, pmod

Re: [PATCH] ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679)

On Tue, Feb 14, 2023 at 3:50 PM Martin Jambor wrote: > > Hi, > > PR 108679 testcase shows a situation when IPA-CP is able to track a > scalar constant in a single-field structure that is part of a bigger > structure. This smaller struture is however also passed in a few calls > to other functions

Re: [og12] In 'libgomp/allocator.c:omp_realloc', route 'free' through 'MEMSPACE_FREE' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator)

On 14/02/2023 12:54, Thomas Schwinge wrote: Hi Andrew! On 2022-01-13T11:13:51+, Andrew Stubbs wrote: Updated patch: this version fixes some missed cases of malloc in the realloc implementation. Right, and as it seems I've run into another issue: a stray 'free'. --- a/libgomp/allocator.

[PATCH] Improve VN PHI hash table handling

The hash function of PHIs is weak since we want to be able to CSE them even across basic-blocks in some cases. The following avoids weakening the hash for cases we are never going to CSE, reducing the number of collisions and avoiding redundant work in the hash and equality functions. Bootstrappe

[PATCH] Fix possible sanopt compile-time hog

While working on bitmap operations I figured sanopt.cc uses a sbitmap worklist, iterating using bitmap_first_set_bit on it. That's quadratic since bitmap_first_set_bit for sbitmap is O(n). The fix is to use regular bitmaps for the worklist and the bitmap feeding it and to avoid a useless copy. Bo

[PATCH] RISC-V: Remove "extern“ for namespace [NFC]

From: Ju-Zhe Zhong Just like other targets, aarch64_sve namespace in aarch64-protos.h arm_mve in arm-protos, nds namesace in nds32-protos.h They all don't have 'extern' in namespace. This is a NFC patch to make RISC-V be consistent with other targets. No functionality change. gcc/ChangeLog:

Re: [PATCH] Fix possible sanopt compile-time hog

On Tue, Feb 14, 2023 at 04:20:24PM +0100, Richard Biener wrote: > While working on bitmap operations I figured sanopt.cc uses > a sbitmap worklist, iterating using bitmap_first_set_bit on it. > That's quadratic since bitmap_first_set_bit for sbitmap is O(n). > > The fix is to use regular bitmaps f

Re: [PATCH] target/108738 - optimize bit operations in STV

On Thu, Feb 9, 2023 at 3:25 PM Richard Biener via Gcc-patches wrote: > > The following does low-hanging optimizations, combining bitmap > test and set and removing redundant operations. > > This shaves off half of the testcase compile time. > > Bootstrapped and tested on x86_64-unknown-linux-gnu,

Re: [PATCH] target/108738 - STV bitmap operations compile-time hog

On Thu, Feb 9, 2023 at 3:25 PM Richard Biener via Gcc-patches wrote: > > When the set of candidates becomes very large then repeated > bit checks on it during the build of an actual chain can become > slow because of the O(n) nature of bitmap tests. The following > switches the candidates bitmaps

[PATCH] bpf: fix memory constraint of ldx/stx instructions [PR108790]

In some cases where the target memory address for an ldx or stx instruction could be reduced to a constant, GCC could emit a malformed instruction like: ldxdw %r0,0 Rather than the expected form: ldxdw %rX, [%rY + OFFSET] This is due to the constraint allowing a const_int operand, which

Re: nvptx: Adjust 'scan-assembler' in 'gfortran.dg/weak-1.f90' (was: Support for NOINLINE attribute)

Hi Thomas, On 2/14/23 10:35, Thomas Schwinge wrote: Hi! On 2023-02-13T18:50:23+0100, Harald Anlauf via Gcc-patches wrote: Pushed as: commit 086a1df4374962787db37c1f0d1bd9beb828f9e3 On 2/12/23 22:28, Harald Anlauf via Gcc-patches wrote: There is one thing I cannot test, which is the hand

[pushed] libstdc++: Update an open-std.org link

I *think* I now consistently got www.open-std.org covered throughout the entire tree. Pushed. Gerald libstdc++-v3/ChangeLog: * doc/xml/manual/status_cxx2017.xml: Update an open-std.org link to www.open-std.org and https. * doc/html/manual/status.html: Regenerate. --- li

Re: [committed] wwwdocs: cxx-status: Move www.open-std.org to https

On Mon, 30 Jan 2023, Gerald Pfeifer wrote: > On Sun, 31 Jul 2022, Jonathan Wakely wrote: >> https://www.open-std.org/ says "The site www.open-std.org is holding a >> number of web pages for groups producing open standards:" but I don't >> think it really matters which we use. > It's not a biggie, t

Re: [PATCH v5 3/5] p1689r5: initial support

On 1/25/23 13:06, Ben Boeckel wrote: This patch implements support for [P1689R5][] to communicate to a build system the C++20 module dependencies to build systems so that they may build `.gcm` files in the proper order. Thanks again. Support is communicated through the following three new fla

Re: [PATCH] c++: fix ICE in joust_maybe_elide_copy [PR106675]

On 2/13/23 09:06, Marek Polacek wrote: joust_maybe_elide_copy checks that the last conversion in the ICS for the first argument is ck_ref_bind, which is reasonable, because we've checked that we're dealing with a copy/move constructor. But it can also happen that we couldn't figure out which con

Re: [PATCH] c++: Add testcases from some Issaquah DRs

On 2/14/23 03:33, Jakub Jelinek wrote: On Tue, Feb 14, 2023 at 12:22:33PM +0100, Jakub Jelinek via Gcc-patches wrote: 2023-02-14 Jakub Jelinek * g++.dg/DRs/dr2691.C: New test. Actually, this one isn't a DR, so maybe it should go into: * gcc/testsuite/c-c++-common/cpp/delimi

Re: [PATCH 1/2] c++: factor out TYPENAME_TYPE substitution

On 2/13/23 09:23, Patrick Palka wrote: [N.B. this is a corrected version of https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607443.html ] This patch factors out the TYPENAME_TYPE case of tsubst into a separate function tsubst_typename_type. It also factors out the two tsubst flags contr

Re: [PATCH 2/2] c++: TYPENAME_TYPE lookup ignoring non-types [PR107773]

On 2/13/23 09:23, Patrick Palka wrote: [N.B. this is a corrected version of https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607443.html ] Currently when resolving a TYPENAME_TYPE for 'typename T::m' via make_typename_type, we consider only type bindings of 'm' and ignore non-type ones.

[PATCH] RISC-V: Rearrange the organization of declarations of RVV intrinsics [NFC]

From: Ju-Zhe Zhong This patch doesn't change any functionality, only rearrange the oraganzation. Make it to be consistent with RVV ISA. Add annotation for it to make codes more readable. gcc/ChangeLog: * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange. (

Re: [PATCH] bpf: fix memory constraint of ldx/stx instructions [PR108790]

Hi David. > In some cases where the target memory address for an ldx or stx > instruction could be reduced to a constant, GCC could emit a malformed > instruction like: > > ldxdw %r0,0 > > Rather than the expected form: > > ldxdw %rX, [%rY + OFFSET] > > This is due to the constraint allo

[og12] Address cast to pointer from integer of different size in 'libgomp/target.c:gomp_target_rev' (was: [OG12][committed] openmp: Add support for the 'present' modifier)

Hi! On 2023-02-09T21:17:44+, Kwok Cheung Yeung wrote: > I've ported my patch for supporting the OpenMP 5.1 'present' modifier > and committed it to the devel/omp/gcc-12 development branch: > > 229b705862c openmp: Add support for the 'present' modifier > > Tested with offloading on amdgcn and

Re: [PATCH 1/2] c++: factor out TYPENAME_TYPE substitution

On 2/14/23 14:15, Jason Merrill wrote: On 2/13/23 09:23, Patrick Palka wrote: [N.B. this is a corrected version of https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607443.html ] This patch factors out the TYPENAME_TYPE case of tsubst into a separate function tsubst_typename_type.  It als

Re: [PATCH 2/2] c++: speculative constexpr and is_constant_evaluated [PR108243]

On 2/10/23 08:51, Patrick Palka wrote: On Fri, 10 Feb 2023, Patrick Palka wrote: On Thu, 9 Feb 2023, Patrick Palka wrote: On Thu, 9 Feb 2023, Jason Merrill wrote: On 2/9/23 09:36, Patrick Palka wrote: On Sun, 5 Feb 2023, Jason Merrill wrote: On 2/3/23 15:51, Patrick Palka wrote: On Mon,

Re: [PATCH] c++: sizeof(expr) in non-templated requires-expr [PR108563]

On 2/9/23 10:22, Patrick Palka wrote: On Thu, 9 Feb 2023, Patrick Palka wrote: When substituting into sizeof(expr), tsubst_copy_and_build elides substitution into the operand if args is NULL_TREE, and instead considers the TREE_TYPE of the operand. But here the (templated) operand is a TEMPLAT

[PATCH] RISC-V: Move saturating add/subtract md pattern location [NFC]

From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/vector.md (@pred_): Rearrange. (@pred__scalar): Ditto. (*pred__scalar): Ditto. (*pred__extended_scalar): Ditto. --- gcc/config/riscv/vector.md | 490 ++--- 1 file changed, 245 inser

Re: [OG12][committed] openmp: Add support for the 'present' modifier

Hi I have also committed the following patch to devel/omp/gcc-12 to show the 'present' modifier in the Fortran parse tree dump. e7279cc2eda openmp: Add support for 'present' modifier in the Fortran parse tree dump KwokFrom e7279cc2eda2a0c50cff19ee4e02eea3d7808f68 Mon Sep 17 00:00:00 2001 Fr

[PATCH] gen_reload: Correct parameter for fatal_insn call

Committed as obvious. Also, I wrote the neighboring code - apparently including that line... -- >8 -- Observed when disabling LEGITIMIZE_RELOAD_ADDRESS for cris-elf: the current code doesn't handle the post-cc0 parallel-with-clobber-of-cc0 sets, dropping down into the fatal_insn call. Following

[r13-5971 Regression] FAIL: gcc.target/i386/pr108774.c (test for excess errors) on Linux/x86_64

On Linux/x86_64, a33e3dcbd15e73603796e30b5eeec11a0c8bacec is the first bad commit commit a33e3dcbd15e73603796e30b5eeec11a0c8bacec Author: Vladimir N. Makarov Date: Mon Feb 13 16:05:04 2023 -0500 RA: Clear reg equiv caller_save_p flag when clearing defined_p flag caused FAIL: gcc.target/

[pushed] wwwdocs: news/profiledriven: Update a link

Pushed. Gerald --- htdocs/news/profiledriven.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/htdocs/news/profiledriven.html b/htdocs/news/profiledriven.html index 82febc6d..3acacb78 100644 --- a/htdocs/news/profiledriven.html +++ b/htdocs/news/profiledriven.html @@ -276,7

[PATCH] warn-access: wrong -Wdangling-pointer with labels [PR106080]

-Wdangling-pointer warns when the address of a label escapes. This causes grief in OCaml () as well as in the kernel: because it uses #define _THIS_IP_ ({ __label__ __here; __here: (unsigned long)

Re: [patch, gfortran.dg] Allow test to pass on mingw

On Fri, Jan 20, 2023 at 10:21 PM Jerry DeLisle via Fortran wrote: > > Hi all, > > Similar to a patch I committed a while ago for Cygwin, the attached > patch allows it to pass on the mingw version of gfortran. > > It is trivial. > > Ok for trunk? > > Regards, > > Jerry ping