From: Ju-Zhe Zhong <juzhe.zh...@rivai.ai>
Just like other targets, aarch64_sve namespace in aarch64-protos.h
arm_mve in arm-protos, nds namesace in nds32-protos.h
They all don't have 'extern' in namespace.
This is a NFC patch to make RISC-V be consistent with other targets.
No functionality change.
gcc/ChangeLog:
* config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
(init_builtins): Ditto.
(mangle_builtin_type): Ditto.
(verify_type_context): Ditto.
(handle_pragma_vector): Ditto.
(builtin_decl): Ditto.
(expand_builtin): Ditto.
(const_vec_all_same_in_range_p): Ditto.
(legitimize_move): Ditto.
(emit_vlmax_op): Ditto.
(emit_nonvlmax_op): Ditto.
(get_vlmul): Ditto.
(get_ratio): Ditto.
(get_ta): Ditto.
(get_ma): Ditto.
(get_avl_type): Ditto.
(calculate_ratio): Ditto.
(enum vlmul_type): Ditto.
(simm5_p): Ditto.
(neg_simm5_p): Ditto.
(has_vi_variant_p): Ditto.
---
gcc/config/riscv/riscv-protos.h | 40 ++++++++++++++++-----------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index ee8e903ddf5..81ad2eabc00 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -115,7 +115,7 @@ extern const riscv_cpu_info *riscv_find_cpu (const char *);
/* Routines implemented in riscv-selftests.cc. */
#if CHECKING_P
namespace selftest {
-extern void riscv_run_selftests (void);
+void riscv_run_selftests (void);
} // namespace selftest
#endif
@@ -141,24 +141,24 @@ enum avl_type
VLMAX,
};
/* Routines implemented in riscv-vector-builtins.cc. */
-extern void init_builtins (void);
-extern const char *mangle_builtin_type (const_tree);
+void init_builtins (void);
+const char *mangle_builtin_type (const_tree);
#ifdef GCC_TARGET_H
-extern bool verify_type_context (location_t, type_context_kind, const_tree,
bool);
+bool verify_type_context (location_t, type_context_kind, const_tree, bool);
#endif
-extern void handle_pragma_vector (void);
-extern tree builtin_decl (unsigned, bool);
-extern rtx expand_builtin (unsigned int, tree, rtx);
-extern bool const_vec_all_same_in_range_p (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
-extern bool legitimize_move (rtx, rtx, machine_mode);
-extern void emit_vlmax_op (unsigned, rtx, rtx, machine_mode);
-extern void emit_nonvlmax_op (unsigned, rtx, rtx, rtx, machine_mode);
-extern enum vlmul_type get_vlmul (machine_mode);
-extern unsigned int get_ratio (machine_mode);
-extern int get_ta (rtx);
-extern int get_ma (rtx);
-extern int get_avl_type (rtx);
-extern unsigned int calculate_ratio (unsigned int, enum vlmul_type);
+void handle_pragma_vector (void);
+tree builtin_decl (unsigned, bool);
+rtx expand_builtin (unsigned int, tree, rtx);
+bool const_vec_all_same_in_range_p (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
+bool legitimize_move (rtx, rtx, machine_mode);
+void emit_vlmax_op (unsigned, rtx, rtx, machine_mode);
+void emit_nonvlmax_op (unsigned, rtx, rtx, rtx, machine_mode);
+enum vlmul_type get_vlmul (machine_mode);
+unsigned int get_ratio (machine_mode);
+int get_ta (rtx);
+int get_ma (rtx);
+int get_avl_type (rtx);
+unsigned int calculate_ratio (unsigned int, enum vlmul_type);
enum tail_policy
{
TAIL_UNDISTURBED = 0,
@@ -176,10 +176,10 @@ enum tail_policy get_prefer_tail_policy ();
enum mask_policy get_prefer_mask_policy ();
rtx get_avl_type_rtx (enum avl_type);
opt_machine_mode get_vector_mode (scalar_mode, poly_uint64);
-extern bool simm5_p (rtx);
-extern bool neg_simm5_p (rtx);
+bool simm5_p (rtx);
+bool neg_simm5_p (rtx);
#ifdef RTX_CODE
-extern bool has_vi_variant_p (rtx_code, rtx);
+bool has_vi_variant_p (rtx_code, rtx);
#endif
}
--
2.36.3
