When registering a dynamic unwinding frame the fde list is sorted.
Previously, we split the list into a sorted and an unsorted part,
sorted the later using heap sort, and merged both. That can be
quite slow due to the large number of (expensive) comparisons.
This patch replaces that logic with a
On Mon, 21 Nov 2022, Qing Zhao wrote:
>
>
> > On Nov 18, 2022, at 11:31 AM, Kees Cook wrote:
> >
> > On Fri, Nov 18, 2022 at 03:19:07PM +, Qing Zhao wrote:
> >> Hi, Richard,
> >>
> >> Honestly, it?s very hard for me to decide what?s the best way to handle
> >> the interaction
> >> betwe
* Thomas Neumann:
> Hi,
>
> When dynamically linking a fast enough machine hides the latency, but when
> Statically linking or on slower devices this change caused a 5x increase
> in
> Instruction count and 2x increase in cycle count before getting to main.
>
> I have looked at wa
On Mon, Nov 21, 2022 at 5:49 PM Jeff Law wrote:
>
>
> On 11/21/22 09:35, Aldy Hernandez via Gcc-patches wrote:
> > I've been playing around with removing the legacy VRP code for the
> > next release. It's a layered onion to get this right, but the first
> > bit is pretty straightforward and may b
On Tue, Nov 22, 2022 at 9:24 AM Richard Biener
wrote:
>
> On Mon, Nov 21, 2022 at 5:49 PM Jeff Law wrote:
> >
> >
> > On 11/21/22 09:35, Aldy Hernandez via Gcc-patches wrote:
> > > I've been playing around with removing the legacy VRP code for the
> > > next release. It's a layered onion to get
On Tue, Nov 22, 2022 at 8:59 AM Richard Sandiford via Gcc-patches
wrote:
>
> Wilco Dijkstra writes:
> > Add a reassocation width for FMAs in per-CPU tuning structures. Keep the
> > existing setting for cores with 2 FMA pipes, and use 4 for cores with 4
> > FMA pipes. This improves SPECFP2017 on
On Mon, Nov 21, 2022 at 06:31:47PM -0500, Jason Merrill via Gcc-patches wrote:
> Tested x86_64-pc-linux-gnu, and also manually changing the HAVE_DECL_STRCHRNUL
> flag. OK for trunk?
>
> -- 8< --
>
> The Contracts implementation uses strchrnul, which is a glibc extension, so
> bootstrap broke on
gcc/testsuite/ChangeLog:
Riscv don't support "-fprefetch-loop-arrays" option, skip.
2022-11-22 Yixuan Chen
* gcc.dg/pr106397.c: Riscv don't support "-fprefetch-loop-arrays"
option, skip.
---
gcc/testsuite/gcc.dg/pr106397.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
The following avoids using type_for_mode on vector modes which might
not work for all frontends. Instead we look for the inner mode
type and use build_vector_type_for_mode instead.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/107672
* tree-vec
On Tue, Nov 22, 2022 at 9:43 AM Yixuan Chen wrote:
>
> gcc/testsuite/ChangeLog:
>
> Riscv don't support "-fprefetch-loop-arrays" option, skip.
Looking around other testcases simply add -w to the set of command-line options,
can you do that instead?
OK with that change,
Richard.
> 2022-11-22 Yi
On Fri, Nov 18, 2022 at 3:47 PM Segher Boessenkool
wrote:
>
> [ Please cc: me and Ke Wen on rs6000 patches ]
>
> On Thu, Nov 17, 2022 at 07:54:29AM +0800, Hongyu Wang wrote:
> > r13-3950-g071e428c24ee8c enables O2 small loop unrolling, but it breaks
> > -fno-unroll-loops for rs6000 with loop_unrol
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32 on-stack argument is not padded in
the same direction depending on endianness.
This patch fixes the testcase so that it expects the argument in the
right stack location, similarly to what other tests do
On 11/22/22 09:25, Richard Biener wrote:
On Tue, Nov 22, 2022 at 9:24 AM Richard Biener
wrote:
On Mon, Nov 21, 2022 at 5:49 PM Jeff Law wrote:
On 11/21/22 09:35, Aldy Hernandez via Gcc-patches wrote:
I've been playing around with removing the legacy VRP code for the
next release. It's
Would it be possible to trigger lazy registration if the version is read
as a zero? This would not introduce any additional atomic instructions
on the fast path.
yes, that is possible. The main problem is the transition from lazy to
non-lazy mode when the first exception is thrown. We must som
On Tue, Nov 22, 2022 at 10:04 AM Aldy Hernandez wrote:
>
>
>
> On 11/22/22 09:25, Richard Biener wrote:
> > On Tue, Nov 22, 2022 at 9:24 AM Richard Biener
> > wrote:
> >>
> >> On Mon, Nov 21, 2022 at 5:49 PM Jeff Law wrote:
> >>>
> >>>
> >>> On 11/21/22 09:35, Aldy Hernandez via Gcc-patches wrot
Hi!
The following patch fixes multiple bugs in warn_for_sign_compare related to
the BIT_NOT_EXPR related warnings.
My understanding is that what those 3 warnings are meant to warn (since 1995
apparently) is the case where we have BIT_NOT_EXPR of a zero-extended
value, so in result_type the value i
I noticed the option is ignored because @DO_LINK_MUTEX@
is not defined in d/Make-lang.in.
Tested locally before and after the patch.
Ready to be installed?
Thanks,
Martin
gcc/ChangeLog:
* Makefile.in: Set DO_LINK_MUTEX.
gcc/d/ChangeLog:
* Make-lang.in: Use it as $DO_LINK_MUTEX
gcc/testsuite/ChangeLog:
Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option.
2022-11-22 Yixuan Chen
* gcc.dg/pr106397.c: Riscv don't support "-fprefetch-loop-arrays"
option, add "-w" option.
---
gcc/testsuite/gcc.dg/pr106397.c | 1 +
1 file changed, 1 insertion(+)
On 11/17/22 17:37, Andrea Corallo via Gcc-patches wrote:
From: Stam Markianos-Wright
In the past we had only defined the vsubq_x generic overload of the
vsubq_x_* intrinsics for float vector types. This would cause them
to fall back to the `__ARM_undef` failure state if they was called
thro
> Am 22.11.2022 um 10:49 schrieb Yixuan Chen :
>
> gcc/testsuite/ChangeLog:
>
> Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option.
Ok.
Richard
> 2022-11-22 Yixuan Chen
>
>* gcc.dg/pr106397.c: Riscv don't support "-fprefetch-loop-arrays"
> option, add "-w" o
Richard & Tamar,
On Fri, 26 Aug 2022 at 15:29, Tamar Christina wrote:
>
> > -Original Message-
> > From: Gcc-patches > bounces+tamar.christina=arm@gcc.gnu.org> On Behalf Of Richard
> > Biener via Gcc-patches
> > Sent: Friday, August 26, 2022 10:08 AM
> > To: mtsamis
> > Cc: GCC Patc
Hi Richard,
> I guess an obvious question is: if 1 (rather than 2) was the right value
> for cores with 2 FMA pipes, why is 4 the right value for cores with 4 FMA
> pipes? It would be good to clarify how, conceptually, the core property
> should map to the fma_reassoc_width value.
1 turns off re
Tamar Christina via Gcc-patches writes:
>> So it's not easily possible the within current infrastructure. But it does
>> look
>> like ARM might eventually benefit from something like STV on x86?
>>
>
> I'm not sure. The problem with trying to do this in RTL is that you'd have
> to be
> able t
Tested x86_64-linux, Pushed to trunk. Backports will follow.
-- >8 --
The array of pool sizes was previously adjusted to work for msp430-elf
which has 16-bit int and either 16-bit size_t or 20-bit size_t. The
largest pool sizes were disabled unless size_t has more than 20 bits.
The H8 family has
Christophe Lyon writes:
> On 11/17/22 17:37, Andrea Corallo via Gcc-patches wrote:
>> From: Stam Markianos-Wright
>> In the past we had only defined the vsubq_x generic overload of the
>> vsubq_x_* intrinsics for float vector types. This would cause them
>> to fall back to the `__ARM_undef` fai
Hi,
> -Original Message-
> From: Philipp Tomsich
> Sent: Tuesday, November 22, 2022 10:35 AM
> To: Tamar Christina
> Cc: Richard Biener ; mtsamis
> ; GCC Patches ;
> jiangning@amperecomputing.com
> Subject: Re: [PATCH] Add pattern to convert vector shift + bitwise and +
> multiply to
Christophe Lyon via Gcc-patches writes:
> gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
> big-endian, because the _Decimal32 on-stack argument is not padded in
> the same direction depending on endianness.
>
> This patch fixes the testcase so that it expects the argument in the
> ri
On Tue, 22 Nov 2022, Richard Sandiford wrote:
> Tamar Christina via Gcc-patches writes:
> >> So it's not easily possible the within current infrastructure. But it
> >> does look
> >> like ARM might eventually benefit from something like STV on x86?
> >>
> >
> > I'm not sure. The problem with
> -Original Message-
> From: Richard Biener
> Sent: Tuesday, November 22, 2022 10:59 AM
> To: Richard Sandiford
> Cc: Tamar Christina via Gcc-patches ; Tamar
> Christina ; Richard Biener
> ; nd
> Subject: Re: [PATCH 1/8]middle-end: Recognize scalar reductions from
> bitfields and array_r
The SSA propagator is missing abnormal cleanup which shows in a
sanity check in the uninit engine (and missed CFG verification).
The following adds that.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/107803
* tree-ssa-propagate.cc (substitute_an
Hi,
when two arrays of scalars have a different storage order in Ada, the
front-end makes sure that the conversion is performed component-wise
so that each component can be reversed. So it's a little bit counter
productive that the ldist pass performs the opposite transformation
and synthesizes a
Tamar Christina writes:
>> -Original Message-
>> From: Richard Biener
>> Sent: Tuesday, November 22, 2022 10:59 AM
>> To: Richard Sandiford
>> Cc: Tamar Christina via Gcc-patches ; Tamar
>> Christina ; Richard Biener
>> ; nd
>> Subject: Re: [PATCH 1/8]middle-end: Recognize scalar reduct
On Tue, 22 Nov 2022, Richard Sandiford wrote:
> Tamar Christina writes:
> >> -Original Message-
> >> From: Richard Biener
> >> Sent: Tuesday, November 22, 2022 10:59 AM
> >> To: Richard Sandiford
> >> Cc: Tamar Christina via Gcc-patches ; Tamar
> >> Christina ; Richard Biener
> >> ; nd
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32 on-stack argument is not padded in
the same direction depending on endianness.
This patch fixes the testcase so that it expects the argum
On Tue, Nov 22, 2022 at 09:41:24AM +0100, Jakub Jelinek via Gcc-patches wrote:
> On Mon, Nov 21, 2022 at 06:31:47PM -0500, Jason Merrill via Gcc-patches wrote:
> > Tested x86_64-pc-linux-gnu, and also manually changing the
> > HAVE_DECL_STRCHRNUL
> > flag. OK for trunk?
> >
> > -- 8< --
> >
> >
Richard Earnshaw via Gcc-patches writes:
> On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
>> gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
>> big-endian, because the _Decimal32 on-stack argument is not padded in
>> the same direction depending on endianness.
>>
>> This
On Tue, Nov 22, 2022 at 12:06 PM Eric Botcazou via Gcc-patches
wrote:
>
> Hi,
>
> when two arrays of scalars have a different storage order in Ada, the
> front-end makes sure that the conversion is performed component-wise
> so that each component can be reversed. So it's a little bit counter
> p
On 22/11/2022 11:21, Richard Sandiford wrote:
Richard Earnshaw via Gcc-patches writes:
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32 on-stack argument is not padded in
the same dire
Le 21/11/2022 à 21:34, Bernhard Reutner-Fischer a écrit :
On Mon, 21 Nov 2022 12:08:20 +0100
Mikael Morin wrote:
* gfortran.h (struct ext_attr_t): Remove middle_end_name.
* trans-decl.cc (add_attributes_to_decl): Move building
tree_list to ...
* decl.cc (gfc_mat
> On Mon, 21 Nov 2022 20:02:49 +0100
> Jan Hubicka wrote:
>
> > > Hi Honza, Ping.
> > > Regtests cleanly for c,fortran,c++,ada,d,go,lto,objc,obj-c++
> > > Ok?
> > > I'd need this for attribute target_clones for the Fortran FE.
> > Sorry for delay here.
> > > > void
> > > > @@ -303,6 +301,10 @@
Sam James via Gcc-patches writes:
>> On 8 Nov 2022, at 07:14, Sam James wrote:
>>
>> 1. This should speed up decompression for folks, as parallel xz
>> creates a different archive which can be decompressed in parallel.
>>
>> Note that this different method is enabled by default in a new
>>
Without this change, finish_declspecs cannot tell that whether there
was an erroneous type specified, or no type at all. This may result
in additional diagnostics for implicit ints, or missing diagnostics
for multiple types.
PR c/107805
gcc/c/
* c-decl.cc (declspecs_add_type): Pr
From: Eric Botcazou
It's the compiler trying to load the nonexistent body of a generic package
when trying to inline a call to an expression function of this package that
has a pre or post-condition (hence the need for -gnata to trigger the ICE).
gcc/ada/
* contracts.adb (Build_Subprogr
From: Eric Botcazou
gcc/ada/
* exp_ch3.adb (Make_Tag_Assignment): Fix formatting glitches.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_ch3.adb | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/gcc/ada
From: Piotr Trojanek
When a warning about a runtime exception is emitted for a code in
generic instance, we add continuation warnings "in instantiation ..."
and only the original message increase the total number of errors.
When removing these messages, e.g. after detecting that the code inside
From: Ghjuvan Lacambre
This commit re-enables the Validate_Subprogram_Calls check that had been
disabled in a previous commit and has said check skip over Elab_Spec
procedures in CodePeer_Mode.
gcc/ada/
* frontend.adb (Frontend): Re-enable Validate_Subprogram_Calls.
* exp_ch6.ad
From: Piotr Trojanek
Aspects Global and Depends are now allowed on abstract subprograms
(as substitutes for Global'Class and Depends'Class).
This patch implements the recently modified rules SPARK RM 6.1.2(2-3).
The behavior for Contract_Cases and aspects on null subprograms stays
as it was.
gc
Excerpts from Martin Liška's message of November 22, 2022 10:41 am:
> I noticed the option is ignored because @DO_LINK_MUTEX@
> is not defined in d/Make-lang.in.
>
> Tested locally before and after the patch.
>
> Ready to be installed?
> Thanks,
> Martin
>
Fine on my end. Thanks!
Iain.
On 11/22/22 12:33, Richard Earnshaw wrote:
On 22/11/2022 11:21, Richard Sandiford wrote:
Richard Earnshaw via Gcc-patches writes:
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32 on
Le 21/11/2022 à 23:26, Bernhard Reutner-Fischer a écrit :
On Mon, 21 Nov 2022 20:13:40 +0100
Mikael Morin wrote:
Hello,
Le 09/11/2022 à 20:02, Bernhard Reutner-Fischer via Fortran a écrit :
Hi!
(...)
+ if (allow_multiple && gfc_match_char (')') != MATCH_YES)
+{
+ gfc_error ("exp
> -Original Message-
> From: Richard Sandiford
> Sent: Tuesday, November 15, 2022 11:34 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw
> ; nd ; Marcus Shawcroft
>
> Subject: Re: [PATCH 2/2]AArch64 Support new tbranch optab.
>
> Tamar Christina writes:
> >> ---
This removes all uses of ASSERT_EXPR except the internal one in ipa-*.
OK pending tests?
gcc/ChangeLog:
* doc/gimple.texi: Remove ASSERT_EXPR references.
* fold-const.cc (tree_expr_nonzero_warnv_p): Same.
(fold_binary_loc): Same.
(tree_expr_nonnegative_warnv_p): S
OK pending tests?
gcc/ChangeLog:
* tree-vrp.cc (overflow_comparison_p_1): Remove follow_assert_exprs.
(overflow_comparison_p): Remove use_equiv_p.
* tree-vrp.h (overflow_comparison_p): Same.
* vr-values.cc (vrp_evaluate_conditional_warnv_with_ops): Remove
u
With no equivalences, the use_equiv_p argument in various methods in
simplify_using_ranges is always false. This means we can remove all
calls to compare_names, along with the function.
OK pending tests?
gcc/ChangeLog:
* vr-values.cc (simplify_using_ranges::compare_names): Remove.
Tamar Christina writes:
>> -Original Message-
>> From: Richard Sandiford
>> Sent: Tuesday, November 15, 2022 11:34 AM
>> To: Tamar Christina
>> Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw
>> ; nd ; Marcus Shawcroft
>>
>> Subject: Re: [PATCH 2/2]AArch64 Support new tbranch optab.
>>
>
While I still can't fully understand the immediate load issue and how
this patch fix it, I've tested this patch (alongside the prefetch
instruction patch) with bootstrap-ubsan. And the compiled result of
imm-load1.c seems OK.
On Thu, 2022-11-17 at 17:59 +0800, Lulu Cheng wrote:
> v1 -> v2:
> 1. C
On 22/11/2022 13:09, Christophe Lyon wrote:
On 11/22/22 12:33, Richard Earnshaw wrote:
On 22/11/2022 11:21, Richard Sandiford wrote:
Richard Earnshaw via Gcc-patches writes:
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been fa
> On Nov 22, 2022, at 3:16 AM, Richard Biener wrote:
>
> On Mon, 21 Nov 2022, Qing Zhao wrote:
>
>>
>>
>>> On Nov 18, 2022, at 11:31 AM, Kees Cook wrote:
>>>
>>> On Fri, Nov 18, 2022 at 03:19:07PM +, Qing Zhao wrote:
Hi, Richard,
Honestly, it?s very hard for me to deci
Hi,
PR 107661 shows that function push_agg_values_for_index_from_edge
should not attempt to optimize self-recursive call graph edges when
called from cgraph_edge_brings_all_agg_vals_for_node. Unlike when
being called from find_aggregate_values_for_callers_subset, we cannot
expect that any cloning
Wilco Dijkstra writes:
> Hi Richard,
>
>> I guess an obvious question is: if 1 (rather than 2) was the right value
>> for cores with 2 FMA pipes, why is 4 the right value for cores with 4 FMA
>> pipes? It would be good to clarify how, conceptually, the core property
>> should map to the fma_reass
> Hi,
>
> PR 107661 shows that function push_agg_values_for_index_from_edge
> should not attempt to optimize self-recursive call graph edges when
> called from cgraph_edge_brings_all_agg_vals_for_node. Unlike when
> being called from find_aggregate_values_for_callers_subset, we cannot
> expect th
As Jonathan suggested.
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
The contracts implementation was using strchrnul, which is a glibc
extension, so bootstrap broke on non-glibc targets. Use C89 strcspn
instead.
PR c++/107781
gcc/cp/ChangeLog:
* contracts.cc (role_
On 11/22/22 04:08, Richard Biener via Gcc-patches wrote:
On Tue, 22 Nov 2022, Richard Sandiford wrote:
Tamar Christina writes:
-Original Message-
From: Richard Biener
Sent: Tuesday, November 22, 2022 10:59 AM
To: Richard Sandiford
Cc: Tamar Christina via Gcc-patches ; Tamar
Christ
Richard Biener writes:
> On Mon, Oct 10, 2022 at 5:35 PM Gaius Mulley via Gcc-patches
> wrote:
>>
>>
>>
>> This patch set consists of the libgm2 makefile, autoconf sources
>> necessary to build the libm2pim, libm2iso, libm2min, libm2cor
>> and libm2log.
>
> This looks OK.
Thanks!
> I suppose i
> On Nov 22, 2022, at 9:10 AM, Qing Zhao via Gcc-patches
> wrote:
>
>
>
>> On Nov 22, 2022, at 3:16 AM, Richard Biener wrote:
>>
>> On Mon, 21 Nov 2022, Qing Zhao wrote:
>>
>>>
>>>
On Nov 18, 2022, at 11:31 AM, Kees Cook wrote:
On Fri, Nov 18, 2022 at 03:19:07PM +,
On 11/21/22 18:00, Jakub Jelinek wrote:
Hi!
I've noticed
+FAIL: compiler driver --help=c++ option(s): "^ +-.*[^:.]\$" absent from output: "
-fcontract-build-level=[off|default|audit] Specify max contract level to generate runtime checks
for"
error, this is due to missing dot at the end of the
On 11/20/22 18:36, Kito Cheng wrote:
So the idea here is just to define the extension so that it gets defined
in the ISA strings and passed through to the assembler, right?
That will also define arch test marco:
https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md#archi
On Tue, 22 Nov 2022 07:20:15 PST (-0800), jeffreya...@gmail.com wrote:
On 11/20/22 18:36, Kito Cheng wrote:
So the idea here is just to define the extension so that it gets defined
in the ISA strings and passed through to the assembler, right?
That will also define arch test marco:
https://gi
Ping
> -Original Message-
> From: Gcc-patches bounces+tamar.christina=arm@gcc.gnu.org> On Behalf Of Tamar
> Christina via Gcc-patches
> Sent: Friday, November 11, 2022 2:40 PM
> To: Richard Sandiford
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; Kyrylo
"Kewen.Lin" writes:
> Hi Richard,
>
> Many thanks for your review comments!
>
on 2022/8/24 16:17, Kewen.Lin via Gcc-patches wrote:
> Hi,
>
> As discussed in PR98125, -fpatchable-function-entry with
> SECTION_LINK_ORDER support doesn't work well on powerpc64
> ELFv1 because
On 11/22/22 12:33, Richard Earnshaw wrote:
On 22/11/2022 11:21, Richard Sandiford wrote:
Richard Earnshaw via Gcc-patches writes:
On 22/11/2022 09:01, Christophe Lyon via Gcc-patches wrote:
gcc.target/aarch64/aapcs64/test_dfp_17.c has been failing on
big-endian, because the _Decimal32 on
On Tue, 2022-11-22 at 22:03 +0800, Xi Ruoyao via Gcc-patches wrote:
> While I still can't fully understand the immediate load issue and how
> this patch fix it, I've tested this patch (alongside the prefetch
> instruction patch) with bootstrap-ubsan. And the compiled result of
> imm-load1.c seems
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Stam Markianos-Wright wri...@arm.com>
> Subject: [PATCH 16/35] arm: Add integer vector overloading of vsubq_x
> instrinsic
>
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 17/35] arm: improve tests and fix vadd*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 18/35] arm: improve tests for vmulq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 19/35] arm: improve tests and fix vsubq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 21/35] arm: improve tests for vhaddq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.targ
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 20/35] arm: improve tests for vfmasq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.targ
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 23/35] arm: improve tests for viwdupq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.targe
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 22/35] arm: improve tests for vhsubq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.targ
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 24/35] arm: improve tests for vmladavaq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.tar
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 25/35] arm: improve tests and fix vmlaldavaxq*
>
> gcc/ChangeLog:
>
> * config/arm/
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 26/35] arm: improve tests for vmlasq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 27/35] arm: improve tests for vqaddq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.targ
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 28/35] arm: improve tests for vqdmlahq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.ta
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 29/35] arm: improve tests for vqdmul*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 30/35] arm: improve tests for vqrdmlahq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.tar
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 31/35] arm: improve tests for vqrdmlashq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 32/35] arm: improve tests for vqsubq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 34/35] arm: improve tests for vrshlq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq*
>
> gcc/ChangeLog:
>
> * config/arm
> -Original Message-
> From: Andrea Corallo
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Earnshaw
> ; Andrea Corallo
> Subject: [PATCH 35/35] arm: improve tests for vsetq_lane*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.ta
On Tue, Nov 22, 2022 at 03:02:04PM +, Qing Zhao wrote:
>
>
> > On Nov 22, 2022, at 9:10 AM, Qing Zhao via Gcc-patches
> > wrote:
> >
> >
> >
> >> On Nov 22, 2022, at 3:16 AM, Richard Biener wrote:
> >>
> >> On Mon, 21 Nov 2022, Qing Zhao wrote:
> >>
> >>>
> >>>
> On Nov 18, 202
Tested x86_64-linux. Pushed to trunk.
-- >8 --
libstdc++-v3/ChangeLog:
PR libstdc++/106201
* testsuite/27_io/filesystem/iterators/106201.cc: New test.
---
.../testsuite/27_io/filesystem/iterators/106201.cc | 12
1 file changed, 12 insertions(+)
create mode 100644
Tested x86_64-linux. Pushed to trunk.
-- >8 --
These functions aren't usable in constant expressions. Provide our own
implementations, based on __from_chars_alnum_to_val from .
libstdc++-v3/ChangeLog:
PR libstdc++/107817
* include/std/charconv (__from_chars_alnum_to_val): Add
On Mon, 21 Nov 2022, Jeff Law wrote:
> > gcc/testsuite/
> > * lib/target-supports.exp
> > (check_effective_target_mpaired_single): Add `args' argument and
> > pass it to `check_no_compiler_messages' replacing
> > `-mpaired-single'.
> > (add_options_for_mips_loongson_mmi): A
On 11/21/22 14:57, Eugene Rozenfeld via Gcc-patches wrote:
1. Fix gcov version
2. Don't attempt to create an autoprofile file for cc1 since cc1plus
(not cc1) is not invoked when building cc1
3. Fix documentation typo
Tested on x86_64-pc-linux-gnu.
gcc/ChangeLog:
* c/Make-lang.in: Don
On 11/21/22 14:26, Eugene Rozenfeld via Gcc-patches wrote:
The existing comparison was incorrect for non-PRECISE counts
(e.g., AFDO): we could end up with a 0 base_count, which could
lead to asserts, e.g., in good_cloning_opportunity_p.
gcc/ChangeLog:
* ipa-cp.cc (ipcp_propagate_stag
On 11/20/22 12:06, Bernhard Reutner-Fischer wrote:
Hi Jason!
The "meh" of result-decl-plugin-test-2.C should likely be omitted,
grokdeclarator would need some changes to add richloc hints and we would not
be able to make a reliable guess what to remove precisely.
C.f. /* Check all other uses of
On 11/21/22 07:27, Siddhesh Poyarekar wrote:
On 2022-11-20 10:42, Jeff Law wrote:
On 11/4/22 06:48, Siddhesh Poyarekar wrote:
Use string length of input to strdup to determine the usable size of
the
resulting object. Avoid doing the same for strndup since there's a
chance that the input ma
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