[PATCH] Fix discrepancy in Walloca test on 32-bit systems.

There is a discrepancy in the way we report -Walloca-larger-than= errors on 32-bit versus 64-bit architectures, due to the nature of ranges derived from a cast operation. For the Walloca-1 tests on 64-bits we get: int num.0_1; long unsigned int _2; [local count: 1073741824]: num.0_1 = n

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Tue, Oct 20, 2020 at 10:04 PM Qing Zhao wrote: > +/* Check whether the register REGNO should be zeroed on X86. > + When ALL_SSE_ZEROED is true, all SSE registers have been zeroed > + together, no need to zero it again. > + Stack registers (st0-st7) and mm0-mm7 are aliased with each other

[Ada] Simplify the VxWorks implementation of __gnat_environ

The VxWorks kernel implementation of __gnat_environ was more convoluted than it needed to be and had an unneeded dependency on ppGlobalEnviron, a symbol which Wind River has removed in newer versions of VxWorks. This patch simplifies the implementation and uses a common implementation for both VxWo

[Ada] Raise Capacity_Error on formal vector insertion

Capacity_Error should be raised on insertion inside a formal vector when the capacity is exceeded. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * libgnat/a-cofove.adb (Copy): Add explanation in case of Capacity_Error. (Insert_Space): Raise Capacity_Error if

[Ada] Improve precision of Ada.Directories.Modification_Time

The modification file time precision now defined by OS. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * adaint.c (__gnat_file_time): New routine. (__gnat_copy_attribs): Copy timestamps in nanoseconds. * libgnat/a-direct.adb (C_Modification_Time): Bind to

[Ada] Disable warnings on entities when building finalizers

GNAT emits references to GNAT-generated entities when generating finalizers. These references are protected by a counter. GCC is unable to detect that the counter protects these references and emits warnings when -Wmaybe-uninitialized is used. This is a problem because users can't do anything to p

[Ada] Make minimum accessibility level a constant object

Minimum accessibility level was stored in a variable which was never modified. It seems cleaner to store it in a constant, which hopefully allows better optimization (e.g. when tracking know object the value of a variable is killed on a subprogram called). No impact on compiler behaviour, expect p

[Ada] Use VxWorks 7 APIs for accessing environment variables in kernel mode

VxWorks 7 provides newer APIs for kernel mode for accessing environment variables that lead to smaller and more efficient code. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * env.c (__gnat_setenv): call setenv for VxWorks 7 kernel mode. (__gnat_environ): envGet take

[Ada] Fix bogus error for bit-packed array with volatile component

This fixes a bogus error recently introduced in the compiler for a bit-packed array component in a record type with Volatile_Components aspect on the array definition. The array type should not be deemed requiring strict alignment, although it is a by-reference type. Tested on x86_64-pc-linux-gnu

[Ada] Incorrect associations for extra accessibility parameters

This patch fixes an error in the compiler whereby extra accessibility level actuals did not get expanded properly in calls - leading to mislabed parameter associations. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * exp_ch6.adb (Expand_Call_Helper): Modify calls to

[Ada] Remove -mthreads from Linker_Options pragma for x86-lynx178e

The -mthreads flag is no longer needed. It was deprecated in 2.2.4 and in 2.2.5 causes the linker to reference a non-existent directory. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * libgnarl/s-osinte__lynxos178e.ads: Remove -mthreads switch.diff --git a/gcc/ada/libgnarl/

[Ada] Fix crash with iterated_component_association and -gnatc

When expansion was disabled, e.g. in GNATprove mode or when switch -gnatc was used, analysis of the iterated_component_association's expression was crashing when the expression included a function call. The problem was that a copy of the expression was created with empty parent. Then an access-be

[Ada] Use helper function in Freeze_Subprogram_Body

This replaces the manual retrieval of the freeze node for the enclosing body of the generic with a mere call to Package_Freeze_Node. No functional changes. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * sem_ch12.adb (Freeze_Subprogram_Body): Call Package_Freeze_Nod

[Ada] Wrong detection of potentially blocking call in protected object

When a protected subprogram invokes a function that returns a limited type, and the sources are compiled with pragma Detect_ Blocking, the code generated by the compiler erroneously invokes the runtime service Activate_Tasks, call which is detected by the runtime as a potentially blocking call (as

[Ada] Fix crash on illegal OTHERS in iterated_component_association

A code for detecting illegal OTHERS clause is handles both component_association and iterated_component_association, whose choice list must be accessed with Choices and Discrete_Choices, respectively. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * sem_aggr.adb (Resolve_Arra

[Ada] Implement missing function result finalization.

In the case where a function call a) has a non-limited result type that requires finalization; and b) the callee has an out-mode (or in-out-mode) formal parameter; and c) the corresponding actual parameter's subtype is subject to an enabled predicate , fix a compiler bug that could cause

[Ada] Use index parameter for iterated_component_association

Processing of index parameters in iterated_component_association was different within array aggregates (where we created a synonym identifier) and array delta aggregates (where we used the existing defining identifier). Apparently, we can use the existing defining identifiers in both cases. This

[Ada] Compiler crash on prefixed call to controlled function with invariant check

When post call actions are created for a call to a function with a result of a controlled type, such as for performing an invariant check on a parameter with mode out or in out, the compiler can violate an assertion (or crash with a Storage_Error) due to not recognizing the expanded call as a funct

[Ada] Work around missing Long_Long_Long_Size entry in .atp file

This prevents the compiler from giving an error message when the new Long_Long_Long_Size entry is missing in a target configuration file. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * set_targ.adb (DTN): Fix oversight. (Read_Target_Dependent_Values): Do not error o

[Ada] Codepeer remarks take into account

This patch adds pragma Assert to help CodePeer static analysis and pragma Annotate to ignore Intentional or False_Positive warning. Furthermore, some minor changes were added to take into account CodePeer finding. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * libgnat/s-car

[Ada] Fix problematic placement of freeze node after instantiation

This prevents Freeze_Subprogram_Body from moving the freeze node of a package body outside of its scope when it contains the instantiation of a generic subprogram and the parent of the package body happens to be in the same declarative part as the freeze node of the scope of the generic subprogram.

[Ada] Fix analysis of iterated component expression with null range

When checking legality of the iterated_component_association's expression the index parameter must be in scope, even its range is null. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * exp_aggr.adb (Gen_Loop): Analyze copy of the expression in the scope of the implici

[Ada] Fix target configuration file used for CodePeer/SPARK for new ints

The new 128-bits integer support requires adapting the special target configuration file used for CodePeer and SPARK analysis. One change was missing in Width_From_Size. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * ada_get_targ.adb (Width_From_Size): Add case for 128 bits

[Ada] Fix bootstrap with old GCC

Some gcc versions (4 or less) support the __builtin_*_overflow routines while corresponding g++ compilers do not. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * adaint.c (__gnat_file_time): Use regular arithmetic instead of __builtin_*_overflow routines if GCC versi

[committed] aarch64: [testsuite] Fix typo in diagnostic message

Hi all, just committed as very obvious the following simple patch fixing a nit in an Aarch64 testcase. Andrea >From 9491dfe6c8adc298af34ce13280e0d3411c89d7d Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Wed, 21 Oct 2020 08:48:16 +0200 Subject: [PATCH] aarch64: [testsuite] Fix typo in d

[PATCH][pushed] ASAN: Support detect_invalid_pointer_pairs=1 with detect_stack_use_after_return=1

This is one another backport from master. Do not crash when AsanThread::GetStackVariableShadowStart does not find a variable for a pointer on a shadow stack. Cherry-pick from ad2be02a833e56f7fe280797280b219eb3312621. Differential Revision: https://reviews.llvm.org/D89552 --- libsanitizer/asan/

Re: [PATCH] Saturate overflows return from SCEV in ranger.

On 10/21/20 8:19 AM, Richard Biener wrote: On Tue, Oct 20, 2020 at 5:21 PM Aldy Hernandez via Gcc-patches wrote: bounds_of_var_in_loop is returning an overflowed int, which is causing us to create a range for which we can't compare the bounds causing an ICE in verify_range. Overflowed boun

[PATCH][pushed] libsanitizer: add test-case

And here I'm adding a test-case for the PR. Thanks, Martin gcc/testsuite/ChangeLog: PR sanitizer/97414 * g++.dg/asan/pr97414.C: New test. --- gcc/testsuite/g++.dg/asan/pr97414.C | 19 +++ 1 file changed, 19 insertions(+) create mode 100644 gcc/testsuite/g++.dg/

[PATCH] Move simplify_cond_using_ranges_2 to tree-vrp.c

This was slated to be moved last year, as its only use is in tree-vrp.c There are no functional changes. It's just a move and a rename. Pushed. gcc/ChangeLog: * vr-values.h: Remove simplify_cond_using_ranges_2. (range_fits_type_p): New. * vr-values.c (range_fits_type_p)

Re: [PATCH] Saturate overflows return from SCEV in ranger.

On Wed, Oct 21, 2020 at 9:30 AM Aldy Hernandez wrote: > > > > On 10/21/20 8:19 AM, Richard Biener wrote: > > On Tue, Oct 20, 2020 at 5:21 PM Aldy Hernandez via Gcc-patches > > wrote: > >> > >> bounds_of_var_in_loop is returning an overflowed int, which is causing > >> us to create a range for whi

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Wed, Oct 21, 2020 at 9:18 AM Uros Bizjak wrote: > > On Tue, Oct 20, 2020 at 10:04 PM Qing Zhao wrote: > > > +/* Check whether the register REGNO should be zeroed on X86. > > + When ALL_SSE_ZEROED is true, all SSE registers have been zeroed > > + together, no need to zero it again. > > +

[PATCH] phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]

Hi! While we have at the RTL level noce_try_ifelse_collapse combined with simplify_cond_clz_ctz, that optimization doesn't always trigger because e.g. on powerpc there is an define_insn to compare a reg against zero and copy that register to another one and so we end up with a different pseudo in

Re: [committed][nvptx] Remove -m32

On 10/20/20 3:48 PM, Tobias Burnus wrote: > On 10/15/20 3:26 PM, Tom de Vries wrote: >>   PR target/97436 >>   * config/nvptx/nvptx.opt (m32): Comment out. >>   * doc/invoke.texi (NVPTX options): Remove -m32. > > This caused the warning: doc/invoke.texi:25617: warning: @itemx should >

[PATCH] rs6000: Don't split constant operator add before reload, move to temp register for future optimization

This is a revised version of the patch posted at https://gcc.gnu.org/pipermail/gcc-patches/2020-March/542718.html, resend this since this is a quite high priority performance issue for Power. Don't split code from add3 for SDI to allow a later pass to split. This allows later logic to hoist out co

Re: [PATCH] phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]

On Wed, 21 Oct 2020, Jakub Jelinek wrote: > Hi! > > While we have at the RTL level noce_try_ifelse_collapse combined with > simplify_cond_clz_ctz, that optimization doesn't always trigger because > e.g. on powerpc there is an define_insn to compare a reg against zero and > copy that register to a

[PATCH 1/2] Separate new_edges compute in copy_bbs

This separates out a loop finding new_edges from edges in copy_bbs, making its complexity cheaper overall from total number of succs in copied bbs times num_edges to num_edges times the complexity of find_edge. Bootstrapped / tested on x86_64-unknown-linux-gnu, pushed. 2020-10-21 Richard Biener

[PATCH 2/2] Simplify CFG copying tables

This simplifies the maps between original and new basic blocks and loops as used for CFG copying. Instead of using a pointer hash table to allocated mapping entries use a hash_map with int_hash, removing the indirection and code duplication. We can use -1 and -2 as empty/deleted values as those a

Re: [PATCH] Saturate overflows return from SCEV in ranger.

On 10/21/20 9:59 AM, Richard Biener wrote: /* Even for valid range info, sometimes overflow flag will leak in. As GIMPLE IL should have no constants with TREE_OVERFLOW set, we drop them. */ if (TREE_OVERFLOW_P (*min)) *min = drop_tree_overflow (*min); if (TREE

[PATCH] vect: Remove redundant LOOP_VINFO_FULLY_MASKED_P

Hi, This is a very trivial patch, it's to remove a redundant LOOP_VINFO_FULLY_MASKED_P condition check which will be checked in vect_use_loop_mask_for_alignment_p. Is it OK for trunk? BR, Kewen - gcc/ChangeLog: * tree-vect-loop.c (vect_transform_loop): Remove the redundant L

Re: [PATCH][PR 97506] Simplify trivial vcond_expr in expander.

On Wed, Oct 21, 2020 at 02:29:07PM +0800, Hongtao Liu via Gcc-patches wrote: > gcc/ChangeLog: > > PR target/97506 > * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move > op_true to dest directly When op_true equals op_false, Lowercase when in the middle of sentence.

Re: PING [PATCH] Enable GCC support for Intel Key Locker extension

Hi, > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > think that the new patterns should follow the same path as vzeroall > and vzeroupper patterns, where we emit the pattern with explicit hard > regs. > > BTW: We do have SSE_FIRST_REG class, but this class was added to solve >

[PATCH 1/2] ASAN: Support detect_invalid_pointer_pairs=1 with detect_stack_use_after_return=1

Do not crash when AsanThread::GetStackVariableShadowStart does not find a variable for a pointer on a shadow stack. Cherry-pick from ad2be02a833e56f7fe280797280b219eb3312621. Differential Revision: https://reviews.llvm.org/D89552 (cherry picked from commit b69f33f477b9ac38af3c39465600ae74a35548

[PATCH 2/2] libsanitizer: add test-case

gcc/testsuite/ChangeLog: PR sanitizer/97414 * g++.dg/asan/pr97414.C: New test. (cherry picked from commit 6c5b08a2ca935c5db68e79d33e5c5b752252115c) --- gcc/testsuite/g++.dg/asan/pr97414.C | 19 +++ 1 file changed, 19 insertions(+) create mode 100644 gcc/testsuit

Re: [PATCH] Saturate overflows return from SCEV in ranger.

On Wed, Oct 21, 2020 at 10:50 AM Aldy Hernandez wrote: > > > > On 10/21/20 9:59 AM, Richard Biener wrote: > > >>> /* Even for valid range info, sometimes overflow flag will leak in. > >>>As GIMPLE IL should have no constants with TREE_OVERFLOW set, we > >>>drop them. */ > >>>

[PATCH] aarch64: Add vcopy(q)__lane(q)_bf16 intrinsics

Hi all, I'd like to submit the following patch implementing the bfloat16_t neon related copy intrinsics: vcopy_lane_bf16, vcopyq_lane_bf16, vcopyq_laneq_bf16, vcopy_laneq_bf16. Please see refer to: ACLE ISA

Re: [PATCH] vect: Remove redundant LOOP_VINFO_FULLY_MASKED_P

On Wed, Oct 21, 2020 at 10:58 AM Kewen.Lin via Gcc-patches wrote: > > Hi, > > This is a very trivial patch, it's to remove a redundant > LOOP_VINFO_FULLY_MASKED_P condition check which will be > checked in vect_use_loop_mask_for_alignment_p. > > Is it OK for trunk? OK. > > BR, > Kewen > - >

Re: [PATCH][PR 97506] Simplify trivial vcond_expr in expander.

On Wed, Oct 21, 2020 at 5:07 PM Jakub Jelinek wrote: > > On Wed, Oct 21, 2020 at 02:29:07PM +0800, Hongtao Liu via Gcc-patches wrote: > > gcc/ChangeLog: > > > > PR target/97506 > > * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move > > op_true to dest directly When o

[PATCH] tree-optimization/97500 - avoid SLP backedges for inductions

Inductions are not vectorized as cycle but materialized from SCEV data. Filling in backedge SLP nodes confuses this process. Bootstrapped / tested on x86_64-unknown-linux-gnu, pushed. 2020-10-21 Richard Biener PR tree-optimization/97500 * tree-vect-slp.c (vect_analyze_slp_back

[PATCH] LTO: get_section: add new argument

Hey. During partial linking we ipa_prop_write_jump_functions twice from 2 IPA pass (fnsummary and cp). That produces 2 compressed blocks in an ELF section and then zstd complains as sections size does not correspond to the compressed stream. I'm adding both sanity check changes and the fix in ip

Re: [PATCH] LTO: get_section: add new argument

> Hey. > > During partial linking we ipa_prop_write_jump_functions twice from 2 IPA > pass (fnsummary and cp). That produces 2 compressed blocks in an ELF section > and then zstd complains as sections size does not correspond to the compressed > stream. > > I'm adding both sanity check changes an

Re: [patch] Introduce vxworks7r2 support for ppc and ppc64

Hi Segher! > On 20 Oct 2020, at 22:06, Segher Boessenkool > wrote: > >> +# Wind River 7 post SR0600 is mostly like Linux so we setup >> +# out config in a very similar fashion and adjust to a few >> +# specificities. > > "our config"? > >> + - Starting with VxWorks 7 (post SR600

PATCH [DR2303][PR97453]

gcc/cp/ChangeLog --- 2020-10-21 Kamlesh Kumar PR c++/97453 * pt.c (get_template_base): Implement DR2303, Consider closest base while template deduction when base of base also matches. gcc/testsuite/ChangeLog -- 2020-10-2

Re: [PATCH] LTO: get_section: add new argument

On 10/21/20 1:17 PM, Martin Liška wrote: On 10/21/20 12:06 PM, Jan Hubicka wrote: I think the streaming should happen only from ipa-fnsummary. Oriignally ipa-prop was ipa-cp only, then indirect inlining was added, but these days we have specialized analysis pass and thus ipa-prop should be inter

Re: [PATCH] LTO: get_section: add new argument

On 10/21/20 12:06 PM, Jan Hubicka wrote: I think the streaming should happen only from ipa-fnsummary. Oriignally ipa-prop was ipa-cp only, then indirect inlining was added, but these days we have specialized analysis pass and thus ipa-prop should be intergrated to it. All right, there's a WIP p

Re: PING [PATCH] Enable GCC support for Intel Key Locker extension

On Wed, Oct 21, 2020 at 11:11 AM Hongyu Wang wrote: > > Hi, > > > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > > think that the new patterns should follow the same path as vzeroall > > and vzeroupper patterns, where we emit the pattern with explicit hard > > regs. > > > > BT

[PATCH] openmp: Change omp_get_initial_device () to match OpenMP 5.1 requirements

On Thu, Oct 15, 2020 at 01:02:29PM +0200, Jakub Jelinek via Gcc-patches wrote: > Therefore, I think until omp_get_initial_device () value is changed, we The following so far untested patch implements that change. OpenMP 4.5 said for omp_get_initial_device: The value of the device number is implem

Re: PING [PATCH] Enable GCC support for Intel Key Locker extension

On Wed, Oct 21, 2020 at 1:48 PM Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 11:11 AM Hongyu Wang wrote: > > > > Hi, > > > > > IIRC, adding a new regclass is O(n^2), so it should be avoided. I > > > think that the new patterns should follow the same path as vzeroall > > > and vzeroupper pattern

[RFC2][PATCH] SLP vectorize across PHI nodes

This enables SLP build to handle PHI nodes in full, continuing the SLP build to non-backedges. For loop vectorization this enables outer loop vectorization of nested SLP cycles and for BB vectorization this enables vectorization of PHIs at CFG merges. Vectorized backedge defs are now filled using

[Patch, committed] Fortran: class.c - update vtable comment

I was confused as I saw _deallocate – but didn't show up in the big comment at the beginning of class.c. Hence, I added it. Committed as r11-4186-g310fe80babe04ccb7d2e15c8fca7dc98180701a8 but if you have have follow-up suggestions, we can surely change it. Tobias - Mentor Graphi

[committed] libstdc++: Make structured bindings always work for subranges [PR 97512]

The definition of ranges::subrange was moved to the new header so that it could be used in without including the whole of . However, the tuple-like support that enables subrange to be used with structured bindings was left in . This is arguably conforming (to use a subrange you should include ) b

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 21, 2020, at 3:03 AM, Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 9:18 AM Uros Bizjak > wrote: >> >> On Tue, Oct 20, 2020 at 10:04 PM Qing Zhao wrote: >> >>> +/* Check whether the register REGNO should be zeroed on X86. >>> + When ALL_SSE_ZEROED is t

[PATCH] SLP: Move load/store-lanes check till late

Hi All, This moves the code that checks for load/store lanes further in the pipeline and places it after slp_optimize. This would allow us to perform optimizations on the SLP tree and only bail out if we really have a permute. With this change it allows us to handle permutes such as {1,1,1,1} wh

Re: [PATCH 1/2] [target 87767] Refactor AVX512 broadcast patterns with speical memory constraint.

On 2020-10-20 10:11 p.m., Hongtao Liu wrote: Changed, and it passed the i386/x86-64 regression test. Update patch. Thank you, Hongtao.  This patch is ok for the trunk.

[patch] vxworks: Remove interfering default #undefs from vx-common.h

This patch removes the #undef issued for LIB_SPEC and LINK_SPEC in vx-common.h, which all the ports do on their own and which impairs the bi-arch’d ppc*-vx7r2 targets, relying on linux64 definitions. Tested together with the previous changes posted for the newly introduced powerpc ports. Committ

Increase inlining limits for inline functions with builtin_constant_p on parameter

Hi, this patch implements heuristics that increases inline limits (by the hints mechanism) for inline functions that use builtin_constant_p on parameter. Those are very likely intended to be always inlined and simplify after inlining. The PR is about a function that we used to inline with --param

[PATCH] x86: Allow configuring with --with-arch_64=x86-64-v[234]

On Wed, Sep 30, 2020 at 06:06:31PM +0200, Florian Weimer wrote: > --- a/gcc/common/config/i386/i386-common.c > +++ b/gcc/common/config/i386/i386-common.c > @@ -1795,9 +1795,13 @@ const pta processor_alias_table[] = > PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE | PTA_FXSR, 0, P_NONE}, >{"at

Re: [PATCH] x86: Allow configuring with --with-arch_64=x86-64-v[234]

* Jakub Jelinek: > On Wed, Sep 30, 2020 at 06:06:31PM +0200, Florian Weimer wrote: >> --- a/gcc/common/config/i386/i386-common.c >> +++ b/gcc/common/config/i386/i386-common.c >> @@ -1795,9 +1795,13 @@ const pta processor_alias_table[] = >> PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE | PTA_FXS

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

Hongtao Liu writes: > + poly_uint64 nunits > + = GET_MODE_NUNITS (GET_MODE (SUBREG_REG (trueop0))); > + rtx par = trueop1; > + for (int i = 0; i != l1; i++) > + { > + rtx idx = XVECEXP (trueop1, 0, i); > + if (!CONST

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

Qing Zhao writes: >>> + /* For each of the hard registers, check to see whether we should zero >>> it if: >>> + 1. it is a call-used-registers; >>> + and 2. it is not a fixed-registers; >>> + and 3. it is not live at the return of the routine; >>> + and 4. it is general registor if gpr_only

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw wrote: > > On 20/10/2020 12:22, Richard Earnshaw wrote: > > On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wrote: > >> On Mon, 19 Oct 2020 at 16:39, Richard Earnshaw > >> wrote: > >>> > >>> On 12/10/2020 08:59, Christophe Lyon via Gcc-patches w

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: > On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw > wrote: >> >> On 20/10/2020 12:22, Richard Earnshaw wrote: >>> On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wrote: On Mon, 19 Oct 2020 at 16:39, Richard Earnshaw wrote:

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Wed, Oct 21, 2020 at 4:45 PM Qing Zhao wrote: > > > > On Oct 21, 2020, at 3:03 AM, Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 9:18 AM Uros Bizjak wrote: > > > On Tue, Oct 20, 2020 at 10:04 PM Qing Zhao wrote: > > +/* Check whether the register REGNO should be zeroed on X86. > + When AL

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On Wed, 21 Oct 2020 at 18:07, Richard Earnshaw wrote: > > On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: > > On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw > > wrote: > >> > >> On 20/10/2020 12:22, Richard Earnshaw wrote: > >>> On 19/10/2020 17:32, Christophe Lyon via Gcc-patches wro

Re: [PATCH] x86: Allow configuring with --with-arch_64=x86-64-v[234]

On Wed, Oct 21, 2020 at 5:15 PM Jakub Jelinek wrote: > > On Wed, Sep 30, 2020 at 06:06:31PM +0200, Florian Weimer wrote: > > --- a/gcc/common/config/i386/i386-common.c > > +++ b/gcc/common/config/i386/i386-common.c > > @@ -1795,9 +1795,13 @@ const pta processor_alias_table[] = > > PTA_MMX | P

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

Hi Folks, This patch breaks bootstrap on Darwin platforms. Pierre-Marie de Rodat wrote: > The modification file time precision now defined by OS. > > Tested on x86_64-pc-linux-gnu, committed on trunk > > gcc/ada/ > > * adaint.c (__gnat_file_time): New routine. > (__gnat_copy_attr

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

On Wed, Oct 21, 2020 at 04:43:29PM +0100, Richard Sandiford wrote: > Hongtao Liu writes: > > + poly_uint64 nunits > > + = GET_MODE_NUNITS (GET_MODE (SUBREG_REG (trueop0))); > > + rtx par = trueop1; > > + for (int i = 0; i != l1; i++) > > + { > > +

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

> This patch breaks bootstrap on Darwin platforms. > > Pierre-Marie de Rodat wrote: > > > The modification file time precision now defined by OS. > > > > Tested on x86_64-pc-linux-gnu, committed on trunk > > > > gcc/ada/ > > > > * adaint.c (__gnat_file_time): New routine. > > (__gnat_

[PATCH] c++: constexpr evaluation and bare EMPTY_CLASS_EXPR [PR96575]

In the testcase below, folding of the initializer for 'ret' inside the instantiated f::lambda ends up yielding an initializer for which potential_constant_expression returns false. This causes finish_function to mark the lambda as non-constexpr, which ultimately causes us to reject 'f(g)' as a cal

Re: [PATCH] c++: Handle RANGE_EXPR indexes in init_subob_ctx [PR97328]

On Thu, 8 Oct 2020, Patrick Palka wrote: > In the testcase below, we're ICEing during constexpr evaluation of the > CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The apparently > unique thing about this CONSTRUCTOR is that it has a RANGE_EXPR index > whose corresponding sub-aggregate i

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

Arnaud Charlet wrote: This patch breaks bootstrap on Darwin platforms. Pierre-Marie de Rodat wrote: The modification file time precision now defined by OS. Tested on x86_64-pc-linux-gnu, committed on trunk gcc/ada/ * adaint.c (__gnat_file_time): New routine. (__gnat_copy_

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

Got it. thanks. Qing > On Oct 21, 2020, at 10:47 AM, Richard Sandiford > wrote: > > Qing Zhao writes: + /* For each of the hard registers, check to see whether we should zero it if: + 1. it is a call-used-registers; + and 2. it is not a fixed-registers; + and 3

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 21, 2020, at 11:09 AM, Uros Bizjak wrote: > > On Wed, Oct 21, 2020 at 4:45 PM Qing Zhao wrote: >> >> >> >> -- q -- >> The CPU shall be in x87 mode upon entry to a function. Therefore, >> every function that uses the MMX registers is required to issue an >> emms or femms instructio

[PATCH] libstdc++: Add c++2a

From: Thomas Rodgers libstdc++/Changelog: libstdc++-v3/doc/doxygen/user.cfg.in (INPUT): Add new header. libstdc++-v3/include/Makefile.am (std_headers): Add new header. libstdc++-v3/include/Makefile.in: Regenerate. libstdc++-v3/include/precompiled/stdc++.h: Include

Re: [Ada] Improve precision of Ada.Directories.Modification_Time

> >What about instead putting above extern long long __gnat_file_time the > >following: > > > >#if __APPLE__ > >#define st_mtim st_mtimespec > >#define st_atim st_atimespec > >#endif > > > >To avoid having the two (nested) #if __APPLE__ and keep the code easier two => three :-) > >to follow? > >

Re: [PATCH] phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]

Hi Jakub, > While we have at the RTL level noce_try_ifelse_collapse combined with > simplify_cond_clz_ctz, that optimization doesn't always trigger because > e.g. on powerpc there is an define_insn to compare a reg against zero and > copy that register to another one and so we end up with a differ

Re: [PATCH] libstdc++: Add c++2a

On 21/10/20 09:53 -0700, Thomas Rodgers wrote: From: Thomas Rodgers libstdc++/Changelog: libstdc++-v3/doc/doxygen/user.cfg.in (INPUT): Add new header. libstdc++-v3/include/Makefile.am (std_headers): Add new header. libstdc++-v3/include/Makefile.in: Regenerate. li

Re: [PATCH] arm: Fix multiple inheritance thunks for thumb-1 with -mpure-code

On 21/10/2020 17:11, Christophe Lyon via Gcc-patches wrote: > On Wed, 21 Oct 2020 at 18:07, Richard Earnshaw > wrote: >> >> On 21/10/2020 16:49, Christophe Lyon via Gcc-patches wrote: >>> On Tue, 20 Oct 2020 at 13:25, Richard Earnshaw >>> wrote: On 20/10/2020 12:22, Richard Earnshaw wro

Re: [PATCH] phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]

On Wed, Oct 21, 2020 at 07:30:46PM +0200, Rainer Orth wrote: > this broke sparc-sun-solaris2.11 bootstrap > > /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c: In function 'bool > cond_removal_in_popcount_clz_ctz_pattern(basic_block, basic_block, edge, > edge, gimple*, tree, tree)': > /vol/gcc

[PATCH] rs6000: MMA type causes an ICE in ranger pass due to incompatible types

PR97360 shows a problem in how we create our PXI and POI modes that cause an ICE in the ranger pass. The problem seems to be that the extra call to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that are not compatible/the same as the base type itself. The simple "fix" is to ac

Re: [PATCH][middle-end][i386][version 3]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Wed, Oct 21, 2020 at 06:09:28PM +0200, Uros Bizjak wrote: > On Wed, Oct 21, 2020 at 4:45 PM Qing Zhao wrote: > > Looks like it’s very complicate to use the st/mm register set correctly, So, > > I assume that this set of registers might be very hard to be used by the > > attacker correctly. > >

Re: [PATCH] rs6000: MMA type causes an ICE in ranger pass due to incompatible types

Hi! On Wed, Oct 21, 2020 at 01:00:20PM -0500, Peter Bergner wrote: > PR97360 shows a problem in how we create our PXI and POI modes that cause > an ICE in the ranger pass. The problem seems to be that the extra call > to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that > are

Re: Increase inlining limits for inline functions with builtin_constant_p on parameter

On 10/21/20 5:11 PM, Jan Hubicka wrote: return ( __builtin_constant_p((size) - 1) ? ( __builtin_constant_p((size) - 1) ? ( ((size) - 1) < 2 ? 0 : ((size) - 1) & (1ULL << 63) ? 63 : ((size) - 1) & (1ULL << 62) ? 62 : ((size) - 1) & (1ULL << 61) ? 61 : ((size) - 1) & (1ULL << 60) ? 60 : ((size) - 1

Re: Increase inlining limits for inline functions with builtin_constant_p on parameter

On Wed, Oct 21, 2020 at 09:03:03PM +0200, Martin Liška wrote: > Maybe a silly question, but isn't the code only an obfuscation? > What about doing: > > if (__builtin_constant_p(x)) > return x < 2 ? 0 : __builtin_clz(x); > > which is fully eliminated in a c.031t.ccp1 pass right after einline hap

Re: [PATCH] rs6000: MMA type causes an ICE in ranger pass due to incompatible types

On 10/21/20 1:34 PM, Segher Boessenkool wrote: >> The following patch from Andrew and richi fixes the ICE on Martin's test >> case and passes bootstrap and regtesting on powerpc64le-linux. >> Ok for trunk? > > Yes, okay for trunk. Thanks! Ok, pushed to trunk. Thanks! >> Since the ranger code

Re: [PATCH] libstdc++: Add c++2a

> On Oct 21, 2020, at 10:34 AM, Jonathan Wakely wrote: > > On 21/10/20 09:53 -0700, Thomas Rodgers wrote: >> From: Thomas Rodgers >> >> libstdc++/Changelog: >> libstdc++-v3/doc/doxygen/user.cfg.in (INPUT): Add new header. >> libstdc++-v3/include/Makefile.am (std_headers): Add new h

[committed] libstdc++: Simplify std::shared_ptr construction from std::weak_ptr

The _M_add_ref_lock() and _M_add_ref_lock_nothrow() members of _Sp_counted_base are very similar, except that the former throws an exception when the use count is zero and the latter returns false. The former (and its callers) can be implemented in terms of the latter. This results in a small reduc

Re: [PATCH 2/8] [RS6000] rs6000_rtx_costs for AND

On Wed, Oct 21, 2020 at 01:27:42PM +1030, Alan Modra wrote: > On Tue, Oct 20, 2020 at 01:55:56PM -0500, Segher Boessenkool wrote: > > On Thu, Oct 08, 2020 at 09:27:54AM +1030, Alan Modra wrote: > > > The existing "case AND" in this function is not sufficient for > > > optabs.c:avoid_expensive_const

[PATCH] c++: Check DECL_TEMPLATE_PARM_P in duplicate_decls [PR97511]

This makes duplicate_decls differentiate a TYPE_DECL for an alias template from a TYPE_DECL for one of its template parameters. The recently added assert in template_parm_to_arg revealed this latent issue because merging of the two TYPE_DECLs cleared the DECL_TEMPLATE_PARM_P flag. With this patch

Re: [PATCH] c++: Check DECL_TEMPLATE_PARM_P in duplicate_decls [PR97511]

On 10/21/20 4:35 PM, Patrick Palka wrote: This makes duplicate_decls differentiate a TYPE_DECL for an alias template from a TYPE_DECL for one of its template parameters. The recently added assert in template_parm_to_arg revealed this latent issue because merging of the two TYPE_DECLs cleared the

Re: [PATCH] c++: Handle RANGE_EXPR indexes in init_subob_ctx [PR97328]

On 10/8/20 4:47 PM, Patrick Palka wrote: In the testcase below, we're ICEing during constexpr evaluation of the CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The apparently unique thing about this CONSTRUCTOR is that it has a RANGE_EXPR index whose corresponding sub-aggregate initiali

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