Please find attached a fix for PR93600.
This builds on the patch originally submitted to the PR by Steve Kargl,
the dreaded "Unclassifiable statement error" is replaced by the correct
error message. It would have been posted earlier had not one of the test
cases failed as a result of the fix f
Please find attached Steve Kargl's fix for PR93814.
OK to commit?
gcc/fortran/ChangeLog:
Steven G. Kargl
PR fortran/93814
* resolve.c (gfc_verify_binding_labels): Handle symbols with
the subroutine attribute separately from symbols with the
function attribute.
gcc/testsu
Hi!
When we are adding a single store into a store group, we are already
checking that store->lp_nr matches, but we have also code to add further
INTEGER_CST stores into the group right away if the ordering requires that
either we put there all or none from a certain set of stores. And in those
c
On Fri, 20 Mar 2020, Jakub Jelinek wrote:
> Hi!
>
> When we are adding a single store into a store group, we are already
> checking that store->lp_nr matches, but we have also code to add further
> INTEGER_CST stores into the group right away if the ordering requires that
> either we put there al
On Wed, Mar 18, 2020 at 05:37:26PM -0400, Jason Merrill via Gcc-patches wrote:
> How about improving get_narrower to handle COMPOUND_EXPR? I'd think that
> would do the trick without affecting evaluation order.
Not completely, had to change also warnings_for_convert_and_check, but with
that it wo
Hi,
I noticed some issues with the patches that landed on trunk and this
patch series fixes them. The first issue was revealed after I fixed the
testisms (in patch 2/2).
Andre Vieira (2):
Fix MVE move from GPR -> GPR
Fix testisms for MVE testsuite
Hi,
This patch fixes the pattern mve_mov for the case where both MVE vectors
are in R registers and the move does not get optimized away. I use the
same approach as we do for NEON, where we use four register moves.
Bootstrapped on arm-linux-gnueabihf and ran mve testsuite on arm-none-eabi.
Hi,
This patch fixes some testism where -mfpu=auto was missing or where we
could end up with -mfloat-abi=hard and soft on the same command-line.
Tested on arm-none-eabi.
Is this OK for trunk?
gcc/testsuite/ChangeLog:
2020-03-20 Andre Vieira
* gcc.target/arm/mve/intrinsics/mve_fp_
Hi,
MVE made changes to {get,set}_fpscr to enable the compiler to optimize
unneccesary gets and sets when using these for intrinsics that use
and/or write
the carry bit. However, these actually get and set the full FPSCR
register and
are used by fp env intrinsics to modify the fp context. So
Hi Andre,
> -Original Message-
> From: Andre Vieira (lists)
> Sent: 20 March 2020 08:48
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH 1/2][GCC][Arm]: Fix MVE move from GPR -> GPR
>
> Hi,
>
> This patch fixes the pattern mve_mov for the case where both MVE vectors
Hi Andre,
> -Original Message-
> From: Andre Vieira (lists)
> Sent: 20 March 2020 08:50
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH 2/2][GCC][Arm]: Fix testisms for MVE testsuite
>
> Hi,
>
> This patch fixes some testism where -mfpu=auto was missing or where we
Hi Andre,
> -Original Message-
> From: Andre Vieira (lists)
> Sent: 20 March 2020 08:53
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH][GCC][Arm]: Revert changes to {get, set}_fpscr
>
> Hi,
>
> MVE made changes to {get,set}_fpscr to enable the compiler to optimize
--
Sender:Richard Biener
Sent At:2020 Mar. 3 (Tue.) 17:36
Recipient:Andrew Pinski
Cc:bin.cheng ; GCC Patches
Subject:Re: [PATCH PR93674]Avoid introducing IV of enumeral type in case of
-fstrict-enums
On Mon, Mar 2, 2020 at 6:14
On 3/19/20 7:22 AM, Jiufu Guo via Gcc-patches wrote:
> Jiufu Guo writes:
>
> Backported to GCC 9, preapproved by Segher.
>
> Thanks,
>
> Jiufu
this checks in a file
diff --git a/a b/a
new file mode 100644
index 000..a4f422403ef
--- /dev/null
+++ b/a
@@ -0,0 +1,81 @@
+commit 5b075372b4
This fixes the heuristic deriving an actual object type from a
MEM_REFs pointer operand to use the more sensible type of an
actual object instead of the pointed to type.
Bootstrapped / tested on x86_64-unknown-linux-gnu, applied.
Richard.
2020-03-20 Richard Biener
PR tree-optimizatio
Hi.
The patch is a thinko that was introduced in
r10-7273-gf3280e4c0c98e103603bafc466ea49651fe0b7f2.
It's about replacement of byte integer constant with bit integer constant. The
patch is pre-approved
by Richi.
Patch can bootstrap on x86_64-linux-gnu and survives regression tests.
Thanks,
Ma
Hi!
With this simple patch, on i686-linux and x86_64-linux with -m32 (no change
for -m64), the find_base_term visited_vals.length () > 100 find_base_term
statistics changed (fbt is before this patch, fbt2 with this patch):
for k in '' '1$'; do for i in 32 64; do for j in fbt fbt2; do \
echo -n "$j
On Fri, Mar 20, 2020 at 10:27 AM bin.cheng wrote:
>
> --
> Sender:Richard Biener
> Sent At:2020 Mar. 3 (Tue.) 17:36
> Recipient:Andrew Pinski
> Cc:bin.cheng ; GCC Patches
>
> Subject:Re: [PATCH PR93674]Avoid introducing IV of enum
On Fri, 20 Mar 2020, Jakub Jelinek wrote:
> Hi!
>
> With this simple patch, on i686-linux and x86_64-linux with -m32 (no change
> for -m64), the find_base_term visited_vals.length () > 100 find_base_term
> statistics changed (fbt is before this patch, fbt2 with this patch):
> for k in '' '1$'; do
Hi all!
12.03.2020 6:17, Jeff Law wrote:
>> Current modulo-sched implementation is a bit faulty from -fcompile-debug
>> perspective.
>>
>> But right now I see that when I enable -fmodulo-sched by default, powerpc64le
>> bootstrap give comparison failure as of r10-7056.
>>
>> Comparing stages 2 and
Hi,
PR 93435 is a perfect SRA bomb. It initializes an array of 16 chars
element-wise, then uses that to initialize an aggregate that consists
of four such arrays, that one to initialize one four times as big as
the previous one all the way to an aggregate that has 64kb.
This causes the sub-acces
On Fri, 20 Mar 2020, Martin Jambor wrote:
> Hi,
>
> PR 93435 is a perfect SRA bomb. It initializes an array of 16 chars
> element-wise, then uses that to initialize an aggregate that consists
> of four such arrays, that one to initialize one four times as big as
> the previous one all the way to
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 19 March 2020 17:59
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v2][ARM][GCC][6x]:MVE ACLE vaddq intrinsics using
> arithmetic plus operator.
>
> Hello Kyrill,
>
> This patch addresses all th
Hello Kyrill,
Following patch is the rebased version of v1.
(version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019-November/534341.html
Hello,
This patch supports following MVE ACLE intrinsics with writeback.
vddupq_m_n_u8, vddupq_m_n_u32, vddupq_m_n_u16, vddupq_m_wb_u8, vddupq_m_wb_
Hello Kyrill,
Following patch is the rebased version of v1.
(version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019-November/534357.html
Hello,
This patch supports following MVE ACLE intrinsics with writeback.
vldrdq_gather_base_wb_s64, vldrdq_gather_base_wb_u64,
vldrdq_gather_base_w
Hello Kyrill,
Following patch is the rebased version of v1.
(version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019-November/534353.html
Hello,
This patch supports following MVE ACLE predicated intrinsic with `_x`
(dont-care) variant.
* ``_x`` (dont-care) which indicates that the fals
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 19 March 2020 17:59
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v2][ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq
> intrinsics.
>
> Hello Kyrill,
>
> This patch addresses all the comme
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 20 March 2020 11:36
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v2][ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and
> vdwdup intrinsics with writeback.
>
> Hello Kyrill,
>
> Following patc
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 20 March 2020 11:36
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v2][ARM][GCC][2/8x]: MVE ACLE gather load and scatter
> store intrinsics with writeback.
>
> Hello Kyrill,
>
> Following patch
On Tue, Mar 17, 2020 at 11:52:13AM +, Richard Sandiford wrote:
> Lewis Hyatt writes:
> > On Mon, Mar 16, 2020 at 06:11:08PM +, Richard Sandiford wrote:
> >> Lewis Hyatt via Gcc-patches writes:
> > ...
> >> > FWIW there are three other options currently affected by this change
> >> > (-Wim
On Thu, 19 Mar 2020, Jason Merrill wrote:
> On 3/19/20 2:06 PM, Patrick Palka via Gcc-patches wrote:
> > On Thu, 19 Mar 2020, Marek Polacek wrote:
> >
> > > On Thu, Mar 19, 2020 at 01:06:35PM -0400, Patrick Palka via Gcc-patches
> > > wrote:
> > > > On Thu, 19 Mar 2020, Patrick Palka wrote:
> > >
Lewis Hyatt writes:
> On Tue, Mar 17, 2020 at 11:52:13AM +, Richard Sandiford wrote:
>> Lewis Hyatt writes:
>> > On Mon, Mar 16, 2020 at 06:11:08PM +, Richard Sandiford wrote:
>> >> Lewis Hyatt via Gcc-patches writes:
>> > ...
>> >> > FWIW there are three other options currently affected
We failed to handle pattern stmts appropriately.
Bootstrapped/tested on x86_64-unknown-linux-gnu, pushed.
2020-03-20 Richard Biener
* tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
to vectorize for CTOR defs.
---
gcc/tree-vect-slp.c | 1 +
1 file changed, 1 inser
Hello Kyrill,
Following patch is the rebased version of v1.
(version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019-November/534353.html
Hello,
This patch supports following MVE ACLE predicated intrinsic with `_x`
(dont-care) variant.
* ``_x`` (dont-care) which indicates that the fals
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 20 March 2020 14:01
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v3][ARM][GCC][9x]: MVE ACLE predicated intrinsics with
> (dont-care) variant.
>
> Hello Kyrill,
>
> Following patch is the reba
On Thu, 19 Mar 2020, Jason Merrill wrote:
> On 3/19/20 12:50 PM, Patrick Palka wrote:
> > On Thu, 19 Mar 2020, Jason Merrill wrote:
> >
> > > On 3/18/20 3:26 PM, Patrick Palka wrote:
> > > > + if (map)
> > > > +{
> > > > + pp_cxx_whitespace (pp);
> > > > + pp_cxx_left_bracket (pp);
On Fri, 2020-03-20 at 10:51 +0100, Richard Biener wrote:
> This fixes the heuristic deriving an actual object type from a
> MEM_REFs pointer operand to use the more sensible type of an
> actual object instead of the pointed to type.
>
> Bootstrapped / tested on x86_64-unknown-linux-gnu, applied.
>
Hi,
This is the first of two remaining changes needed to bring the GCC
implementation into line with the standard draft at n4849.
The standard now calls up a revised mechanism to handle exceptions
where exceptions thrown by the await_resume () method of the
initial suspend expression are cons
Hi all,
This patch is updated as attached.
It's rebased to the top. Is it ready for commit please?
Cheers
Dennis
> Hi all,
>
> This patch is part of a series that adds support for the ARMv8.m Custom
> Datapath Extension (CDE).
> It enables the ACLE intrinsics calling VCX1, VCX2, and VCX3
> ins
> Hi,
>
> since r278669 (fix for PR ipa/91956), IPA-SRA makes sure that the clone
> it creates is put into the same same_comdat as the original cgraph_node,
> so that it can call private comdats (such as the ipa-split bits of a
> comdat that is private).
>
> However, that means that if there is n
On 3/19/20 5:13 PM, Martin Sebor wrote:
On 3/19/20 9:32 AM, Martin Liška wrote:
On 3/19/20 10:09 AM, Jakub Jelinek wrote:
I mean, optimize for the !flag_checking case...
Sure, I transformed both situations into heap memory allocation.
In gcc/c-family/c-attribs.c I faced maybe uninitialized wa
Hi,
This is the final (non-bug-fixing) patch to bring our implementation
into line with n4849.
===
Although the note in the text [expr.await] / 5.1.1 is not normative,
it is asserted by users that an implementation that is unable to
perform unlimited symmetric transfers is not terribly useful.
Thanks to Jim for figuring out how to reproduce the problem, I was able
to apply pr94044-jig.diff to poorly hash the specialization table. (That
places all the specializations of a particular template in the same
bucket, forcing us to compare the arguments.)
The testcase creates sizeof_exprs c
On Fri, Mar 20, 2020 at 04:40:17PM +0100, Martin Liška wrote:
> Thank you very much for the feedback, it was useful. I realized that
> the patch made a huge code bloat (mainly because of the string constants
> and the fact that it didn't end quickly (with an internal_error).
>
> The loop is here n
Hello Kyrill,
Following patch is the rebased version of v1.
(version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019-November/534348.html
Hello,
This patch supports following MVE ACLE "add with carry across beats" intrinsics
and "beat-wise substract" intrinsics.
vadciq_s32, vadciq_u32,
On 3/20/20 4:43 PM, Jakub Jelinek wrote:
On Fri, Mar 20, 2020 at 04:40:17PM +0100, Martin Liška wrote:
Thank you very much for the feedback, it was useful. I realized that
the patch made a huge code bloat (mainly because of the string constants
and the fact that it didn't end quickly (with an in
On 3/19/20 10:26 PM, David Malcolm wrote:
On Thu, 2020-03-19 at 14:52 +0100, Martin Liška wrote:
Hi.
Hi Martin.
Hey.
The patch is about basic hint support for -fdump-foo options where
one can newly get something like:
$ ./xgcc -B. /tmp/foo.c -fdump-ipa-ynline -c
cc1: error: unrecognize
On 3/17/20 5:52 AM, Richard Sandiford wrote:
Lewis Hyatt writes:
On Mon, Mar 16, 2020 at 06:11:08PM +, Richard Sandiford wrote:
Lewis Hyatt via Gcc-patches writes:
...
FWIW there are three other options currently affected by this change
(-Wimplicit-fallthrough, -fcf-protection, and -fli
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 20 March 2020 15:51
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v2][ARM][GCC][10x]: MVE ACLE intrinsics "add with carry
> across beats" and "beat-wise substract".
>
> Hello Kyrill,
>
> Follow
On Fri, 2020-03-20 at 17:03 +0100, Martin Liška wrote:
> On 3/19/20 10:26 PM, David Malcolm wrote:
> > On Thu, 2020-03-19 at 14:52 +0100, Martin Liška wrote:
[...]
> >
> > > -int
> > > +void
> > > gcc::dump_manager::
> > > dump_switch_p (const char *arg)
> > > {
> > > @@ -1896,8 +1897,22 @
Hi,
This patch fixes LTO bug with the D front-end. As DECL_ASSEMBLER_NAME
is set on the TYPE_DECL, so TYPE_CXX_ODR_P must also be set on the type.
The addition of merge_aggregate_types is not strictly needed now, but it
fixes a problem introduced in newer versions of the dmd front-end where
temp
Hello Kyrill,
Following patch is the rebased version of v1.
(version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019-November/534347.html
Hello,
This patch supports following MVE ACLE intrinsics which are aliases of vstr and
vldr intrinsics.
vst1q_p_u8, vst1q_p_s8, vld1q_z_u8, vld1q_z_
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: 20 March 2020 16:42
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH v2][ARM][GCC][11x]: MVE ACLE vector interleaving store and
> deinterleaving load intrinsics and also aliases to vstr and vldr int
On Thu, Mar 19, 2020 at 05:40:01PM -0400, Jason Merrill wrote:
> On 3/19/20 5:28 PM, Marek Polacek wrote:
> > Consider
> >
> >template class A {
> > template class B {
> >void fn(typename A::B);
> > };
> >};
> >
> > which is rejected with
> > error: 'typename A::B' nam
These testcases are compiling successfully since 7.1.
gcc/testsuite/ChangeLog:
PR c++/69694
* g++.dg/cpp0x/decltype74.C: New test.
* g++.dg/cpp0x/decltype75.C: New test.
---
gcc/testsuite/g++.dg/cpp0x/decltype74.C | 30 +
gcc/testsuite/g++.dg/cpp0x
Ping
Richard Sandiford writes:
> [See:
>
> https://gcc.gnu.org/pipermail/gcc-patches/2020-March/541694.html
> https://gcc.gnu.org/pipermail/gcc-patches/2020-March/541759.html
>
> for a walkthrough of what goes wrong in the testcase, but hopefully
> the change makes sense on first principles.]
On 3/20/20 4:31 AM, Jakub Jelinek wrote:
On Wed, Mar 18, 2020 at 05:37:26PM -0400, Jason Merrill via Gcc-patches wrote:
How about improving get_narrower to handle COMPOUND_EXPR? I'd think that
would do the trick without affecting evaluation order.
Not completely, had to change also warnings_f
Martin Sebor writes:
> On 3/17/20 5:52 AM, Richard Sandiford wrote:
>> Lewis Hyatt writes:
>>> On Mon, Mar 16, 2020 at 06:11:08PM +, Richard Sandiford wrote:
Lewis Hyatt via Gcc-patches writes:
>>> ...
> FWIW there are three other options currently affected by this change
> (-Wi
On 3/20/20 9:49 AM, Patrick Palka wrote:
On Thu, 19 Mar 2020, Jason Merrill wrote:
On 3/19/20 2:06 PM, Patrick Palka via Gcc-patches wrote:
On Thu, 19 Mar 2020, Marek Polacek wrote:
On Thu, Mar 19, 2020 at 01:06:35PM -0400, Patrick Palka via Gcc-patches
wrote:
On Thu, 19 Mar 2020, Patrick P
This also dumps the root node we eventually smuggle in.
bootstrapped/tested on x86_64-unknown-linux-gnu
2020-03-20 Richard Biener
* tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
from the possibly modified root.
---
gcc/tree-vect-slp.c | 3 ++-
1 file changed, 2 i
On 3/20/20 1:06 PM, Marek Polacek wrote:
On Thu, Mar 19, 2020 at 05:40:01PM -0400, Jason Merrill wrote:
On 3/19/20 5:28 PM, Marek Polacek wrote:
Consider
template class A {
template class B {
void fn(typename A::B);
};
};
which is rejected with
error: 'typename A
On Fri, 20 Mar 2020, Jason Merrill wrote:
> On 3/20/20 9:49 AM, Patrick Palka wrote:
> > On Thu, 19 Mar 2020, Jason Merrill wrote:
> >
> > > On 3/19/20 2:06 PM, Patrick Palka via Gcc-patches wrote:
> > > > On Thu, 19 Mar 2020, Marek Polacek wrote:
> > > >
> > > > > On Thu, Mar 19, 2020 at 01:06:
On 2020-03-20 1:19 p.m., Richard Sandiford wrote:
Ping
Richard, sorry. I missed your original message.
Richard Sandiford writes:
[See:
https://gcc.gnu.org/pipermail/gcc-patches/2020-March/541694.html
https://gcc.gnu.org/pipermail/gcc-patches/2020-March/541759.html
for a walkthrough
On Fri, 20 Mar 2020, Patrick Palka wrote:
> On Fri, 20 Mar 2020, Jason Merrill wrote:
>
> > On 3/20/20 9:49 AM, Patrick Palka wrote:
> > > On Thu, 19 Mar 2020, Jason Merrill wrote:
> > >
> > > > On 3/19/20 2:06 PM, Patrick Palka via Gcc-patches wrote:
> > > > > On Thu, 19 Mar 2020, Marek Polacek
On 2020-03-19 18:06, Michael Matz wrote:
> Hello,
>
> On Wed, 18 Mar 2020, J.W. Jagersma via Gcc-patches wrote:
>
>>> Well, it's both: on the exception path the compiler has to assume that the
>>> the value wasn't changed (so that former defines are regarded as dead) or
>>> that it already has
On 3/20/20 11:46 AM, Richard Sandiford wrote:
Martin Sebor writes:
On 3/17/20 5:52 AM, Richard Sandiford wrote:
Lewis Hyatt writes:
On Mon, Mar 16, 2020 at 06:11:08PM +, Richard Sandiford wrote:
Lewis Hyatt via Gcc-patches writes:
...
FWIW there are three other options currently affe
On Fri, Mar 20, 2020 at 01:16:42PM -0600, Martin Sebor wrote:
> On 3/20/20 11:46 AM, Richard Sandiford wrote:
> > Martin Sebor writes:
> > > On 3/17/20 5:52 AM, Richard Sandiford wrote:
> > > > Lewis Hyatt writes:
> > > > > On Mon, Mar 16, 2020 at 06:11:08PM +, Richard Sandiford wrote:
> > >
Dear all,
normally, the target triplet does not play much of a role as
it is not really exposed to the user. However, for offloading,
it appears often:
* In distribution use, offloading support is compiled in, but
not enabled by default; one needs to use -foffload=… explicitly.
* Even with the
When compiling the existing libgomp.c/target-link-1.c with -O3, the
test case was ICEing as DECL_ALIGN was 1 (alias "1U << 0").
The reason is that "make_node (VAR_DECL)" calls "SET_DECL_ALIGN (t, 1)"
and unless one overrides this, it stays like that. Here, it later
failed by violating the assert
Hi,
this PR is about the new call_comdat_local_p verifier complaining on
flag being set outside of comdat group. We generally are quite lazy
about keeping the flag up to date that makes it hard to verify and leads
to odd bugs. Since comdat locals became more frequent with IPA passes
producing them
On 3/19/20 7:55 PM, Martin Sebor wrote:
On 3/18/20 9:07 PM, Jason Merrill wrote:
On 3/12/20 6:38 PM, Martin Sebor wrote:
...
+ declarations of a class from its uses doesn't work for type
aliases
+ (as in using T = class C;). */
Good point. Perhaps we could pass flags to
cp_parser
On 3/20/20 2:47 PM, Patrick Palka wrote:
On Fri, 20 Mar 2020, Patrick Palka wrote:
On Fri, 20 Mar 2020, Jason Merrill wrote:
On 3/20/20 9:49 AM, Patrick Palka wrote:
On Thu, 19 Mar 2020, Jason Merrill wrote:
On 3/19/20 2:06 PM, Patrick Palka via Gcc-patches wrote:
On Thu, 19 Mar 2020, Mar
On Tue, 2020-03-17 at 19:35 -0600, Martin Sebor via Gcc-patches wrote:
> PR tree-optimization/94131 - ICE on printf with a VLA string and -fno-tree-ccp
>
> gcc/testsuite/ChangeLog:
>
> PR tree-optimization/94131
> * gcc.dg/pr94131.c: New test.
>
> gcc/ChangeLog:
>
> PR tree-op
On Fri, Mar 20, 2020 at 02:12:49PM -0400, Jason Merrill wrote:
> On 3/20/20 1:06 PM, Marek Polacek wrote:
> > Wonderful. I've added a bunch of tests, and some from the related DRs too.
> > But I had a problem with the class-or-decltype case: if we have
> >
> > template struct D : T::template B::t
Hi!
On Thu, Mar 19, 2020 at 07:46:53PM -0500, Segher Boessenkool wrote:
> Please make such changes if you agree. Either way, okay for trunk.
Oh, and okay for backport to 9 next week :-)
Segher
On Wed, 2020-03-18 at 23:51 +0100, Andrea Corallo wrote:
> Hi all,
>
> Updated version of the patch mainly addressing comments on the
> concurrency issues.
>
> I came to the conclusions that the caching should be done in the
> function that we decide to be thread safe. However I haven't touched
On Mon, 2020-03-09 at 22:20 +, Andrea Corallo wrote:
> Hi all,
>
> second version of the patch for the 200 characters limit for literal
> strings addressing comments.
>
> make check-jit is passing clean.
>
> Best Regards
> Andrea
>
> gcc/jit/ChangeLog
> 2020-??-?? Andrea Corallo
>
>
This is attacking case 3 of PR 94174.
Although I'm no longer using ccmp for most of the TImode comparisons.
Thanks to Wilco Dijkstra for pulling off my blinders and reminding me
that we can use subs+sbcs for (almost) all compares.
The first 5 patches clean up or add patterns to support the expans
Duplicate all usub_*_carryinC, but use xzr for the output when we
only require the flags output. The signed versions use sign_extend
instead of zero_extend for combine's benefit.
These will be used shortly for TImode comparisons.
* config/aarch64/aarch64.md (cmp3_carryinC): New.
Combine will fold immediate -1 differently than the other
*cmp*_carryinC* patterns. In this case we can use adcs
with an xzr input, and it occurs frequently when comparing
128-bit values to small negative constants.
* config/aarch64/aarch64.md (cmp_carryinC_m2): New.
---
gcc/config/aarch
The expander and the insn pattern did not match, leading to
recognition failures in expand.
* config/aarch64/aarch64.md (*add3_carryin): Accept zeros.
---
gcc/config/aarch64/aarch64.md | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.
While cmp (extended register) and cmp (immediate) uses ,
cmp (shifted register) uses . So we can perform cmp xzr, x0.
For ccmp, we only have as an input.
* config/aarch64/aarch64.md (cmp): For operand 0, use
aarch64_reg_or_zero. Shuffle reg/reg to last alternative
and a
* config/aarch64/aarch64.md (absti2): New.
---
gcc/config/aarch64/aarch64.md | 30 ++
1 file changed, 30 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 284a8038e28..7a112f89487 100644
--- a/gcc/config/aarch64/aarc
In a couple of places we open-code a special case of this
pattern into the more specific sub3_compare1_imm.
Centralize that special case into an expander.
* config/aarch64/aarch64.md (*sub3_compare1): Rename
from sub3_compare1.
(sub3_compare1): New expander.
---
gcc/config
Return the entire comparison expression, not just the cc_reg.
This will allow the routine to adjust the comparison code as
needed for TImode comparisons.
Note that some users were passing e.g. EQ to aarch64_gen_compare_reg
and then using gen_rtx_NE. Pass the proper code in the first place.
Use ccmp to perform all TImode comparisons branchless.
* config/aarch64/aarch64.c (aarch64_gen_compare_reg): Expand all of
the comparisons for TImode, not just NE.
* config/aarch64/aarch64.md (cbranchti4, cstoreti4): New.
---
gcc/config/aarch64/aarch64.c | 130 +++
Modify aarch64_expand_subvti into a form that handles all
addition and subtraction, modulo, signed or unsigned overflow.
Use expand_insn to put the operands into the proper form,
and do not force values into register if not required.
* config/aarch64/aarch64.c (aarch64_ti_split) New.
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