Hi Srinath, > -----Original Message----- > From: Srinath Parvathaneni <srinath.parvathan...@arm.com> > Sent: 20 March 2020 14:01 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <kyrylo.tkac...@arm.com> > Subject: [PATCH v3][ARM][GCC][9x]: MVE ACLE predicated intrinsics with > (dont-care) variant. > > Hello Kyrill, > > Following patch is the rebased version of v1. > (version v1) https://gcc.gnu.org/pipermail/gcc-patches/2019- > November/534353.html > > #### > > Hello, > > This patch supports following MVE ACLE predicated intrinsic with `_x` (dont- > care) variant. > * ``_x`` (dont-care) which indicates that the false-predicated lanes have > undefined values. > These are syntactic sugar for merge intrinsics with a ``vuninitializedq`` > inactive parameter. > > vabdq_x_f16, vabdq_x_f32, vabdq_x_s16, vabdq_x_s32, vabdq_x_s8, > vabdq_x_u16, vabdq_x_u32, vabdq_x_u8, > vabsq_x_f16, vabsq_x_f32, vabsq_x_s16, vabsq_x_s32, vabsq_x_s8, > vaddq_x_f16, vaddq_x_f32, vaddq_x_n_f16, > vaddq_x_n_f32, vaddq_x_n_s16, vaddq_x_n_s32, vaddq_x_n_s8, > vaddq_x_n_u16, vaddq_x_n_u32, vaddq_x_n_u8, > vaddq_x_s16, vaddq_x_s32, vaddq_x_s8, vaddq_x_u16, vaddq_x_u32, > vaddq_x_u8, vandq_x_f16, vandq_x_f32, > vandq_x_s16, vandq_x_s32, vandq_x_s8, vandq_x_u16, vandq_x_u32, > vandq_x_u8, vbicq_x_f16, vbicq_x_f32, > vbicq_x_s16, vbicq_x_s32, vbicq_x_s8, vbicq_x_u16, vbicq_x_u32, > vbicq_x_u8, vbrsrq_x_n_f16, > vbrsrq_x_n_f32, vbrsrq_x_n_s16, vbrsrq_x_n_s32, vbrsrq_x_n_s8, > vbrsrq_x_n_u16, vbrsrq_x_n_u32, > vbrsrq_x_n_u8, vcaddq_rot270_x_f16, vcaddq_rot270_x_f32, > vcaddq_rot270_x_s16, vcaddq_rot270_x_s32, > vcaddq_rot270_x_s8, vcaddq_rot270_x_u16, vcaddq_rot270_x_u32, > vcaddq_rot270_x_u8, vcaddq_rot90_x_f16, > vcaddq_rot90_x_f32, vcaddq_rot90_x_s16, vcaddq_rot90_x_s32, > vcaddq_rot90_x_s8, vcaddq_rot90_x_u16, > vcaddq_rot90_x_u32, vcaddq_rot90_x_u8, vclsq_x_s16, vclsq_x_s32, > vclsq_x_s8, vclzq_x_s16, vclzq_x_s32, > vclzq_x_s8, vclzq_x_u16, vclzq_x_u32, vclzq_x_u8, vcmulq_rot180_x_f16, > vcmulq_rot180_x_f32, > vcmulq_rot270_x_f16, vcmulq_rot270_x_f32, vcmulq_rot90_x_f16, > vcmulq_rot90_x_f32, vcmulq_x_f16, > vcmulq_x_f32, vcvtaq_x_s16_f16, vcvtaq_x_s32_f32, vcvtaq_x_u16_f16, > vcvtaq_x_u32_f32, vcvtbq_x_f32_f16, > vcvtmq_x_s16_f16, vcvtmq_x_s32_f32, vcvtmq_x_u16_f16, > vcvtmq_x_u32_f32, vcvtnq_x_s16_f16, > vcvtnq_x_s32_f32, vcvtnq_x_u16_f16, vcvtnq_x_u32_f32, vcvtpq_x_s16_f16, > vcvtpq_x_s32_f32, > vcvtpq_x_u16_f16, vcvtpq_x_u32_f32, vcvtq_x_f16_s16, vcvtq_x_f16_u16, > vcvtq_x_f32_s32, vcvtq_x_f32_u32, > vcvtq_x_n_f16_s16, vcvtq_x_n_f16_u16, vcvtq_x_n_f32_s32, > vcvtq_x_n_f32_u32, vcvtq_x_n_s16_f16, > vcvtq_x_n_s32_f32, vcvtq_x_n_u16_f16, vcvtq_x_n_u32_f32, > vcvtq_x_s16_f16, vcvtq_x_s32_f32, > vcvtq_x_u16_f16, vcvtq_x_u32_f32, vcvttq_x_f32_f16, vddupq_x_n_u16, > vddupq_x_n_u32, vddupq_x_n_u8, > vddupq_x_wb_u16, vddupq_x_wb_u32, vddupq_x_wb_u8, vdupq_x_n_f16, > vdupq_x_n_f32, vdupq_x_n_s16, > vdupq_x_n_s32, vdupq_x_n_s8, vdupq_x_n_u16, vdupq_x_n_u32, > vdupq_x_n_u8, vdwdupq_x_n_u16, vdwdupq_x_n_u32, > vdwdupq_x_n_u8, vdwdupq_x_wb_u16, vdwdupq_x_wb_u32, > vdwdupq_x_wb_u8, veorq_x_f16, veorq_x_f32, veorq_x_s16, > veorq_x_s32, veorq_x_s8, veorq_x_u16, veorq_x_u32, veorq_x_u8, > vhaddq_x_n_s16, vhaddq_x_n_s32, > vhaddq_x_n_s8, vhaddq_x_n_u16, vhaddq_x_n_u32, vhaddq_x_n_u8, > vhaddq_x_s16, vhaddq_x_s32, vhaddq_x_s8, > vhaddq_x_u16, vhaddq_x_u32, vhaddq_x_u8, vhcaddq_rot270_x_s16, > vhcaddq_rot270_x_s32, vhcaddq_rot270_x_s8, > vhcaddq_rot90_x_s16, vhcaddq_rot90_x_s32, vhcaddq_rot90_x_s8, > vhsubq_x_n_s16, vhsubq_x_n_s32, > vhsubq_x_n_s8, vhsubq_x_n_u16, vhsubq_x_n_u32, vhsubq_x_n_u8, > vhsubq_x_s16, vhsubq_x_s32, vhsubq_x_s8, > vhsubq_x_u16, vhsubq_x_u32, vhsubq_x_u8, vidupq_x_n_u16, > vidupq_x_n_u32, vidupq_x_n_u8, vidupq_x_wb_u16, > vidupq_x_wb_u32, vidupq_x_wb_u8, viwdupq_x_n_u16, viwdupq_x_n_u32, > viwdupq_x_n_u8, viwdupq_x_wb_u16, > viwdupq_x_wb_u32, viwdupq_x_wb_u8, vmaxnmq_x_f16, vmaxnmq_x_f32, > vmaxq_x_s16, vmaxq_x_s32, vmaxq_x_s8, > vmaxq_x_u16, vmaxq_x_u32, vmaxq_x_u8, vminnmq_x_f16, > vminnmq_x_f32, vminq_x_s16, vminq_x_s32, vminq_x_s8, > vminq_x_u16, vminq_x_u32, vminq_x_u8, vmovlbq_x_s16, vmovlbq_x_s8, > vmovlbq_x_u16, vmovlbq_x_u8, > vmovltq_x_s16, vmovltq_x_s8, vmovltq_x_u16, vmovltq_x_u8, > vmulhq_x_s16, vmulhq_x_s32, vmulhq_x_s8, > vmulhq_x_u16, vmulhq_x_u32, vmulhq_x_u8, vmullbq_int_x_s16, > vmullbq_int_x_s32, vmullbq_int_x_s8, > vmullbq_int_x_u16, vmullbq_int_x_u32, vmullbq_int_x_u8, > vmullbq_poly_x_p16, vmullbq_poly_x_p8, > vmulltq_int_x_s16, vmulltq_int_x_s32, vmulltq_int_x_s8, vmulltq_int_x_u16, > vmulltq_int_x_u32, > vmulltq_int_x_u8, vmulltq_poly_x_p16, vmulltq_poly_x_p8, vmulq_x_f16, > vmulq_x_f32, vmulq_x_n_f16, > vmulq_x_n_f32, vmulq_x_n_s16, vmulq_x_n_s32, vmulq_x_n_s8, > vmulq_x_n_u16, vmulq_x_n_u32, vmulq_x_n_u8, > vmulq_x_s16, vmulq_x_s32, vmulq_x_s8, vmulq_x_u16, vmulq_x_u32, > vmulq_x_u8, vmvnq_x_n_s16, vmvnq_x_n_s32, > vmvnq_x_n_u16, vmvnq_x_n_u32, vmvnq_x_s16, vmvnq_x_s32, > vmvnq_x_s8, vmvnq_x_u16, vmvnq_x_u32, vmvnq_x_u8, > vnegq_x_f16, vnegq_x_f32, vnegq_x_s16, vnegq_x_s32, vnegq_x_s8, > vornq_x_f16, vornq_x_f32, vornq_x_s16, > vornq_x_s32, vornq_x_s8, vornq_x_u16, vornq_x_u32, vornq_x_u8, > vorrq_x_f16, vorrq_x_f32, vorrq_x_s16, > vorrq_x_s32, vorrq_x_s8, vorrq_x_u16, vorrq_x_u32, vorrq_x_u8, > vrev16q_x_s8, vrev16q_x_u8, vrev32q_x_f16, > vrev32q_x_s16, vrev32q_x_s8, vrev32q_x_u16, vrev32q_x_u8, > vrev64q_x_f16, vrev64q_x_f32, vrev64q_x_s16, > vrev64q_x_s32, vrev64q_x_s8, vrev64q_x_u16, vrev64q_x_u32, > vrev64q_x_u8, vrhaddq_x_s16, vrhaddq_x_s32, > vrhaddq_x_s8, vrhaddq_x_u16, vrhaddq_x_u32, vrhaddq_x_u8, > vrmulhq_x_s16, vrmulhq_x_s32, vrmulhq_x_s8, > vrmulhq_x_u16, vrmulhq_x_u32, vrmulhq_x_u8, vrndaq_x_f16, > vrndaq_x_f32, vrndmq_x_f16, vrndmq_x_f32, > vrndnq_x_f16, vrndnq_x_f32, vrndpq_x_f16, vrndpq_x_f32, vrndq_x_f16, > vrndq_x_f32, vrndxq_x_f16, > vrndxq_x_f32, vrshlq_x_s16, vrshlq_x_s32, vrshlq_x_s8, vrshlq_x_u16, > vrshlq_x_u32, vrshlq_x_u8, > vrshrq_x_n_s16, vrshrq_x_n_s32, vrshrq_x_n_s8, vrshrq_x_n_u16, > vrshrq_x_n_u32, vrshrq_x_n_u8, > vshllbq_x_n_s16, vshllbq_x_n_s8, vshllbq_x_n_u16, vshllbq_x_n_u8, > vshlltq_x_n_s16, vshlltq_x_n_s8, > vshlltq_x_n_u16, vshlltq_x_n_u8, vshlq_x_n_s16, vshlq_x_n_s32, > vshlq_x_n_s8, vshlq_x_n_u16, vshlq_x_n_u32, > vshlq_x_n_u8, vshlq_x_s16, vshlq_x_s32, vshlq_x_s8, vshlq_x_u16, > vshlq_x_u32, vshlq_x_u8, vshrq_x_n_s16, > vshrq_x_n_s32, vshrq_x_n_s8, vshrq_x_n_u16, vshrq_x_n_u32, > vshrq_x_n_u8, vsubq_x_f16, vsubq_x_f32, > vsubq_x_n_f16, vsubq_x_n_f32, vsubq_x_n_s16, vsubq_x_n_s32, > vsubq_x_n_s8, vsubq_x_n_u16, vsubq_x_n_u32, > vsubq_x_n_u8, vsubq_x_s16, vsubq_x_s32, vsubq_x_s8, vsubq_x_u16, > vsubq_x_u32, vsubq_x_u8. > > Please refer to M-profile Vector Extension (MVE) intrinsics [1] for more > details. > [1] https://developer.arm.com/architectures/instruction-sets/simd- > isas/helium/mve-intrinsics > > Regression tested on arm-none-eabi and found no regressions. > > Ok for trunk?
Thanks, I've pushed this patch to master. Kyrill > > Thanks, > Srinath. > > gcc/ChangeLog: > > 2020-03-20 Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro. > (vddupq_x_n_u16): Likewise. > (vddupq_x_n_u32): Likewise. > (vddupq_x_wb_u8): Likewise. > (vddupq_x_wb_u16): Likewise. > (vddupq_x_wb_u32): Likewise. > (vdwdupq_x_n_u8): Likewise. > (vdwdupq_x_n_u16): Likewise. > (vdwdupq_x_n_u32): Likewise. > (vdwdupq_x_wb_u8): Likewise. > (vdwdupq_x_wb_u16): Likewise. > (vdwdupq_x_wb_u32): Likewise. > (vidupq_x_n_u8): Likewise. > (vidupq_x_n_u16): Likewise. > (vidupq_x_n_u32): Likewise. > (vidupq_x_wb_u8): Likewise. > (vidupq_x_wb_u16): Likewise. > (vidupq_x_wb_u32): Likewise. > (viwdupq_x_n_u8): Likewise. > (viwdupq_x_n_u16): Likewise. > (viwdupq_x_n_u32): Likewise. > (viwdupq_x_wb_u8): Likewise. > (viwdupq_x_wb_u16): Likewise. > (viwdupq_x_wb_u32): Likewise. > (vdupq_x_n_s8): Likewise. > (vdupq_x_n_s16): Likewise. > (vdupq_x_n_s32): Likewise. > (vdupq_x_n_u8): Likewise. > (vdupq_x_n_u16): Likewise. > (vdupq_x_n_u32): Likewise. > (vminq_x_s8): Likewise. > (vminq_x_s16): Likewise. > (vminq_x_s32): Likewise. > (vminq_x_u8): Likewise. > (vminq_x_u16): Likewise. > (vminq_x_u32): Likewise. > (vmaxq_x_s8): Likewise. > (vmaxq_x_s16): Likewise. > (vmaxq_x_s32): Likewise. > (vmaxq_x_u8): Likewise. > (vmaxq_x_u16): Likewise. > (vmaxq_x_u32): Likewise. > (vabdq_x_s8): Likewise. > (vabdq_x_s16): Likewise. > (vabdq_x_s32): Likewise. > (vabdq_x_u8): Likewise. > (vabdq_x_u16): Likewise. > (vabdq_x_u32): Likewise. > (vabsq_x_s8): Likewise. > (vabsq_x_s16): Likewise. > (vabsq_x_s32): Likewise. > (vaddq_x_s8): Likewise. > (vaddq_x_s16): Likewise. > (vaddq_x_s32): Likewise. > (vaddq_x_n_s8): Likewise. > (vaddq_x_n_s16): Likewise. > (vaddq_x_n_s32): Likewise. > (vaddq_x_u8): Likewise. > (vaddq_x_u16): Likewise. > (vaddq_x_u32): Likewise. > (vaddq_x_n_u8): Likewise. > (vaddq_x_n_u16): Likewise. > (vaddq_x_n_u32): Likewise. > (vclsq_x_s8): Likewise. > (vclsq_x_s16): Likewise. > (vclsq_x_s32): Likewise. > (vclzq_x_s8): Likewise. > (vclzq_x_s16): Likewise. > (vclzq_x_s32): Likewise. > (vclzq_x_u8): Likewise. > (vclzq_x_u16): Likewise. > (vclzq_x_u32): Likewise. > (vnegq_x_s8): Likewise. > (vnegq_x_s16): Likewise. > (vnegq_x_s32): Likewise. > (vmulhq_x_s8): Likewise. > (vmulhq_x_s16): Likewise. > (vmulhq_x_s32): Likewise. > (vmulhq_x_u8): Likewise. > (vmulhq_x_u16): Likewise. > (vmulhq_x_u32): Likewise. > (vmullbq_poly_x_p8): Likewise. > (vmullbq_poly_x_p16): Likewise. > (vmullbq_int_x_s8): Likewise. > (vmullbq_int_x_s16): Likewise. > (vmullbq_int_x_s32): Likewise. > (vmullbq_int_x_u8): Likewise. > (vmullbq_int_x_u16): Likewise. > (vmullbq_int_x_u32): Likewise. > (vmulltq_poly_x_p8): Likewise. > (vmulltq_poly_x_p16): Likewise. > (vmulltq_int_x_s8): Likewise. > (vmulltq_int_x_s16): Likewise. > (vmulltq_int_x_s32): Likewise. > (vmulltq_int_x_u8): Likewise. > (vmulltq_int_x_u16): Likewise. > (vmulltq_int_x_u32): Likewise. > (vmulq_x_s8): Likewise. > (vmulq_x_s16): Likewise. > (vmulq_x_s32): Likewise. > (vmulq_x_n_s8): Likewise. > (vmulq_x_n_s16): Likewise. > (vmulq_x_n_s32): Likewise. > (vmulq_x_u8): Likewise. > (vmulq_x_u16): Likewise. > (vmulq_x_u32): Likewise. > (vmulq_x_n_u8): Likewise. > (vmulq_x_n_u16): Likewise. > (vmulq_x_n_u32): Likewise. > (vsubq_x_s8): Likewise. > (vsubq_x_s16): Likewise. > (vsubq_x_s32): Likewise. > (vsubq_x_n_s8): Likewise. > (vsubq_x_n_s16): Likewise. > (vsubq_x_n_s32): Likewise. > (vsubq_x_u8): Likewise. > (vsubq_x_u16): Likewise. > (vsubq_x_u32): Likewise. > (vsubq_x_n_u8): Likewise. > (vsubq_x_n_u16): Likewise. > (vsubq_x_n_u32): Likewise. > (vcaddq_rot90_x_s8): Likewise. > (vcaddq_rot90_x_s16): Likewise. > (vcaddq_rot90_x_s32): Likewise. > (vcaddq_rot90_x_u8): Likewise. > (vcaddq_rot90_x_u16): Likewise. > (vcaddq_rot90_x_u32): Likewise. > (vcaddq_rot270_x_s8): Likewise. > (vcaddq_rot270_x_s16): Likewise. > (vcaddq_rot270_x_s32): Likewise. > (vcaddq_rot270_x_u8): Likewise. > (vcaddq_rot270_x_u16): Likewise. > (vcaddq_rot270_x_u32): Likewise. > (vhaddq_x_n_s8): Likewise. > (vhaddq_x_n_s16): Likewise. > (vhaddq_x_n_s32): Likewise. > (vhaddq_x_n_u8): Likewise. > (vhaddq_x_n_u16): Likewise. > (vhaddq_x_n_u32): Likewise. > (vhaddq_x_s8): Likewise. > (vhaddq_x_s16): Likewise. > (vhaddq_x_s32): Likewise. > (vhaddq_x_u8): Likewise. > (vhaddq_x_u16): Likewise. > (vhaddq_x_u32): Likewise. > (vhcaddq_rot90_x_s8): Likewise. > (vhcaddq_rot90_x_s16): Likewise. > (vhcaddq_rot90_x_s32): Likewise. > (vhcaddq_rot270_x_s8): Likewise. > (vhcaddq_rot270_x_s16): Likewise. > (vhcaddq_rot270_x_s32): Likewise. > (vhsubq_x_n_s8): Likewise. > (vhsubq_x_n_s16): Likewise. > (vhsubq_x_n_s32): Likewise. > (vhsubq_x_n_u8): Likewise. > (vhsubq_x_n_u16): Likewise. > (vhsubq_x_n_u32): Likewise. > (vhsubq_x_s8): Likewise. > (vhsubq_x_s16): Likewise. > (vhsubq_x_s32): Likewise. > (vhsubq_x_u8): Likewise. > (vhsubq_x_u16): Likewise. > (vhsubq_x_u32): Likewise. > (vrhaddq_x_s8): Likewise. > (vrhaddq_x_s16): Likewise. > (vrhaddq_x_s32): Likewise. > (vrhaddq_x_u8): Likewise. > (vrhaddq_x_u16): Likewise. > (vrhaddq_x_u32): Likewise. > (vrmulhq_x_s8): Likewise. > (vrmulhq_x_s16): Likewise. > (vrmulhq_x_s32): Likewise. > (vrmulhq_x_u8): Likewise. > (vrmulhq_x_u16): Likewise. > (vrmulhq_x_u32): Likewise. > (vandq_x_s8): Likewise. > (vandq_x_s16): Likewise. > (vandq_x_s32): Likewise. > (vandq_x_u8): Likewise. > (vandq_x_u16): Likewise. > (vandq_x_u32): Likewise. > (vbicq_x_s8): Likewise. > (vbicq_x_s16): Likewise. > (vbicq_x_s32): Likewise. > (vbicq_x_u8): Likewise. > (vbicq_x_u16): Likewise. > (vbicq_x_u32): Likewise. > (vbrsrq_x_n_s8): Likewise. > (vbrsrq_x_n_s16): Likewise. > (vbrsrq_x_n_s32): Likewise. > (vbrsrq_x_n_u8): Likewise. > (vbrsrq_x_n_u16): Likewise. > (vbrsrq_x_n_u32): Likewise. > (veorq_x_s8): Likewise. > (veorq_x_s16): Likewise. > (veorq_x_s32): Likewise. > (veorq_x_u8): Likewise. > (veorq_x_u16): Likewise. > (veorq_x_u32): Likewise. > (vmovlbq_x_s8): Likewise. > (vmovlbq_x_s16): Likewise. > (vmovlbq_x_u8): Likewise. > (vmovlbq_x_u16): Likewise. > (vmovltq_x_s8): Likewise. > (vmovltq_x_s16): Likewise. > (vmovltq_x_u8): Likewise. > (vmovltq_x_u16): Likewise. > (vmvnq_x_s8): Likewise. > (vmvnq_x_s16): Likewise. > (vmvnq_x_s32): Likewise. > (vmvnq_x_u8): Likewise. > (vmvnq_x_u16): Likewise. > (vmvnq_x_u32): Likewise. > (vmvnq_x_n_s16): Likewise. > (vmvnq_x_n_s32): Likewise. > (vmvnq_x_n_u16): Likewise. > (vmvnq_x_n_u32): Likewise. > (vornq_x_s8): Likewise. > (vornq_x_s16): Likewise. > (vornq_x_s32): Likewise. > (vornq_x_u8): Likewise. > (vornq_x_u16): Likewise. > (vornq_x_u32): Likewise. > (vorrq_x_s8): Likewise. > (vorrq_x_s16): Likewise. > (vorrq_x_s32): Likewise. > (vorrq_x_u8): Likewise. > (vorrq_x_u16): Likewise. > (vorrq_x_u32): Likewise. > (vrev16q_x_s8): Likewise. > (vrev16q_x_u8): Likewise. > (vrev32q_x_s8): Likewise. > (vrev32q_x_s16): Likewise. > (vrev32q_x_u8): Likewise. > (vrev32q_x_u16): Likewise. > (vrev64q_x_s8): Likewise. > (vrev64q_x_s16): Likewise. > (vrev64q_x_s32): Likewise. > (vrev64q_x_u8): Likewise. > (vrev64q_x_u16): Likewise. > (vrev64q_x_u32): Likewise. > (vrshlq_x_s8): Likewise. > (vrshlq_x_s16): Likewise. > (vrshlq_x_s32): Likewise. > (vrshlq_x_u8): Likewise. > (vrshlq_x_u16): Likewise. > (vrshlq_x_u32): Likewise. > (vshllbq_x_n_s8): Likewise. > (vshllbq_x_n_s16): Likewise. > (vshllbq_x_n_u8): Likewise. > (vshllbq_x_n_u16): Likewise. > (vshlltq_x_n_s8): Likewise. > (vshlltq_x_n_s16): Likewise. > (vshlltq_x_n_u8): Likewise. > (vshlltq_x_n_u16): Likewise. > (vshlq_x_s8): Likewise. > (vshlq_x_s16): Likewise. > (vshlq_x_s32): Likewise. > (vshlq_x_u8): Likewise. > (vshlq_x_u16): Likewise. > (vshlq_x_u32): Likewise. > (vshlq_x_n_s8): Likewise. > (vshlq_x_n_s16): Likewise. > (vshlq_x_n_s32): Likewise. > (vshlq_x_n_u8): Likewise. > (vshlq_x_n_u16): Likewise. > (vshlq_x_n_u32): Likewise. > (vrshrq_x_n_s8): Likewise. > (vrshrq_x_n_s16): Likewise. > (vrshrq_x_n_s32): Likewise. > (vrshrq_x_n_u8): Likewise. > (vrshrq_x_n_u16): Likewise. > (vrshrq_x_n_u32): Likewise. > (vshrq_x_n_s8): Likewise. > (vshrq_x_n_s16): Likewise. > (vshrq_x_n_s32): Likewise. > (vshrq_x_n_u8): Likewise. > (vshrq_x_n_u16): Likewise. > (vshrq_x_n_u32): Likewise. > (vdupq_x_n_f16): Likewise. > (vdupq_x_n_f32): Likewise. > (vminnmq_x_f16): Likewise. > (vminnmq_x_f32): Likewise. > (vmaxnmq_x_f16): Likewise. > (vmaxnmq_x_f32): Likewise. > (vabdq_x_f16): Likewise. > (vabdq_x_f32): Likewise. > (vabsq_x_f16): Likewise. > (vabsq_x_f32): Likewise. > (vaddq_x_f16): Likewise. > (vaddq_x_f32): Likewise. > (vaddq_x_n_f16): Likewise. > (vaddq_x_n_f32): Likewise. > (vnegq_x_f16): Likewise. > (vnegq_x_f32): Likewise. > (vmulq_x_f16): Likewise. > (vmulq_x_f32): Likewise. > (vmulq_x_n_f16): Likewise. > (vmulq_x_n_f32): Likewise. > (vsubq_x_f16): Likewise. > (vsubq_x_f32): Likewise. > (vsubq_x_n_f16): Likewise. > (vsubq_x_n_f32): Likewise. > (vcaddq_rot90_x_f16): Likewise. > (vcaddq_rot90_x_f32): Likewise. > (vcaddq_rot270_x_f16): Likewise. > (vcaddq_rot270_x_f32): Likewise. > (vcmulq_x_f16): Likewise. > (vcmulq_x_f32): Likewise. > (vcmulq_rot90_x_f16): Likewise. > (vcmulq_rot90_x_f32): Likewise. > (vcmulq_rot180_x_f16): Likewise. > (vcmulq_rot180_x_f32): Likewise. > (vcmulq_rot270_x_f16): Likewise. > (vcmulq_rot270_x_f32): Likewise. > (vcvtaq_x_s16_f16): Likewise. > (vcvtaq_x_s32_f32): Likewise. > (vcvtaq_x_u16_f16): Likewise. > (vcvtaq_x_u32_f32): Likewise. > (vcvtnq_x_s16_f16): Likewise. > (vcvtnq_x_s32_f32): Likewise. > (vcvtnq_x_u16_f16): Likewise. > (vcvtnq_x_u32_f32): Likewise. > (vcvtpq_x_s16_f16): Likewise. > (vcvtpq_x_s32_f32): Likewise. > (vcvtpq_x_u16_f16): Likewise. > (vcvtpq_x_u32_f32): Likewise. > (vcvtmq_x_s16_f16): Likewise. > (vcvtmq_x_s32_f32): Likewise. > (vcvtmq_x_u16_f16): Likewise. > (vcvtmq_x_u32_f32): Likewise. > (vcvtbq_x_f32_f16): Likewise. > (vcvttq_x_f32_f16): Likewise. > (vcvtq_x_f16_u16): Likewise. > (vcvtq_x_f16_s16): Likewise. > (vcvtq_x_f32_s32): Likewise. > (vcvtq_x_f32_u32): Likewise. > (vcvtq_x_n_f16_s16): Likewise. > (vcvtq_x_n_f16_u16): Likewise. > (vcvtq_x_n_f32_s32): Likewise. > (vcvtq_x_n_f32_u32): Likewise. > (vcvtq_x_s16_f16): Likewise. > (vcvtq_x_s32_f32): Likewise. > (vcvtq_x_u16_f16): Likewise. > (vcvtq_x_u32_f32): Likewise. > (vcvtq_x_n_s16_f16): Likewise. > (vcvtq_x_n_s32_f32): Likewise. > (vcvtq_x_n_u16_f16): Likewise. > (vcvtq_x_n_u32_f32): Likewise. > (vrndq_x_f16): Likewise. > (vrndq_x_f32): Likewise. > (vrndnq_x_f16): Likewise. > (vrndnq_x_f32): Likewise. > (vrndmq_x_f16): Likewise. > (vrndmq_x_f32): Likewise. > (vrndpq_x_f16): Likewise. > (vrndpq_x_f32): Likewise. > (vrndaq_x_f16): Likewise. > (vrndaq_x_f32): Likewise. > (vrndxq_x_f16): Likewise. > (vrndxq_x_f32): Likewise. > (vandq_x_f16): Likewise. > (vandq_x_f32): Likewise. > (vbicq_x_f16): Likewise. > (vbicq_x_f32): Likewise. > (vbrsrq_x_n_f16): Likewise. > (vbrsrq_x_n_f32): Likewise. > (veorq_x_f16): Likewise. > (veorq_x_f32): Likewise. > (vornq_x_f16): Likewise. > (vornq_x_f32): Likewise. > (vorrq_x_f16): Likewise. > (vorrq_x_f32): Likewise. > (vrev32q_x_f16): Likewise. > (vrev64q_x_f16): Likewise. > (vrev64q_x_f32): Likewise. > (__arm_vddupq_x_n_u8): Define intrinsic. > (__arm_vddupq_x_n_u16): Likewise. > (__arm_vddupq_x_n_u32): Likewise. > (__arm_vddupq_x_wb_u8): Likewise. > (__arm_vddupq_x_wb_u16): Likewise. > (__arm_vddupq_x_wb_u32): Likewise. > (__arm_vdwdupq_x_n_u8): Likewise. > (__arm_vdwdupq_x_n_u16): Likewise. > (__arm_vdwdupq_x_n_u32): Likewise. > (__arm_vdwdupq_x_wb_u8): Likewise. > (__arm_vdwdupq_x_wb_u16): Likewise. > (__arm_vdwdupq_x_wb_u32): Likewise. > (__arm_vidupq_x_n_u8): Likewise. > (__arm_vidupq_x_n_u16): Likewise. > (__arm_vidupq_x_n_u32): Likewise. > (__arm_vidupq_x_wb_u8): Likewise. > (__arm_vidupq_x_wb_u16): Likewise. > (__arm_vidupq_x_wb_u32): Likewise. > (__arm_viwdupq_x_n_u8): Likewise. > (__arm_viwdupq_x_n_u16): Likewise. > (__arm_viwdupq_x_n_u32): Likewise. > (__arm_viwdupq_x_wb_u8): Likewise. > (__arm_viwdupq_x_wb_u16): Likewise. > (__arm_viwdupq_x_wb_u32): Likewise. > (__arm_vdupq_x_n_s8): Likewise. > (__arm_vdupq_x_n_s16): Likewise. > (__arm_vdupq_x_n_s32): Likewise. > (__arm_vdupq_x_n_u8): Likewise. > (__arm_vdupq_x_n_u16): Likewise. > (__arm_vdupq_x_n_u32): Likewise. > (__arm_vminq_x_s8): Likewise. > (__arm_vminq_x_s16): Likewise. > (__arm_vminq_x_s32): Likewise. > (__arm_vminq_x_u8): Likewise. > (__arm_vminq_x_u16): Likewise. > (__arm_vminq_x_u32): Likewise. > (__arm_vmaxq_x_s8): Likewise. > (__arm_vmaxq_x_s16): Likewise. > (__arm_vmaxq_x_s32): Likewise. > (__arm_vmaxq_x_u8): Likewise. > (__arm_vmaxq_x_u16): Likewise. > (__arm_vmaxq_x_u32): Likewise. > (__arm_vabdq_x_s8): Likewise. > (__arm_vabdq_x_s16): Likewise. > (__arm_vabdq_x_s32): Likewise. > (__arm_vabdq_x_u8): Likewise. > (__arm_vabdq_x_u16): Likewise. > (__arm_vabdq_x_u32): Likewise. > (__arm_vabsq_x_s8): Likewise. > (__arm_vabsq_x_s16): Likewise. > (__arm_vabsq_x_s32): Likewise. > (__arm_vaddq_x_s8): Likewise. > (__arm_vaddq_x_s16): Likewise. > (__arm_vaddq_x_s32): Likewise. > (__arm_vaddq_x_n_s8): Likewise. > (__arm_vaddq_x_n_s16): Likewise. > (__arm_vaddq_x_n_s32): Likewise. > (__arm_vaddq_x_u8): Likewise. > (__arm_vaddq_x_u16): Likewise. > (__arm_vaddq_x_u32): Likewise. > (__arm_vaddq_x_n_u8): Likewise. > (__arm_vaddq_x_n_u16): Likewise. > (__arm_vaddq_x_n_u32): Likewise. > (__arm_vclsq_x_s8): Likewise. > (__arm_vclsq_x_s16): Likewise. > (__arm_vclsq_x_s32): Likewise. > (__arm_vclzq_x_s8): Likewise. > (__arm_vclzq_x_s16): Likewise. > (__arm_vclzq_x_s32): Likewise. > (__arm_vclzq_x_u8): Likewise. > (__arm_vclzq_x_u16): Likewise. > (__arm_vclzq_x_u32): Likewise. > (__arm_vnegq_x_s8): Likewise. > (__arm_vnegq_x_s16): Likewise. > (__arm_vnegq_x_s32): Likewise. > (__arm_vmulhq_x_s8): Likewise. > (__arm_vmulhq_x_s16): Likewise. > (__arm_vmulhq_x_s32): Likewise. > (__arm_vmulhq_x_u8): Likewise. > (__arm_vmulhq_x_u16): Likewise. > (__arm_vmulhq_x_u32): Likewise. > (__arm_vmullbq_poly_x_p8): Likewise. > (__arm_vmullbq_poly_x_p16): Likewise. > (__arm_vmullbq_int_x_s8): Likewise. > (__arm_vmullbq_int_x_s16): Likewise. > (__arm_vmullbq_int_x_s32): Likewise. > (__arm_vmullbq_int_x_u8): Likewise. > (__arm_vmullbq_int_x_u16): Likewise. > (__arm_vmullbq_int_x_u32): Likewise. > (__arm_vmulltq_poly_x_p8): Likewise. > (__arm_vmulltq_poly_x_p16): Likewise. > (__arm_vmulltq_int_x_s8): Likewise. > (__arm_vmulltq_int_x_s16): Likewise. > (__arm_vmulltq_int_x_s32): Likewise. > (__arm_vmulltq_int_x_u8): Likewise. > (__arm_vmulltq_int_x_u16): Likewise. > (__arm_vmulltq_int_x_u32): Likewise. > (__arm_vmulq_x_s8): Likewise. > (__arm_vmulq_x_s16): Likewise. > (__arm_vmulq_x_s32): Likewise. > (__arm_vmulq_x_n_s8): Likewise. > (__arm_vmulq_x_n_s16): Likewise. > (__arm_vmulq_x_n_s32): Likewise. > (__arm_vmulq_x_u8): Likewise. > (__arm_vmulq_x_u16): Likewise. > (__arm_vmulq_x_u32): Likewise. > (__arm_vmulq_x_n_u8): Likewise. > (__arm_vmulq_x_n_u16): Likewise. > (__arm_vmulq_x_n_u32): Likewise. > (__arm_vsubq_x_s8): Likewise. > (__arm_vsubq_x_s16): Likewise. > (__arm_vsubq_x_s32): Likewise. > (__arm_vsubq_x_n_s8): Likewise. > (__arm_vsubq_x_n_s16): Likewise. > (__arm_vsubq_x_n_s32): Likewise. > (__arm_vsubq_x_u8): Likewise. > (__arm_vsubq_x_u16): Likewise. > (__arm_vsubq_x_u32): Likewise. > (__arm_vsubq_x_n_u8): Likewise. > (__arm_vsubq_x_n_u16): Likewise. > (__arm_vsubq_x_n_u32): Likewise. > (__arm_vcaddq_rot90_x_s8): Likewise. > (__arm_vcaddq_rot90_x_s16): Likewise. > (__arm_vcaddq_rot90_x_s32): Likewise. > (__arm_vcaddq_rot90_x_u8): Likewise. > (__arm_vcaddq_rot90_x_u16): Likewise. > (__arm_vcaddq_rot90_x_u32): Likewise. > (__arm_vcaddq_rot270_x_s8): Likewise. > (__arm_vcaddq_rot270_x_s16): Likewise. > (__arm_vcaddq_rot270_x_s32): Likewise. > (__arm_vcaddq_rot270_x_u8): Likewise. > (__arm_vcaddq_rot270_x_u16): Likewise. > (__arm_vcaddq_rot270_x_u32): Likewise. > (__arm_vhaddq_x_n_s8): Likewise. > (__arm_vhaddq_x_n_s16): Likewise. > (__arm_vhaddq_x_n_s32): Likewise. > (__arm_vhaddq_x_n_u8): Likewise. > (__arm_vhaddq_x_n_u16): Likewise. > (__arm_vhaddq_x_n_u32): Likewise. > (__arm_vhaddq_x_s8): Likewise. > (__arm_vhaddq_x_s16): Likewise. > (__arm_vhaddq_x_s32): Likewise. > (__arm_vhaddq_x_u8): Likewise. > (__arm_vhaddq_x_u16): Likewise. > (__arm_vhaddq_x_u32): Likewise. > (__arm_vhcaddq_rot90_x_s8): Likewise. > (__arm_vhcaddq_rot90_x_s16): Likewise. > (__arm_vhcaddq_rot90_x_s32): Likewise. > (__arm_vhcaddq_rot270_x_s8): Likewise. > (__arm_vhcaddq_rot270_x_s16): Likewise. > (__arm_vhcaddq_rot270_x_s32): Likewise. > (__arm_vhsubq_x_n_s8): Likewise. > (__arm_vhsubq_x_n_s16): Likewise. > (__arm_vhsubq_x_n_s32): Likewise. > (__arm_vhsubq_x_n_u8): Likewise. > (__arm_vhsubq_x_n_u16): Likewise. > (__arm_vhsubq_x_n_u32): Likewise. > (__arm_vhsubq_x_s8): Likewise. > (__arm_vhsubq_x_s16): Likewise. > (__arm_vhsubq_x_s32): Likewise. > (__arm_vhsubq_x_u8): Likewise. > (__arm_vhsubq_x_u16): Likewise. > (__arm_vhsubq_x_u32): Likewise. > (__arm_vrhaddq_x_s8): Likewise. > (__arm_vrhaddq_x_s16): Likewise. > (__arm_vrhaddq_x_s32): Likewise. > (__arm_vrhaddq_x_u8): Likewise. > (__arm_vrhaddq_x_u16): Likewise. > (__arm_vrhaddq_x_u32): Likewise. > (__arm_vrmulhq_x_s8): Likewise. > (__arm_vrmulhq_x_s16): Likewise. > (__arm_vrmulhq_x_s32): Likewise. > (__arm_vrmulhq_x_u8): Likewise. > (__arm_vrmulhq_x_u16): Likewise. > (__arm_vrmulhq_x_u32): Likewise. > (__arm_vandq_x_s8): Likewise. > (__arm_vandq_x_s16): Likewise. > (__arm_vandq_x_s32): Likewise. > (__arm_vandq_x_u8): Likewise. > (__arm_vandq_x_u16): Likewise. > (__arm_vandq_x_u32): Likewise. > (__arm_vbicq_x_s8): Likewise. > (__arm_vbicq_x_s16): Likewise. > (__arm_vbicq_x_s32): Likewise. > (__arm_vbicq_x_u8): Likewise. > (__arm_vbicq_x_u16): Likewise. > (__arm_vbicq_x_u32): Likewise. > (__arm_vbrsrq_x_n_s8): Likewise. > (__arm_vbrsrq_x_n_s16): Likewise. > (__arm_vbrsrq_x_n_s32): Likewise. > (__arm_vbrsrq_x_n_u8): Likewise. > (__arm_vbrsrq_x_n_u16): Likewise. > (__arm_vbrsrq_x_n_u32): Likewise. > (__arm_veorq_x_s8): Likewise. > (__arm_veorq_x_s16): Likewise. > (__arm_veorq_x_s32): Likewise. > (__arm_veorq_x_u8): Likewise. > (__arm_veorq_x_u16): Likewise. > (__arm_veorq_x_u32): Likewise. > (__arm_vmovlbq_x_s8): Likewise. > (__arm_vmovlbq_x_s16): Likewise. > (__arm_vmovlbq_x_u8): Likewise. > (__arm_vmovlbq_x_u16): Likewise. > (__arm_vmovltq_x_s8): Likewise. > (__arm_vmovltq_x_s16): Likewise. > (__arm_vmovltq_x_u8): Likewise. > (__arm_vmovltq_x_u16): Likewise. > (__arm_vmvnq_x_s8): Likewise. > (__arm_vmvnq_x_s16): Likewise. > (__arm_vmvnq_x_s32): Likewise. > (__arm_vmvnq_x_u8): Likewise. > (__arm_vmvnq_x_u16): Likewise. > (__arm_vmvnq_x_u32): Likewise. > (__arm_vmvnq_x_n_s16): Likewise. > (__arm_vmvnq_x_n_s32): Likewise. > (__arm_vmvnq_x_n_u16): Likewise. > (__arm_vmvnq_x_n_u32): Likewise. > (__arm_vornq_x_s8): Likewise. > (__arm_vornq_x_s16): Likewise. > (__arm_vornq_x_s32): Likewise. > (__arm_vornq_x_u8): Likewise. > (__arm_vornq_x_u16): Likewise. > (__arm_vornq_x_u32): Likewise. > (__arm_vorrq_x_s8): Likewise. > (__arm_vorrq_x_s16): Likewise. > (__arm_vorrq_x_s32): Likewise. > (__arm_vorrq_x_u8): Likewise. > (__arm_vorrq_x_u16): Likewise. > (__arm_vorrq_x_u32): Likewise. > (__arm_vrev16q_x_s8): Likewise. > (__arm_vrev16q_x_u8): Likewise. > (__arm_vrev32q_x_s8): Likewise. > (__arm_vrev32q_x_s16): Likewise. > (__arm_vrev32q_x_u8): Likewise. > (__arm_vrev32q_x_u16): Likewise. > (__arm_vrev64q_x_s8): Likewise. > (__arm_vrev64q_x_s16): Likewise. > (__arm_vrev64q_x_s32): Likewise. > (__arm_vrev64q_x_u8): Likewise. > (__arm_vrev64q_x_u16): Likewise. > (__arm_vrev64q_x_u32): Likewise. > (__arm_vrshlq_x_s8): Likewise. > (__arm_vrshlq_x_s16): Likewise. > (__arm_vrshlq_x_s32): Likewise. > (__arm_vrshlq_x_u8): Likewise. > (__arm_vrshlq_x_u16): Likewise. > (__arm_vrshlq_x_u32): Likewise. > (__arm_vshllbq_x_n_s8): Likewise. > (__arm_vshllbq_x_n_s16): Likewise. > (__arm_vshllbq_x_n_u8): Likewise. > (__arm_vshllbq_x_n_u16): Likewise. > (__arm_vshlltq_x_n_s8): Likewise. > (__arm_vshlltq_x_n_s16): Likewise. > (__arm_vshlltq_x_n_u8): Likewise. > (__arm_vshlltq_x_n_u16): Likewise. > (__arm_vshlq_x_s8): Likewise. > (__arm_vshlq_x_s16): Likewise. > (__arm_vshlq_x_s32): Likewise. > (__arm_vshlq_x_u8): Likewise. > (__arm_vshlq_x_u16): Likewise. > (__arm_vshlq_x_u32): Likewise. > (__arm_vshlq_x_n_s8): Likewise. > (__arm_vshlq_x_n_s16): Likewise. > (__arm_vshlq_x_n_s32): Likewise. > (__arm_vshlq_x_n_u8): Likewise. > (__arm_vshlq_x_n_u16): Likewise. > (__arm_vshlq_x_n_u32): Likewise. > (__arm_vrshrq_x_n_s8): Likewise. > (__arm_vrshrq_x_n_s16): Likewise. > (__arm_vrshrq_x_n_s32): Likewise. > (__arm_vrshrq_x_n_u8): Likewise. > (__arm_vrshrq_x_n_u16): Likewise. > (__arm_vrshrq_x_n_u32): Likewise. > (__arm_vshrq_x_n_s8): Likewise. > (__arm_vshrq_x_n_s16): Likewise. > (__arm_vshrq_x_n_s32): Likewise. > (__arm_vshrq_x_n_u8): Likewise. > (__arm_vshrq_x_n_u16): Likewise. > (__arm_vshrq_x_n_u32): Likewise. > (__arm_vdupq_x_n_f16): Likewise. > (__arm_vdupq_x_n_f32): Likewise. > (__arm_vminnmq_x_f16): Likewise. > (__arm_vminnmq_x_f32): Likewise. > (__arm_vmaxnmq_x_f16): Likewise. > (__arm_vmaxnmq_x_f32): Likewise. > (__arm_vabdq_x_f16): Likewise. > (__arm_vabdq_x_f32): Likewise. > (__arm_vabsq_x_f16): Likewise. > (__arm_vabsq_x_f32): Likewise. > (__arm_vaddq_x_f16): Likewise. > (__arm_vaddq_x_f32): Likewise. > (__arm_vaddq_x_n_f16): Likewise. > (__arm_vaddq_x_n_f32): Likewise. > (__arm_vnegq_x_f16): Likewise. > (__arm_vnegq_x_f32): Likewise. > (__arm_vmulq_x_f16): Likewise. > (__arm_vmulq_x_f32): Likewise. > (__arm_vmulq_x_n_f16): Likewise. > (__arm_vmulq_x_n_f32): Likewise. > (__arm_vsubq_x_f16): Likewise. > (__arm_vsubq_x_f32): Likewise. > (__arm_vsubq_x_n_f16): Likewise. > (__arm_vsubq_x_n_f32): Likewise. > (__arm_vcaddq_rot90_x_f16): Likewise. > (__arm_vcaddq_rot90_x_f32): Likewise. > (__arm_vcaddq_rot270_x_f16): Likewise. > (__arm_vcaddq_rot270_x_f32): Likewise. > (__arm_vcmulq_x_f16): Likewise. > (__arm_vcmulq_x_f32): Likewise. > (__arm_vcmulq_rot90_x_f16): Likewise. > (__arm_vcmulq_rot90_x_f32): Likewise. > (__arm_vcmulq_rot180_x_f16): Likewise. > (__arm_vcmulq_rot180_x_f32): Likewise. > (__arm_vcmulq_rot270_x_f16): Likewise. > (__arm_vcmulq_rot270_x_f32): Likewise. > (__arm_vcvtaq_x_s16_f16): Likewise. > (__arm_vcvtaq_x_s32_f32): Likewise. > (__arm_vcvtaq_x_u16_f16): Likewise. > (__arm_vcvtaq_x_u32_f32): Likewise. > (__arm_vcvtnq_x_s16_f16): Likewise. > (__arm_vcvtnq_x_s32_f32): Likewise. > (__arm_vcvtnq_x_u16_f16): Likewise. > (__arm_vcvtnq_x_u32_f32): Likewise. > (__arm_vcvtpq_x_s16_f16): Likewise. > (__arm_vcvtpq_x_s32_f32): Likewise. > (__arm_vcvtpq_x_u16_f16): Likewise. > (__arm_vcvtpq_x_u32_f32): Likewise. > (__arm_vcvtmq_x_s16_f16): Likewise. > (__arm_vcvtmq_x_s32_f32): Likewise. > (__arm_vcvtmq_x_u16_f16): Likewise. > (__arm_vcvtmq_x_u32_f32): Likewise. > (__arm_vcvtbq_x_f32_f16): Likewise. > (__arm_vcvttq_x_f32_f16): Likewise. > (__arm_vcvtq_x_f16_u16): Likewise. > (__arm_vcvtq_x_f16_s16): Likewise. > (__arm_vcvtq_x_f32_s32): Likewise. > (__arm_vcvtq_x_f32_u32): Likewise. > (__arm_vcvtq_x_n_f16_s16): Likewise. > (__arm_vcvtq_x_n_f16_u16): Likewise. > (__arm_vcvtq_x_n_f32_s32): Likewise. > (__arm_vcvtq_x_n_f32_u32): Likewise. > (__arm_vcvtq_x_s16_f16): Likewise. > (__arm_vcvtq_x_s32_f32): Likewise. > (__arm_vcvtq_x_u16_f16): Likewise. > (__arm_vcvtq_x_u32_f32): Likewise. > (__arm_vcvtq_x_n_s16_f16): Likewise. > (__arm_vcvtq_x_n_s32_f32): Likewise. > (__arm_vcvtq_x_n_u16_f16): Likewise. > (__arm_vcvtq_x_n_u32_f32): Likewise. > (__arm_vrndq_x_f16): Likewise. > (__arm_vrndq_x_f32): Likewise. > (__arm_vrndnq_x_f16): Likewise. > (__arm_vrndnq_x_f32): Likewise. > (__arm_vrndmq_x_f16): Likewise. > (__arm_vrndmq_x_f32): Likewise. > (__arm_vrndpq_x_f16): Likewise. > (__arm_vrndpq_x_f32): Likewise. > (__arm_vrndaq_x_f16): Likewise. > (__arm_vrndaq_x_f32): Likewise. > (__arm_vrndxq_x_f16): Likewise. > (__arm_vrndxq_x_f32): Likewise. > (__arm_vandq_x_f16): Likewise. > (__arm_vandq_x_f32): Likewise. > (__arm_vbicq_x_f16): Likewise. > (__arm_vbicq_x_f32): Likewise. > (__arm_vbrsrq_x_n_f16): Likewise. > (__arm_vbrsrq_x_n_f32): Likewise. > (__arm_veorq_x_f16): Likewise. > (__arm_veorq_x_f32): Likewise. > (__arm_vornq_x_f16): Likewise. > (__arm_vornq_x_f32): Likewise. > (__arm_vorrq_x_f16): Likewise. > (__arm_vorrq_x_f32): Likewise. > (__arm_vrev32q_x_f16): Likewise. > (__arm_vrev64q_x_f16): Likewise. > (__arm_vrev64q_x_f32): Likewise. > (vabdq_x): Define polymorphic variant. > (vabsq_x): Likewise. > (vaddq_x): Likewise. > (vandq_x): Likewise. > (vbicq_x): Likewise. > (vbrsrq_x): Likewise. > (vcaddq_rot270_x): Likewise. > (vcaddq_rot90_x): Likewise. > (vcmulq_rot180_x): Likewise. > (vcmulq_rot270_x): Likewise. > (vcmulq_x): Likewise. > (vcvtq_x): Likewise. > (vcvtq_x_n): Likewise. > (vcvtnq_m): Likewise. > (veorq_x): Likewise. > (vmaxnmq_x): Likewise. > (vminnmq_x): Likewise. > (vmulq_x): Likewise. > (vnegq_x): Likewise. > (vornq_x): Likewise. > (vorrq_x): Likewise. > (vrev32q_x): Likewise. > (vrev64q_x): Likewise. > (vrndaq_x): Likewise. > (vrndmq_x): Likewise. > (vrndnq_x): Likewise. > (vrndpq_x): Likewise. > (vrndq_x): Likewise. > (vrndxq_x): Likewise. > (vsubq_x): Likewise. > (vcmulq_rot90_x): Likewise. > (vadciq): Likewise. > (vclsq_x): Likewise. > (vclzq_x): Likewise. > (vhaddq_x): Likewise. > (vhcaddq_rot270_x): Likewise. > (vhcaddq_rot90_x): Likewise. > (vhsubq_x): Likewise. > (vmaxq_x): Likewise. > (vminq_x): Likewise. > (vmovlbq_x): Likewise. > (vmovltq_x): Likewise. > (vmulhq_x): Likewise. > (vmullbq_int_x): Likewise. > (vmullbq_poly_x): Likewise. > (vmulltq_int_x): Likewise. > (vmulltq_poly_x): Likewise. > (vmvnq_x): Likewise. > (vrev16q_x): Likewise. > (vrhaddq_x): Likewise. > (vrmulhq_x): Likewise. > (vrshlq_x): Likewise. > (vrshrq_x): Likewise. > (vshllbq_x): Likewise. > (vshlltq_x): Likewise. > (vshlq_x_n): Likewise. > (vshlq_x): Likewise. > (vdwdupq_x_u8): Likewise. > (vdwdupq_x_u16): Likewise. > (vdwdupq_x_u32): Likewise. > (viwdupq_x_u8): Likewise. > (viwdupq_x_u16): Likewise. > (viwdupq_x_u32): Likewise. > (vidupq_x_u8): Likewise. > (vddupq_x_u8): Likewise. > (vidupq_x_u16): Likewise. > (vddupq_x_u16): Likewise. > (vidupq_x_u32): Likewise. > (vddupq_x_u32): Likewise. > (vshrq_x): Likewise. > > gcc/testsuite/ChangeLog: > > 2020-03-20 Srinath Parvathaneni <srinath.parvathan...@arm.com> > > * gcc.target/arm/mve/intrinsics/vabdq_x_f16.c: New test. > * gcc.target/arm/mve/intrinsics/vabdq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabdq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vaddq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vandq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbicq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/veorq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vidupq_x_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/viwdupq_x_wb_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vminq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vornq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vorrq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshlq_x_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_s16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_s32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_s8.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_u16.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_u32.c: Likewise. > * gcc.target/arm/mve/intrinsics/vsubq_x_u8.c: Likewise.
