The following makes fold_neagte_const properly handle TREE_OVERFLOW as
sticky (even if present on POINTER_TYPE constants).
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2017-06-25 Richard Biener
PR middle-end/81505
* fold-const.c (fold_negate_const):
On Fri, Jul 21, 2017 at 7:40 PM, Bill Schmidt
wrote:
> Hi Richard,
>
> I would like to backport this fix to GCC 5, 6, and 7. All have passed
> regstrap on
> powerpc64le-linux-gnu (with the test case moved to gcc.dg/ubsan, of course).
> Is this ok?
Yes.
Richard.
> Thanks!
>
> -- Bill
>
>
>> On
On Fri, Jul 21, 2017 at 9:30 PM, Aldy Hernandez wrote:
> On Mon, Jul 17, 2017 at 6:23 AM, Richard Biener
> wrote:
>> On Mon, Jul 17, 2017 at 8:51 AM, Aldy Hernandez wrote:
>
>>> How does this look?
>>
>> It's a change that on its own doesn't look worthwhile to me.
>>
>> So please post the change
On Fri, Jul 21, 2017 at 8:24 PM, Andrew Pinski wrote:
> Hi,
> Due to the way bit-field access lower is done, we can get an
> unitialized memory load and this causes the unitialized warning to
> kick in.
> The case we have is:
> temp_1 = BIT_FIELD_REF
> temp_2 = BIT_INSERT
> BIT_FIELD_REF = temp_
> On Jul 20, 2017, at 4:12 PM, Maxim Kuvyrkov wrote:
>
>> On Jul 20, 2017, at 3:06 PM, Torsten Duwe wrote:
>>
>> On Thu, Jul 20, 2017 at 01:58:06PM +0300, Maxim Kuvyrkov wrote:
On Jul 17, 2017, at 3:10 PM, Torsten Duwe wrote:
What is the next step now? Is anybody going to commi
On Fri, Jul 21, 2017 at 4:15 PM, David Edelsohn wrote:
>> Nathan Sidwell writes:
>
>> Let's at least deprecate it. I attach a patch to do so. With the
>> patch, you'll get a note about dbx being deprecated whenever you use
>> stabs debugging on a system that prefers stabs (thus both -g and -
On Sun, Jul 23, 2017 at 5:10 AM, David Edelsohn wrote:
> dw2_asm_output_nstring() essentially inlines the version of
> OUTPUT_ASCII for the GNU Assembler ELF file format for the debug_asm
> case to append the comment and calls OUTPUT_ASCII when not debugging.
> The DWARF portion of the GCC testsui
On Mon, Jul 24, 2017 at 10:19 AM, Georg-Johann Lay wrote:
> Hi, as proposed in
>
> https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01294.html
>
> this patch does more asprintf -> xasprintf replacements.
>
> Bootstrapped + reg-tested on x86_64-linux.
>
> Ok for trunk?
Ok.
Thanks,
Richard.
> Johann
On Mon, Jul 24, 2017 at 10:43 AM, Bin Cheng wrote:
> Hi,
> This is a followup patch to PR81388's fix. According to Richi,
> POINTER_TYPE_OVERFLOW_UNDEFINED was added in -fstrict-overflow
> warning work. Given:
> A) strict-overflow was removed;
> B) memory object can not wrap in address space
On Mon, Jul 24, 2017 at 10:44 AM, Bin Cheng wrote:
> Hi,
> The test has negative step in memory access, thus can't be vectorized on
> target like sparc-sun-solaris2.12. This patch adds vect_perm requirement
> for it. Test result checked. Is it OK?
Ok.
> Thanks,
> bin
> gcc/testsuite/ChangeLo
Hi,
>> I think we can split this whenever we like, and
>> that there isn't any benefit in keeping the pair together?
Thanks for the review and your views.
The patch is modified as per your suggestion.
Please review the patch and let me know if its okay?
Bootstrapped and Regression done on AArc
On Tue, Jul 25, 2017 at 10:12:00AM +0300, Maxim Kuvyrkov wrote:
>
> I confirmed that bootstrap and reg test on x86_64-linux-gnu and
> aarch64-linux-gnu are OK.
Thanks a lot!
> Torsten, any update on which way you are going to handle copyright assignment
> -- apply for a new one or have one of
On Mon, 24 Jul 2017, Jeff Law wrote:
> As Uli noted, we should be using std::swap.
>
> Can you please repost ?
* domwalk.c (cmp_bb_postorder): Simplify.
(sort_bbs_postorder): New function. Use it...
(dom_walker::walk): ...here to optimize common cases.
---
gcc/domwalk.c
Hi,
On 24/07/17 21:48, Alexander Monakov wrote:
On Sat, 22 Jul 2017, Segher Boessenkool wrote:
On Sat, Jul 15, 2017 at 11:47:45PM +0300, Alexander Monakov wrote:
--- a/gcc/gimple-ssa-store-merging.c
+++ b/gcc/gimple-ssa-store-merging.c
@@ -516,12 +516,12 @@ sort_by_bitpos (const void *x, cons
On Tue, Jul 25, 2017 at 10:22 AM, Alexander Monakov wrote:
> On Mon, 24 Jul 2017, Jeff Law wrote:
>> As Uli noted, we should be using std::swap.
>>
>> Can you please repost ?
>
> * domwalk.c (cmp_bb_postorder): Simplify.
> (sort_bbs_postorder): New function. Use it...
> (d
On Tue, Jul 25, 2017 at 10:34 AM, Kyrill Tkachov
wrote:
> Hi,
>
> On 24/07/17 21:48, Alexander Monakov wrote:
>>
>> On Sat, 22 Jul 2017, Segher Boessenkool wrote:
>>
>>> On Sat, Jul 15, 2017 at 11:47:45PM +0300, Alexander Monakov wrote:
--- a/gcc/gimple-ssa-store-merging.c
+++ b/gcc
Hi!
As mentioned in the PR, the following testcases ICE if AVX512BW/VL is enabled,
but AVX512DQ is not. The problem is that for movti_internal we need to use
vpextrq or vpinsrq instructions to extract or insert the 64-bit reg from
above the lowest 64-bit and if it is in %xmm16+ register, we need
On Tue, 25 Jul 2017, Alexander Monakov wrote:
> --- a/gcc/domwalk.c
> +++ b/gcc/domwalk.c
> @@ -128,19 +128,46 @@ along with GCC; see the file COPYING3. If not see
> which is currently an abstraction over walking tree statements. Thus
> the dominator walker is currently only useful for
Hi!
I've noticed yesterday a -Wnarrowing warning in the Fortran FE that broke
my build (old configure, these days we use -Wno-narrowing, so don't see
that).
We are storing the mask into unsigned int field, and 1 << 31 is negative.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linu
On Tue, Jul 25, 2017 at 07:30:49AM +, Hurugalawadi, Naveen wrote:
> Hi,
>
> >> I think we can split this whenever we like, and
> >> that there isn't any benefit in keeping the pair together?
>
> Thanks for the review and your views.
Thanks for the updated patch, and sorry that I haven't been
Hi!
The following patch adjusts the vec_init and vec_extract optabs, so that
they don't have in the expander names just the vector mode, but also another
mode, for vec_extract the mode of the result and for vec_init the mode of
the elts of the vector passed as second operand.
Without this patch,
Hi,
recently I wondered why a snippet like the following is not being
if-converted at all on s390:
int foo (int *a, unsigned int n)
{
int min = 99;
int bla = 0;
for (int i = 0; i < n; i++)
{
if (a[i] < min)
{
min = a[i];
bla = 1;
}
}
Hi!
I'd like to ping 2 patches:
- UBSAN -fsanitize=pointer-overflow support
- http://gcc.gnu.org/ml/gcc-patches/2017-06/msg01365.html
- noipa attribute addition
http://gc
Ping.
On Fri, Jul 14, 2017 at 03:27:21PM +0200, Marek Polacek wrote:
> On Thu, Jul 13, 2017 at 04:59:20PM -0400, David Malcolm wrote:
> > On Thu, 2017-07-13 at 16:39 -0400, Eric Gallager wrote:
> > > On 7/13/17, David Malcolm wrote:
> > > > On Thu, 2017-07-13 at 18:33 +0200, Marek Polacek wrote:
https://gcc.gnu.org/r250495
Committed $subject as obvious.
Johann
gcc/
* config/avr/avr-log.c (avr_log_vadump) ['T']: Print NULL-TREE.
Index: config/avr/avr-log.c
===
--- config/avr/avr-log.c(revision 250494)
+++ c
I wrote:
Regression-testing as I write this. OK for trunk if it passes?
Regression test passed.
Regards
Thomas
PING^1
Jakub can you please take a look? I would like to have it in 7.2 if possible.
Thanks,
Martin
On 07/18/2017 10:38 AM, Martin Liška wrote:
> On 07/17/2017 03:15 PM, Michael Matz wrote:
>> Hello,
>>
>> On Mon, 17 Jul 2017, Martin Liška wrote:
>>
>>> which does all the stack preparation (incl
PING^2
On 07/11/2017 03:51 PM, Martin Liška wrote:
> PING^1
>
> Martin
>
> On 06/30/2017 10:47 AM, Martin Liška wrote:
>> Hello.
>>
>> Following patch does refactoring of make_resolver_func where ifunc
>> alias and resolver were probably confused.
>>
>> Patch can bootstrap on ppc64le-redhat-linu
Hi Jakub,
I've noticed yesterday a -Wnarrowing warning in the Fortran FE that broke
my build (old configure, these days we use -Wno-narrowing, so don't see
that).
We are storing the mask into unsigned int field, and 1 << 31 is negative.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i
Hi Richard,
(back from a few days away)
> On Jul 17, 2017, at 12:01 , Eric Botcazou wrote:
>
>> That's good news. Does that mean we'll be able to drop the old stuff
>> though? I'd really like to make progress towards removing the old ABI
>> support from GCC.
>
> Yes, I'd think so, but Olivie
The following fixes the issue that if the reduction stmt (the stmt
defining the backedge value of a loop PHI) is not in the loop
then this isn't a reduction thus we shouldn't continue analysis.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2017-07-25 Richard B
The following patch fixes the immediate use verifier error by
removing an artificial cap on the number of immediate uses (to
detect cycles). We'd run into problems sooner or later in immediate
uses iteration anyways.
This allows the testcase to compile. SLSR still goes crazy on this
testcase.
Hi!
On Mon, Jul 24, 2017 at 01:51:20PM -0700, Carl Love wrote:
> On Fri, 2017-07-14 at 15:58 -0500, Segher Boessenkool wrote:
> > On Fri, Jul 14, 2017 at 01:20:32PM -0700, Carl Love wrote:
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/powerpc/builtins-4-p9-runnable.c
> > > @@ -0,0 +1,95
On Fri, 21 Jul 2017, Tom de Vries wrote:
> On 07/21/2017 11:41 AM, Richard Biener wrote:
> > On Thu, 20 Jul 2017, Tom de Vries wrote:
> >
> > > On 07/20/2017 12:10 PM, Richard Biener wrote:
> > > > On Thu, 20 Jul 2017, Tom de Vries wrote:
> > > >
> > > > > Hi,
> > > > >
> > > > > this patch fix
On Mon, Jul 24, 2017 at 04:06:39PM -0600, Jeff Law wrote:
> > 2017-07-24 Segher Boessenkool
> >
> > gcc/testsuite/
> > PR rtl-optimization/81423
> > * gcc.c-torture/execute/pr81423.c: New testcase.
> I think int32plus just indicates ints are at least 32 bits. But a long
> or long long c
Rainer reports uint64_t clashes, so avoid it.
Tested on x86_64-unknown-linux-gnu, applied.
Richard.
2017-07-25 Richard Biener
PR tree-optimization/81410
* gcc.dg/vect/pr81410.c: Do not typedef uint64_t.
Index: gcc/testsuite/gcc.dg/vect/pr81410.c
On 24/07/17 09:50, Segher Boessenkool wrote:
On Wed, Jul 19, 2017 at 12:19:32AM -0600, Jeff Law wrote:
On 07/18/2017 01:36 PM, Segher Boessenkool wrote:
* simplify-rtx.c (simplify_truncation): Handle truncating an IOR
with a constant that is -1 in the truncated to mode.
OK. A
Status
==
It's time to do a GCC 7.2 release and thus please check if you have
backports for regression or wrong-code bugs pending. The plan is to
do GCC 7.2 RC1 mid next week and a release roughly a week after that.
Quality Data
Priority # Change from last report
-
Hi,
>> I haven't been clear in what I was asking for
Sorry. We understood right with the first comment but the second
part confused us a bit :).
>> Could you switch this back to an insn_and_split as it was in the previous
>> patch, and just drop the && reload_completed ?
Done.
Bootstrapped and
Backported to v7:
https://gcc.gnu.org/r250509
Johann
gcc/
Backport from 2017-05-06 trunk r247719.
PR rtl-optimization/75964
* simplify-rtx.c (simplify_const_relational_operation): Remove
invalid handling of comparisons of integer ABS.
gcc/testsuite/
Back
On Mon, Jul 24, 2017 at 4:27 PM, Bin.Cheng wrote:
> Ping^1.
Ok.
Thanks and sorry for the delay.
Richard.
> Thanks,
> bin
>
> On Mon, Jul 10, 2017 at 9:23 AM, Bin.Cheng wrote:
>> On Tue, Jul 4, 2017 at 1:29 PM, Richard Biener
>> wrote:
>>> On Tue, Jul 4, 2017 at 2:06 PM, Bin.Cheng wrote:
On Fri, Jul 21, 2017 at 10:33:12PM +0200, Jakub Jelinek wrote:
> Hi!
>
> DWARF5 introduced DW_AT_export_symbols that may be preset on
> DW_TAG_namespace or DW_TAG_{structure,union,class}_type to signalize
> inline or anonymous namespaces or anonymous structures/unions/classes.
>
> What we were em
Prominent LEON2 chips like the AT697E and AT697F do not properly support
the FSMULD instruction. LEON3 targets using the GRFPU-lite floating
point unit do not support the FSMULD in hardware. Disable this
instruction for for all LEON/LEON3 targets for simplicity.
This leads to a code size increas
On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote:
> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote:
>> Hi,
>> This is a followup patch better handling below case:
>> for (i = 0; i < n; i++)
>>{
>> a[i] = 1;
>> a[i+2] = 2;
>>}
>> Instead of generating roo
No need to use a dedicated variable if we can use RECORD_OR_UNION_TYPE_P
directly and only once.
Bootstrapped/regtested on x86_64-linux, applying to trunk.
2017-07-25 Marek Polacek
* c-decl.c (grokfield): Remove local variable.
diff --git gcc/c/c-decl.c gcc/c/c-decl.c
index 50da185e3
On Tue, Jul 11, 2017 at 4:35 PM, Martin Liška wrote:
> Hi.
>
> There's a small follow-up with remaining occurrences:
>
> 1) dwarf2out.c:
>
> 20213 origin_die = lookup_type_die (origin);
> 20214else if (TREE_CODE (origin) == BLOCK)
> 20215 origin_die = BLOCK_DIE (origin);
> 20216
...also backported to gcc-6-branch:
https://gcc.gnu.org/r250511
Johann
gcc/
Backport from 2017-05-06 trunk r247719.
PR rtl-optimization/75964
* simplify-rtx.c (simplify_const_relational_operation): Remove
invalid handling of comparisons of integer ABS.
gcc/testsuite/
B
On Sun, Jul 23, 2017 at 11:22:14PM +0200, Volker Reichelt wrote:
[...]
Not sure if the warning is too useful, but in any case...
> + /* Emit warning. */
> + gcc_rich_location richloc (token->location);
> + richloc.add_fixit_remove ();
> + if (colon_token->type == CPP_COLON)
> +richloc.ad
On Tue, Jul 25, 2017 at 01:45:31PM +0200, Marek Polacek wrote:
> > This patch doesn't do anything about anon struct/union/class, I've tried
> > to handle it, the problem is that ANON_AGGR_TYPE_P flag is set too late,
> > after the debug hook adds the type DIE. Any thoughts on how to handle that?
>
James Greenhalgh wrote:
>
> OK. Either like this, or with the conditions swapped around as Yvan
> suggested to make backporting easier.
I swapped the conditions around, not sure whether it helps...
Also I needed an additional scan-assembler, this was committed to
trunk and GCC7:
diff --git a/gcc/
On Thu, Jul 20, 2017 at 08:22:59PM +0200, Richard Biener wrote:
> No, we shouldn't. Maybe trapping ops shouldn't be marked TREE_CONSTANT?
> (Make sure to test with Ada...)
That works for both testcases, but I can't say I really like the idea of
modifying build2... but it's where the TREE_CONSTANT
Add 64-bit support for RTEMS using the ELFv2 ABI with 64-bit long
double.
gcc/
* config.gcc (powerpc-*-rtems*): Remove rs6000/eabi.h. Add
rs6000/biarch64.h.
* config/rs6000/rtems.h (ASM_DECLARE_FUNCTION_SIZE): New macro.
(ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
Hi Mike,
On Mon, Jul 24, 2017 at 07:40:26PM -0400, Michael Meissner wrote:
> This patch eliminates the TARGET_UPPER_REGS_{DF,SF} macros. The next patch
> will eliminate TARGET_UPPER_REGS_DI.
>
> I had to tune the optimization that turned load into FPR register and then
> move
> to Altivec regis
On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener
wrote:
> On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote:
>> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote:
>>> Hi,
>>> This is a followup patch better handling below case:
>>> for (i = 0; i < n; i++)
>>>{
>>> a[i] = 1;
On Tue, Jul 18, 2017 at 10:38:50AM +0200, Martin Liška wrote:
> 2017-06-27 Martin Liska
>
> PR sanitize/81186
8 spaces instead of tab?
> * function.c (expand_function_start): Set parm_birth_insn after
> static chain is initialized.
I don't like this description, after all
On 2017/6/29 6:31 AM, Cesar Philippidis wrote:
> On 06/27/2017 03:56 AM, Chung-Lin Tang wrote:
>> On 2017/6/27 6:45 AM, Cesar Philippidis wrote:
(1) Instead of essentially implementing the entire OpenACC async support
inside the plugin, we now use an opaque 'goacc_asyncqueue' implemented
On Tue, Jul 25, 2017 at 10:50 AM, Jakub Jelinek wrote:
> Hi!
>
> As mentioned in the PR, the following testcases ICE if AVX512BW/VL is enabled,
> but AVX512DQ is not. The problem is that for movti_internal we need to use
> vpextrq or vpinsrq instructions to extract or insert the 64-bit reg from
>
On Tue, Jul 25, 2017 at 1:13 PM, Wilco Dijkstra wrote:
> James Greenhalgh wrote:
>>
>> OK. Either like this, or with the conditions swapped around as Yvan
>> suggested to make backporting easier.
>
> I swapped the conditions around, not sure whether it helps...
> Also I needed an additional scan-a
> Prominent LEON2 chips like the AT697E and AT697F do not properly support
> the FSMULD instruction. LEON3 targets using the GRFPU-lite floating
> point unit do not support the FSMULD in hardware. Disable this
> instruction for for all LEON/LEON3 targets for simplicity.
And penalize everyone els
On Tue, Jul 25, 2017 at 2:38 PM, Bin.Cheng wrote:
> On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener
> wrote:
>> On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote:
>>> On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote:
Hi,
This is a followup patch better handling below case:
On 25/07/17 14:59, Eric Botcazou wrote:
Prominent LEON2 chips like the AT697E and AT697F do not properly support
the FSMULD instruction. LEON3 targets using the GRFPU-lite floating
point unit do not support the FSMULD in hardware. Disable this
instruction for for all LEON/LEON3 targets for sim
Hi All,
The new ARM options parser generates from the following entry
begin cpu cortex-a55
...
architecture armv8.2-a+fp16+foo
option crypto add FP_ARMv8 CRYPTO
option dotprod add FP_ARMv8 FOO
option nofp remove ALL_FP
...
end cpu cortex-a55
A list of all feature bits that using -mcpu=cort
Ping.
On 2017/6/22 3:18 PM, Chung-Lin Tang wrote:
> On 2017/6/14 12:00 AM, Jakub Jelinek wrote:
>> I don't see sufficient information on what you want to change and why
>> and whether the changes are backwards compatible (say will a valid
>> OpenACC 2.0 program compiled by GCC 7 work against both
On Tue, Jul 25, 2017 at 10:12:00AM +0300, Maxim Kuvyrkov wrote:
> >
> > SuSe/Novell choose to do its assignments per engineer, not for the whole
> > company, so I don't think you are covered as is.
>
> Torsten, any update on which way you are going to handle copyright assignment
> -- apply for
On Tue, Jul 25, 2017 at 2:19 PM, Marek Polacek wrote:
> On Thu, Jul 20, 2017 at 08:22:59PM +0200, Richard Biener wrote:
>> No, we shouldn't. Maybe trapping ops shouldn't be marked TREE_CONSTANT?
>> (Make sure to test with Ada...)
>
> That works for both testcases, but I can't say I really like th
On Tue, Jul 25, 2017 at 07:34:46AM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Mon, Jul 24, 2017 at 07:40:26PM -0400, Michael Meissner wrote:
> > This patch eliminates the TARGET_UPPER_REGS_{DF,SF} macros. The next patch
> > will eliminate TARGET_UPPER_REGS_DI.
> >
> > I had to tune the o
On Tue, Jul 25, 2017 at 1:57 PM, Richard Biener
wrote:
> On Tue, Jul 25, 2017 at 2:38 PM, Bin.Cheng wrote:
>> On Tue, Jul 25, 2017 at 12:48 PM, Richard Biener
>> wrote:
>>> On Mon, Jul 10, 2017 at 10:24 AM, Bin.Cheng wrote:
On Tue, Jun 27, 2017 at 11:49 AM, Bin Cheng wrote:
> Hi,
On 7/25/17 1:59 PM, Tamar Christina wrote:
Hi All,
The new ARM options parser generates from the following entry
begin cpu cortex-a55
...
architecture armv8.2-a+fp16+foo
option crypto add FP_ARMv8 CRYPTO
option dotprod add FP_ARMv8 FOO
option nofp remove ALL_FP
...
end cpu cortex-a5
Ramana Radhakrishnan
>
> BZ suggests that this affects GCC 6 but GCC 7 is fixed ? Should there
> be a backport to GCC 6 as well ?
>
> Can you please keep BZ up to date please ?
GCC7 was affected as well, the example in PR79041 didn't trigger in GCC7,
my patch has a better example that does show t
This patch eliminates TARGET_UPPER_REGS_DI. I deleted the poison attribute in
patch #1. I will combine the ChangeLog and submit this patch and the previous
patch together if approved.
It bootstraps and has no regressions on big endian power7 and little endian
power8. Can I install this patch on
This fixes an oversight in an earlier patch of mine (SLP of inductions).
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2017-07-25 Richard Biener
PR tree-optimization/81529
* tree-vect-stmts.c (process_use): Disregard live induction PHIs
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2017-07-25 Richard Biener
PR tree-optimization/81455
* tree-ssa-loop-unswitch.c (find_loop_guard): Make sure to
not walk in cycles when looking for guards.
* gcc.dg/pr81455.c: New testcase
> Eric, any comments?
No objection for the build2_stat hunk, I think it's in keeping with the Ada
semantics. But the tree_could_trap_p hunk is certainly an abomination...
> We could also avoid tree_could_trap_p by special-casing only
> *_DIV_EXPR and *_MOD_EXPR
> with integer zero 2nd operand e
On 25/07/17 14:59, Sebastian Huber wrote:
On 25/07/17 14:59, Eric Botcazou wrote:
Prominent LEON2 chips like the AT697E and AT697F do not properly
support
the FSMULD instruction. LEON3 targets using the GRFPU-lite floating
point unit do not support the FSMULD in hardware. Disable this
instr
> Yes, everyone using LEON/LEON3 will no longer benefit from the FSMULD
> after this patch. This was discussed with Gaisler. We have to make a
> trade-off between correctness, performance and the number of GCC options.
IMO we shouldn't introduce regressions like this, i.e. people should never be
> What is your opinion with respect to a -mno-fsmuld option or something
> similar?
Far better in my opinion (at least for LEON3).
--
Eric Botcazou
On Tue, Jul 25, 2017 at 3:30 PM, Eric Botcazou wrote:
>> Eric, any comments?
>
> No objection for the build2_stat hunk, I think it's in keeping with the Ada
> semantics. But the tree_could_trap_p hunk is certainly an abomination...
>
>> We could also avoid tree_could_trap_p by special-casing only
On Fri, Jul 14, 2017 at 4:46 AM, H.J. Lu wrote:
> On Fri, Jul 7, 2017 at 5:56 PM, H.J. Lu wrote:
>> On Fri, Jul 07, 2017 at 09:58:42AM -0700, H.J. Lu wrote:
>>> On Fri, Dec 20, 2013 at 8:06 AM, Jakub Jelinek wrote:
>>> > Hi!
>>> >
>>> > Honza recently changed the i?86 backend, so that it often d
This patch makes some changes to the frame layout in order to simplify
stack probing. We want to use the save of LR as a probe in any non-leaf
function. With shrinkwrapping we may only save LR before a call, so it
is useful to define a fixed location in the callee-saves. So force LR at
the bottom
On 07/25/2017 05:51 AM, Chung-Lin Tang wrote:
> On 2017/6/29 6:31 AM, Cesar Philippidis wrote:
> Attached is the updated version of the patch, re-tested.
>
> Thomas, do you need some more time to look over it? Or should I commit it
> first?
I'm not too concerned about the profiling stuff becaus
On Mon, Jul 17, 2017 at 9:29 AM, Yuri Gribov wrote:
> Hi all,
>
> This is an updated version of patch in
> https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00409.html . It prevents
> optimization in presense of sNaNs (and qNaNs when comparison operator
> is > >= < <=) to preserve FP exceptions.
>
> N
On 25/07/17 15:42, Eric Botcazou wrote:
What is your opinion with respect to a -mno-fsmuld option or something
similar?
Far better in my opinion (at least for LEON3).
How should I add this option? For example:
diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index ae63d2
So a new pattern came up assigning to the iterator var of (for var (...)).
Disallow that, likewise protect 'type' (another commonly refered
identifier).
Bootstrap / regtest pending on x86_64-unknown-linux-gnu.
Richard.
2017-07-25 Richard Biener
* genmatch.c (dt_simplify::gen): Make
On Jul 25 2017, Wilco Dijkstra wrote:
> diff --git a/gcc/testsuite/gcc.target/aarch64/pr79041-2.c
> b/gcc/testsuite/gcc.target/aarch64/pr79041-2.c
> new file mode 100644
> index
> ..cd34fbab85a92d00cba7091d4146deaaf3a862a9
> --- /dev/null
> +++ b/gcc/test
On Fri, Jul 21, 2017 at 5:55 PM, Alexander Monakov wrote:
> Previous revision here:
> https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00889.html
>
> Reassociate (X * CST) * Y to (X * Y) * CST, this pushes constants in
> multiplication chains to outermost factors, where they can be combined.
>
> Cha
On Fri, Jul 21, 2017 at 5:55 PM, Alexander Monakov wrote:
> Previous revision here:
> https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01090.html
>
> Reassociate X * CST1 * CST2 to X * (CST1 * CST2).
>
> Changed in this revision:
> - remove the check for @2 being 0 or -1
Ok.
Thanks,
Richard.
>
On 25/07/17 16:12, Sebastian Huber wrote:
On 25/07/17 15:42, Eric Botcazou wrote:
What is your opinion with respect to a -mno-fsmuld option or something
similar?
Far better in my opinion (at least for LEON3).
How should I add this option? For example:
diff --git a/gcc/config/sparc/sparc.o
On Mon, Jul 24, 2017 at 4:31 PM, Marc Glisse wrote:
> On Mon, 24 Jul 2017, Bin.Cheng wrote:
>
>> On Mon, Jul 24, 2017 at 2:59 PM, Marc Glisse wrote:
>>>
>>> On Mon, 24 Jul 2017, Bin.Cheng wrote:
>>>
But since definition of _197 isn't in current stmt sequence, call "o31
= do_valueize (va
Backported from trunk as:
https://gcc.gnu.org/r250522
Johann
gcc/
Backport from 2017-07-12 trunk r250151.
PR target/81407
* config/avr/avr.c (avr_encode_section_info)
[progmem && !TREE_READONLY]: Error if progmem object needs
constructing.
Index: config/
On 25/07/17 15:42, Eric Botcazou wrote:
What is your opinion with respect to a -mno-fsmuld option or something
similar?
Far better in my opinion (at least for LEON3).
Attached is a variant with this option. It touches a lot more files.
--
Sebastian Huber, embedded brains GmbH
Address : Dor
The attached fix to the Ada front-end introduces a regression in the ACATS
testsuite for cb4009a. The backtrace is:
#0 operation_could_trap_helper_p(tree_code, bool, bool, bool, bool,
tree_node*, bool*) () at /home/eric/gnat/gnat-head/src/gcc/tree-eh.c:2439
#1 0x012946d7 in stmt_could
2017-07-25 Uros Bizjak
* config/i386/i386.c (ix86_decompose_address): Do not check for
register RTX when looking at index_reg or base_reg.
* config/i386/i386.h (INCOMING_RETURN_ADDR_RTX): Use stack_pointer_rtx.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Commit
How hard would it be to also suppress the warning for benign
comparisons like C++ manages to do? E.g., C warns on this
code even though there's no problem with it:
int foo (unsigned int b)
{
const int a = 1;
return (a < b);
}
Martin
On 07/25/2017 03:45 AM, Marek Polacek wrote:
P
On 07/25/2017 03:12 AM, Richard Biener wrote:
On Fri, Jul 21, 2017 at 9:30 PM, Aldy Hernandez wrote:
On Mon, Jul 17, 2017 at 6:23 AM, Richard Biener
wrote:
On Mon, Jul 17, 2017 at 8:51 AM, Aldy Hernandez wrote:
How does this look?
It's a change that on its own doesn't look worthwhile to me
Hi Bill,
On Sun, Jul 23, 2017 at 12:07:37PM -0500, Bill Schmidt wrote:
> Alan added code to have GCC align the .toc section in GCC 7, aligning to
> four bytes for 32-bit mode, and 8 bytes for 64-bit mode. This is normally
> unnecessary since alignment of the .toc has historically been handled by
On Tue, Jul 25, 2017 at 3:52 PM, H.J. Lu wrote:
> On Fri, Jul 14, 2017 at 4:46 AM, H.J. Lu wrote:
>> On Fri, Jul 7, 2017 at 5:56 PM, H.J. Lu wrote:
>>> On Fri, Jul 07, 2017 at 09:58:42AM -0700, H.J. Lu wrote:
On Fri, Dec 20, 2013 at 8:06 AM, Jakub Jelinek wrote:
> Hi!
>
> Ho
On 2017/7/25 10:09 PM, Cesar Philippidis wrote:
> On 07/25/2017 05:51 AM, Chung-Lin Tang wrote:
>> On 2017/6/29 6:31 AM, Cesar Philippidis wrote:
>
>> Attached is the updated version of the patch, re-tested.
>>
>> Thomas, do you need some more time to look over it? Or should I commit it
>> first?
On Fri, 2017-07-14 at 15:27 +0200, Marek Polacek wrote:
> On Thu, Jul 13, 2017 at 04:59:20PM -0400, David Malcolm wrote:
> > On Thu, 2017-07-13 at 16:39 -0400, Eric Gallager wrote:
> > > On 7/13/17, David Malcolm wrote:
> > > > On Thu, 2017-07-13 at 18:33 +0200, Marek Polacek wrote:
> > > > > A ti
Segher Boessenkool writes:
> Hi Richard,
>
> On Wed, Jul 12, 2017 at 05:33:42PM +0100, Richard Sandiford wrote:
>> The little-endian VSX code uses rotates to swap the two 64-bit halves of
>> 128-bit scalar modes. This is fine for TImode and V1TImode, but it
>> isn't really valid to use RTL rotate
PR c/81544 complaints that we aren't detecting clashing noreturn /
warn_unused_result attributes so this patch adds that checking. Martin
plans to do more systematic checking in this area but meanwhile we
might want to go with this.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2017-07-2
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