Re: [PATCH] Fix ICE during strstr gimple folding (PR middle-end/81207)

On Tue, 27 Jun 2017, Jakub Jelinek wrote: > Hi! > > replace_call_with_call_and_fold has code to copy over vdef/vuse from the > old call to the new one, so that we don't have to update virtual ssa, > but it is conditioned on gimple_vdef being non-NULL and SSA_NAME. > If we have a pure function, gi

Re: [PATCH] Fix another ubsan_encode_value related ICE (PR sanitizer/81209)

On Tue, 27 Jun 2017, Jakub Jelinek wrote: > Hi! > > Apparently the pr81125.C testcase ICEs on Darwin, but not on Linux, > the difference is that on Darwin ctors/dtors aren't deduplicated due to > lack of flexibility of the object format. I've managed to reproduce > also on Linux with a virtual b

Re: [PATCH 2/3] Simplify wrapped binops

Ping.

Re: Backports to 6 (and 7, and 5)

On Mon, 26 Jun 2017, Segher Boessenkool wrote: > Hi! > > I'd like to backport the following patches to 7, 6, and where > applicable 5 (some are in 7 already). > > > https://gcc.gnu.org/ml/gcc-patches/2017-05/msg02107.html > Fix expand_builtin_atomic_fetch_op for pre-op (PR80902) > > https://gc

[PATCH] Use secure_getenv for GOMP_DEBUG

[ was: Re: [PATCH, 2/4] Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS} in libgomp nvptx plugin ] On 06/26/2017 05:29 PM, Jakub Jelinek wrote: On Mon, Jun 26, 2017 at 03:26:57PM +, Joseph Myers wrote: On Mon, 26 Jun 2017, Tom de Vries wrote: 2. Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS}

[committed] Fix thinko in -Wmultistatement-macros (PR bootstrap/81216)

A missing initialization broke bootstrap pretty much everywhere except x86_64-linux, which is what the -Wmultistatement-macros patch was tested on. Sorry for the breakage :(. Bootstrapped/regtested on x86_64-linux/ppc64-linux, applying to trunk. 2017-06-27 Marek Polacek PR bootstrap/

Re: [PATCH] Use secure_getenv for GOMP_DEBUG

On Tue, Jun 27, 2017 at 09:17:57AM +0200, Tom de Vries wrote: > This patch uses secure_getenv for GOMP_DEBUG. > > It factors out the secure_getenv code from plugin-hsa.c into > libgomp/secure_getenv.h, and reuses it in env.c. > > I've added _GNU_SOURCE before the libgomp.h include in env.c to mak

[PATCH, go]: S/390: Fix generation of PtraceRegs

Hi, go bootstrap fails on s390x starting with r249472. With including the ptrace header the s390 special code in mksysinfo.sh isn't used anymore: if test "$regs" = ""; then # s390 regs=`grep '^type __user_regs_struct struct' gen-sysinfo.go || true` if test "$regs" != ""; then # Substru

Re: [AARCH64] Disable pc relative literal load irrespective of TARGET_FIX_ERR_A53_84341

On 27/06/17 02:20, Kugan Vivekanandarajah wrote: https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00614.html added this workaround to get kernel building with when TARGET_FIX_ERR_A53_843419 is enabled. This was added to support building kernel loadable modules. In kernel, when CONFIG_ARM64_ERRATUM

Re: PR81136: ICE from inconsistent DR_MISALIGNMENTs

On Mon, Jun 26, 2017 at 1:50 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Mon, Jun 26, 2017 at 1:14 PM, Richard Sandiford >> wrote: >>> Richard Biener writes: On Fri, Jun 23, 2017 at 2:05 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Thu, Jun 22,

Re: [PATCH] Fold (a > 0 ? 1.0 : -1.0) into copysign (1.0, a) and a * copysign (1.0, a) into abs(a)

On Sun, Jun 25, 2017 at 11:28 PM, Andrew Pinski wrote: > On Sun, Jun 25, 2017 at 11:18 AM, Andrew Pinski wrote: >> On Sun, Jun 25, 2017 at 1:28 AM, Marc Glisse wrote: >>> +(for cmp (gt ge lt le) >>> + outp (convert convert negate negate) >>> + outn (negate negate convert convert) >>> + /

common VxWorks configuration bits for 64bits support

Hello, Preparing the introduction of an x86_64-vxworks7 port, this adjusts the common VxWorks support files to accommodate 64bit ABIs. This passes lots of tests in our current gcc-6 based production compilers for C and Ada, I checked that a toolchain+libgcc build passes on mainline and this is pa

Re: [PATCH] Fix some narrowing conversion issues

On Tue, Jun 27, 2017 at 7:48 AM, Jakub Jelinek wrote: > Hi! > > We build gcc with -Wno-narrowing, for some reason I ended up with old > Makefile without that and discovered a couple of -Wnarrowing errors. > > This patch fixes them. Bootstrapped/regtested on x86_64-linux (i686-linux > fails to boo

RE: [PING^3][PATCH][Aarch64] Add support for overflow add and sub operation

Ping ^3. Updated patch posted here: https://gcc.gnu.org/ml/gcc-patches/2017-05/msg01615.html

Re: [PATCH] [SPARC] Add a workaround for the LEON3FT store-store errata

On 2017-06-26 09:21, Eric Botcazou wrote: Yes, modulo the config/sparc/sparc-c.c hunk, what is it used for? It defines __FIX_B2BST when the back-to-back store fix is enabled. This makes it easy to only add the workaround NOPs to inline assembly (and assembly files that uses the GCC preproce

[PATCH-v3] [SPARC] Add a workaround for the LEON3FT store-store errata

This patch adds a workaround to the Sparc backend for the LEON3FT store-store errata. It is enabled when using the -mfix-ut699, -mfix-ut700, or -mfix-gr712rc flag. The workaround inserts NOP instructions to prevent the following two instruction sequences from being generated: std -> stb/sth/st/st

improve support for vxworks TLS, available for RTPs on VX7

Hello, VxWorks 7 features TLS support for RTPs. This patch adjusts the VxWorks configuration to leverage this. I checked that a toolchain+libgcc build passes on mainline and this is passing ACATS on a gcc-7 based development port in-house. With Kind Regards, Olivier 2017-06-27 Jerome Lambourg

[PATCH, 5/4] Handle GOMP_OPENACC_NVPTX_PTXRW in libgomp nvptx plugin

[ was: Re: [PATCH, 0/4] Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS,JIT} in libgomp nvptx plugin ] On 06/26/2017 01:24 PM, Tom de Vries wrote: Hi, I've written a patch series to facilitate debugging libgomp openacc testcase failures on the nvptx accelerator. When running an openacc test-c

Re: [PATCH][AArch64][GCC 6] PR target/79041: Correct -mpc-relative-literal-loads logic in aarch64_classify_symbol

Hi, On 22 June 2017 at 20:42, Yvan Roux wrote: > Hi all, > > On 16 January 2017 at 16:34, Kyrill Tkachov > wrote: >> >> On 13/01/17 16:35, James Greenhalgh wrote: >>> >>> On Wed, Jan 11, 2017 at 04:32:45PM +, Kyrill Tkachov wrote: Hi all, In this PR we generated ADRP/ADD

[patch,avr][Ping #2] PR81075: Move jump-tables out of .text

Ping #2 http://gcc.gnu.org/ml/gcc-patches/2017-06/msg01029.html On 14.06.2017 14:03, Georg-Johann Lay wrote: Hi, Since PR71151 we have jump-tables in .text so that branches crossing the tables have longer offsets that needed. This moves jump-tables out of test again, but not into .progmem.gcc

Re: [PATCH] Fix PR81175, make gather builtins pure

On Fri, Jun 23, 2017 at 02:54:35PM +0200, Richard Biener wrote: > 2017-06-23 Richard Biener > > PR target/81175 > * config/i386/i386.c (struct builtin_isa): Add pure_p member. > (def_builtin2): Initialize pure_p. > (ix86_add_new_builtins): Honor pure_p. > (def_buil

Re: [PATCH] Fix PR81175, make gather builtins pure

On Tue, Jun 27, 2017 at 12:02 PM, Jakub Jelinek wrote: > On Fri, Jun 23, 2017 at 02:54:35PM +0200, Richard Biener wrote: >> 2017-06-23 Richard Biener >> >> PR target/81175 >> * config/i386/i386.c (struct builtin_isa): Add pure_p member. >> (def_builtin2): Initialize pure_p. >>

Re: Avoid generating useless range info

On Fri, Jun 23, 2017 at 6:24 AM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 10:59 AM, Aldy Hernandez wrote: >> >> >> On Fri, Jun 16, 2017 at 4:00 AM, Richard Biener >> wrote: >>> >>> On Wed, Jun 14, 2017 at 6:41 PM, Aldy Hernandez wrote: >>> > Hi! >>> > >>> > As discovered in my range clas

Re: [PATCH] Fix PR81175, make gather builtins pure

On Tue, Jun 27, 2017 at 12:08:59PM +0200, Uros Bizjak wrote: > > Ok for trunk if it passes bootstrap/regtest? > > > > 2017-06-27 Jakub Jelinek > > > > PR target/81175 > > * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use def_builtin > > rather than def_builtin_pure f

Re: Avoid generating useless range info

On Tue, Jun 27, 2017 at 06:26:46AM -0400, Aldy Hernandez wrote: > How about this? @@ -360,6 +363,22 @@ set_range_info (tree name, enum value_range_type range_type, } } +/* Store range information RANGE_TYPE, MIN, and MAX to tree ssa_name + NAME while making sure we don't store useless r

Re: [PATCH] Fix PR81175, make gather builtins pure

On Tue, 27 Jun 2017, Jakub Jelinek wrote: > On Fri, Jun 23, 2017 at 02:54:35PM +0200, Richard Biener wrote: > > 2017-06-23 Richard Biener > > > > PR target/81175 > > * config/i386/i386.c (struct builtin_isa): Add pure_p member. > > (def_builtin2): Initialize pure_p. > > (ix86_a

[PATCH GCC][2/4]Remove interface initialize_root in predcom

Hi, This simple patch removes interface initialize_root. It's simple enough and called only once. Bootstrap(O2/O3) in patch series on x86_64 and AArch64. Is it OK? Thanks, bin 2017-06-21 Bin Cheng * tree-predcom.c (initialize_root): Delete. (execute_pred_commoning_chain): In

[PATCH GCC][3/4]Generalize dead store elimination (or store motion) across loop iterations in predcom

Hi, For the moment, tree-predcom.c only supports invariant/load-loads/store-loads chains. This patch generalizes dead store elimination (or store motion) across loop iterations in predictive commoning pass by supporting store-store chain. As comment in the patch: Apart from predictive commo

[PATCH GCC][1/4]Extend interface ref_at_iteration to compute ref @ (NITERS + ITERS)-th iteration

Hi, This is a simple patch extending interface ref_at_iteration in order to compute memory refernce at (NITERS + ITERS)-th iteration. This is for following predictive commoning pass enhancement in which we need to compute reference after (NITERS) loop at ITERS shifted iterations. Bootstrap(O2/O3

[PATCH GCC][4/4]Better handle store-stores chain if eliminated stores only store loop invariant

Hi, This is a followup patch better handling below case: for (i = 0; i < n; i++) { a[i] = 1; a[i+2] = 2; } Instead of generating root variables by loading from memory and propagating with PHI nodes, like: t0 = a[0]; t1 = a[1]; for (i = 0; i < n;

Re: [PATCH GCC][1/4]Extend interface ref_at_iteration to compute ref @ (NITERS + ITERS)-th iteration

On Tue, Jun 27, 2017 at 12:48 PM, Bin Cheng wrote: > Hi, > This is a simple patch extending interface ref_at_iteration in order to > compute memory > refernce at (NITERS + ITERS)-th iteration. This is for following predictive > commoning > pass enhancement in which we need to compute reference

Re: [PATCH][AArch64][GCC 6] PR target/79041: Correct -mpc-relative-literal-loads logic in aarch64_classify_symbol

Hi Yvan, > Here is the backport of Wilco's patch (r237607) along with Kyrill's > one (r244643, which removed the remaining occurences of > aarch64_nopcrelative_literal_loads).  To fix the issue the original > patch has to be modified, to keep aarch64_pcrelative_literal_loads > test for large model

Re: [PATCH GCC][2/4]Remove interface initialize_root in predcom

On Tue, Jun 27, 2017 at 12:48 PM, Bin Cheng wrote: > Hi, > This simple patch removes interface initialize_root. It's simple enough and > called only once. > Bootstrap(O2/O3) in patch series on x86_64 and AArch64. Is it OK? Ok. > Thanks, > bin > 2017-06-21 Bin Cheng > > * tree-predc

Re: [gomp4] OpenACC async re-work

On 2017/6/27 6:45 AM, Cesar Philippidis wrote: >> (1) Instead of essentially implementing the entire OpenACC async support >> inside the plugin, we now use an opaque 'goacc_asyncqueue' implemented >> by the plugin, along with core 'test', 'synchronize', 'serialize', etc. >> plugin functions. Most o

Re: [PATCH] Use secure_getenv for GOMP_DEBUG

On 06/27/2017 09:38 AM, Jakub Jelinek wrote: On Tue, Jun 27, 2017 at 09:17:57AM +0200, Tom de Vries wrote: This patch uses secure_getenv for GOMP_DEBUG. It factors out the secure_getenv code from plugin-hsa.c into libgomp/secure_getenv.h, and reuses it in env.c. I've added _GNU_SOURCE before t

Re: [PATCH][AArch64][GCC 6] PR target/79041: Correct -mpc-relative-literal-loads logic in aarch64_classify_symbol

Hi Wilco On 27 June 2017 at 12:53, Wilco Dijkstra wrote: > Hi Yvan, > >> Here is the backport of Wilco's patch (r237607) along with Kyrill's >> one (r244643, which removed the remaining occurences of >> aarch64_nopcrelative_literal_loads). To fix the issue the original >> patch has to be modifie

Re: [PATCH] Use secure_getenv for GOMP_DEBUG

On Tue, Jun 27, 2017 at 01:10:19PM +0200, Tom de Vries wrote: > +/* Secure getenv() which returns NULL if running as SUID/SGID. */ > +#ifndef HAVE_SECURE_GETENV > +#if defined (HAVE_UNISTD_H) && defined(HAVE_GETUID) && defined(HAVE_GETEUID) > \ > + && defined(HAVE_GETGID) && defined(HAVE_GETEGID

[PATCH] Fix -fsanitize=null ICE (PR sanitizer/81223)

We were crashing because a WITH_SIZE_EXPR had gotten to instrument_null, for which get_base_address returns NULL, but we weren't prepared for that. Bootstrapped/regtested on x86_64-linux, applying to trunk. 2017-06-27 Marek Polacek PR sanitizer/81223 * ubsan.c (instrument_null

Re: [PATCH 2/3] Simplify wrapped binops

On Wed, Jun 21, 2017 at 1:44 PM, Robin Dapp wrote: >> use INTEGRAL_TYPE_P. > > Done. > >> but you do not actually _use_ vr_outer. Do you think that if >> vr_outer is a VR_RANGE then the outer operation may not >> possibly have wrapped? That's a false conclusion. > > These were remains of a previ

adjust libgcc build support for VxWorks to VxWorks 7

Hello, This replicates for VxWorks 7 the "trick" used to let libgcc build for VxWorks in absence of fixincludes, namely the last piece libgcc/config/t-vxworks: ... # This ensures that the correct target headers are used; some # VxWorks system headers have names that collide with GCC's # internal

[Doc, AArch64] Fix/Update AArch64 options.

Hi, I just noticed that some AArch64 options (-mpc-relative-literal-loads, -msign-return-address=scope and -moverride=string) are missing in the option summary part of the manual: https://gcc.gnu.org/onlinedocs/gcc/Option-Summary.html#Option-Summary and that the "-no" version of -mpc-relative-li

Re: [PATCH, 2/4] Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS} in libgomp nvptx plugin

On 06/26/2017 05:29 PM, Jakub Jelinek wrote: On Mon, Jun 26, 2017 at 03:26:57PM +, Joseph Myers wrote: On Mon, 26 Jun 2017, Tom de Vries wrote: 2. Handle GOMP_OPENACC_NVPTX_{DISASM,SAVE_TEMPS} in libgomp nvptx plugin This patch adds handling of: - GOMP_OPENACC_NVPTX_SAVE_TEMPS=[01], and

Re: [PATCH 2/2] C++: bulletproof the %H and %I format codes (PR c++/81167)

On 06/22/2017 08:20 PM, David Malcolm wrote: PR c++/81167 reports a case where a NULL is passed to one of these %qH, and it turns out that we now ICE for this case (with a gcc_assert) whereas previously we printed a '' for the type > This patch slightly reworks the %H and %I-handling code so tha

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

On Fri, Jun 23, 2017 at 12:30 PM, Bin.Cheng wrote: > On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote: >> On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote: >>> Hi, >>> This is the main patch rewriting loop distribution in order to handle hmmer. >>> It improves loop distribution by versioning lo

[PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

Hello. Currently ifunc is interpreted as normal alias by IPA optimizations. That's problematic as should not consider ifunc alias as candidate for inlining, or redirection. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. And survives MVC tests on x86_64-linux-gnu. Rea

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng wrote: > On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote: >> Hi, >> I was asked by upstream to split the loop distribution patch into small ones. >> It is hard because data structure and algorithm are closely coupled together. >> Anyway, this is the pa

[PATCH] Move static chain and non-local goto init after NOTE_INSN_FUNCTION_BEG (PR sanitize/81186).

Hi. Following bug was for me very educative. I learned that we support non-local gotos that can be combined with nested functions. Real fun :) Well, the problem is that both cfun->nonlocal_goto_save_area and cfun->static_chain_decl (emitted in expand_function_start) are put before NOTE_INSN_FUN

x86-vxworks7 and x86_64-vxworks7 support, "config" files

Hello, The "config" files bits for the x86 families of targets for which VxWorks 7 support is being introduced. Just accept the triplets on the libgcc end and handle the common need of x86-64.h for x86_64 on the gcc front. Tested together with the previous patches of the vxworks7 series. Committ

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Mon, Jun 26, 2017 at 10:37:03AM -0600, Martin Sebor wrote: > On 06/23/2017 08:46 AM, Marek Polacek wrote: > > This patch adds a variant of __typeof, called __typeof_noqual. As the name > > suggests, this variant always drops all qualifiers, not just when the type > > is atomic. This was discus

[PATCH] Fix PR bootstrap/81217

Hello. Following fixes the PR by removal of superfluous bootstrap_target. Ready to be installed? ChangeLog: 2017-06-27 Martin Liska PR bootstrap/81217 * Makefile.def: Remove superfluous bootstrap_target from bootstrap_stage. * Makefile.in: Re-generate the fil

Re: adjust libgcc build support for VxWorks to VxWorks 7

On Tue, Jun 27, 2017 at 5:17 AM, Olivier Hainque wrote: > > 2017-06-27 Olivier Hainque > > libgcc/ > * config/t-vxworks7: New file. > * config.host (*-*-vxworks7): Use it. This is OK. Thanks. Ian

Re: adjust libgcc build support for VxWorks to VxWorks 7

> On Jun 27, 2017, at 15:25 , Ian Lance Taylor wrote: > > On Tue, Jun 27, 2017 at 5:17 AM, Olivier Hainque wrote: >> >> 2017-06-27 Olivier Hainque >> >>libgcc/ >>* config/t-vxworks7: New file. >>* config.host (*-*-vxworks7): Use it. > > This is OK. Great, thanks f

[PATCH][AArch64] Fix ILP32 memory access

This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html - it supersedes https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01907.html as this fixes the root cause of the failure. In ILP32 all memory accesses must have

x86_64-vxworks* support, vxworks target files updates

Hello, Minor updates to the x86 specific config files for VxWorks, to account for 64bit ABIs. Tested together with the previous patches in the vx7 series, for x86_64-vxworks7 in particular. Committing to mainline. With Kind Regards, Olivier 2017-06-27 Jerome Lambourg Olivier H

Re: [Neon intrinsics] Literal vector construction through vcombine is poor

On 27/06/17 07:13, Michael Collison wrote: > Richard, > > I reworked the patch using an assert as you suggested. Bootstrapped and > retested. Okay for trunk? > Yes, fine thanks. R. > > -Original Message- > From: Richard Earnshaw (lists) [mailto:richard.earns...@arm.com] > Sent: Frid

minor cleanups in x86*-vxworks support file

Hello, Minor cleanups, tested together with the previous patches introducing the vx7 support. Committing to mainline. With Kind Regards, Olivier 2017-06-27 Jerome Lambourg * config/i386/vxworks.h (ASM_SPEC): Remove definition. No target specific need, just fallback on defau

Re: [PATCH][AArch64] Fix ldp/stp patterns for ILP32

Hi, This patch has been superseded by: https://gcc.gnu.org/ml/gcc-patches/2017-06/msg02027.html Wilco

Use ucontext_t not struct ucontext in linux-unwind.h files

Current glibc no longer gives the ucontext_t type the tag struct ucontext, to conform with POSIX namespace rules. This requires various linux-unwind.h files in libgcc, that were previously using struct ucontext, to be fixed to use ucontext_t instead. This is similar to the removal of the struct s

Re: [PATCH][AArch64] Fix ILP32 memory access

On 27/06/17 14:39, Wilco Dijkstra wrote: > This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c > triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html - > it supersedes https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01907.html > as this fixes the root cause of the

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

On Tue, Jun 27, 2017 at 1:44 PM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 12:30 PM, Bin.Cheng wrote: >> On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote: >>> On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote: Hi, >> Rebased V3 for changes in previous patches. Bootstap and test on >

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng wrote: >> On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote: >>> Hi, >>> I was asked by upstream to split the loop distribution patch into small >>> ones. >>> It is hard because data structure an

[PATCH] Bail out HARD_REGISTER vars in asan (PR sanitizer/81224).

Similar to what we do for UBSAN and TSAN, DECL_HARD_REGISTER variables should not be instrumented. Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. Ready to be installed? Martin gcc/ChangeLog: 2017-06-27 Martin Liska PR sanitizer/81224 * asan.c (in

[PATCH] PR libstdc++/81221 fix namespace qualification for parallel mode

std::sample needs to call _GLIBCXX_STD_A::__sample instead of std::__sample, so that it works when Parallel Mode is active. PR libstdc++/81221 * include/bits/stl_algo.h (sample): Qualify with _GLIBCXX_STD_A not std. * testsuite/25_algorithms/sample/81221.cc: New.

[PATCH][AArch64] Fix PR79041

As described in PR79041, -mcmodel=large -mpc-relative-literal-loads may be used to avoid generating ADRP/ADD or ADRP/LDR. However both trunk and GCC7 may still emit ADRP for some constant pool literals. Fix this by adding a aarch64_pcrelative_literal_loads check. OK for trunk/GCC7 backport? Chan

Re: [PATCH] Bail out HARD_REGISTER vars in asan (PR sanitizer/81224).

On Tue, Jun 27, 2017 at 04:42:18PM +0200, Martin Liška wrote: > Similar to what we do for UBSAN and TSAN, DECL_HARD_REGISTER variables should > not > be instrumented. > > Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. > > Ready to be installed? > Martin > > gcc/Chang

RE: [PATCH] Fold (a > 0 ? 1.0 : -1.0) into copysign (1.0, a) and a * copysign (1.0, a) into abs(a)

> >> +(for cmp (gt ge lt le) > >> + outp (convert convert negate negate) > >> + outn (negate negate convert convert) > >> + /* Transform (X > 0.0 ? 1.0 : -1.0) into copysign(1, X). */ > >> + /* Transform (X >= 0.0 ? 1.0 : -1.0) into copysign(1, X). */ > >> + /* Transform (X < 0.0 ? 1.0 : -1

Re: [PATCH][AArch64] Fix PR79041

Hi On 27 June 2017 at 16:49, Wilco Dijkstra wrote: > As described in PR79041, -mcmodel=large -mpc-relative-literal-loads > may be used to avoid generating ADRP/ADD or ADRP/LDR. However both > trunk and GCC7 may still emit ADRP for some constant pool literals. > Fix this by adding a aarch64_pcrel

RE: [PATCH] Fold (a > 0 ? 1.0 : -1.0) into copysign (1.0, a) and a * copysign (1.0, a) into abs(a)

On June 27, 2017 4:52:28 PM GMT+02:00, Tamar Christina wrote: >> >> +(for cmp (gt ge lt le) >> >> + outp (convert convert negate negate) >> >> + outn (negate negate convert convert) >> >> + /* Transform (X > 0.0 ? 1.0 : -1.0) into copysign(1, X). */ >> >> + /* Transform (X >= 0.0 ? 1.0 :

Re: [PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

> Hello. > > Currently ifunc is interpreted as normal alias by IPA optimizations. That's > problematic > as should not consider ifunc alias as candidate for inlining, or redirection. > > Patch can bootstrap on ppc64le-redhat-linux and survives regression tests. > And survives MVC tests on x86_64

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On June 27, 2017 4:27:17 PM GMT+02:00, "Bin.Cheng" wrote: >On Tue, Jun 27, 2017 at 1:58 PM, Richard Biener > wrote: >> On Fri, Jun 23, 2017 at 12:10 PM, Bin.Cheng >wrote: >>> On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng >wrote: Hi, I was asked by upstream to split the loop distribution

Re: [PATCH][AArch64] Fix PR79041

On 27 June 2017 at 16:55, Yvan Roux wrote: > Hi > > On 27 June 2017 at 16:49, Wilco Dijkstra wrote: >> As described in PR79041, -mcmodel=large -mpc-relative-literal-loads >> may be used to avoid generating ADRP/ADD or ADRP/LDR. However both >> trunk and GCC7 may still emit ADRP for some constant

Re: [PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

On 06/27/2017 04:57 PM, Jan Hubicka wrote: >> Hello. >> >> Currently ifunc is interpreted as normal alias by IPA optimizations. That's >> problematic >> as should not consider ifunc alias as candidate for inlining, or redirection. >> >> Patch can bootstrap on ppc64le-redhat-linux and survives regr

Re: [PATCH] Do not allow to inline ifunc resolvers (PR ipa/81128).

> diff --git a/gcc/ipa-visibility.c b/gcc/ipa-visibility.c > index d5a3ae56c46..69e6e295d55 100644 > --- a/gcc/ipa-visibility.c > +++ b/gcc/ipa-visibility.c > @@ -97,7 +97,8 @@ non_local_p (struct cgraph_node *node, void *data > ATTRIBUTE_UNUSED) >&& !DECL_EXTERNAL (node->decl) >

[C++ PATCH] Kill IDENTIFIER_TEMPLATE

I discovered IDENTIFIER_TEMPLATE is never assigned to, and consequently never non-null. Nuked after a successful bootstrap. nathan -- Nathan Sidwell 2017-06-27 Nathan Sidwell Kill IDENTIFIER_TEMPLATE. * cp-tree.h (lang_identifier): Remove class_template_info field. (IDENTIFIER_TEMPLATE):

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

Hi Andrew, On 25/06/17 22:38, Andrew Pinski wrote: On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li wrote: Hi all, In this patch, a new integer register operand modifier 'r' is added. This will use the proper register name according to the mode of corresponding operand. 'w' register for scalar inte

Re: [PATCH] Move static chain and non-local goto init after NOTE_INSN_FUNCTION_BEG (PR sanitize/81186).

Hi, On Tue, 27 Jun 2017, Martin Liška wrote: > Following bug was for me very educative. I learned that we support > non-local gotos that can be combined with nested functions. Real fun :) > Well, the problem is that both cfun->nonlocal_goto_save_area and > cfun->static_chain_decl (emitted in e

Re: [PATCH v3][AArch64] Fix symbol offset limit

ping From: Wilco Dijkstra Sent: 17 January 2017 15:14 To: Richard Earnshaw; GCC Patches; James Greenhalgh Cc: nd Subject: Re: [PATCH v3][AArch64] Fix symbol offset limit     Here is v3 of the patch - tree_fits_uhwi_p was necessary to ensure the size of a declaration is an integer. So the questio

Re: [RFC][PATCH][AArch64] Cleanup frame pointer usage

ping   Wilco Dijkstra wrote: > James Greenhalgh wrote: > > > I note this is still marked as an RFC, are you now proposing it as a > > patch to be merged to trunk? > > Absolutely. It was marked as an RFC to get some comments - I thought it > may be controversial to separate the frame pointer and

Re: [PATCH][ARM] Remove DImode expansions for 1-bit shifts

  ping From: Wilco Dijkstra Sent: 17 January 2017 19:23 To: GCC Patches Cc: nd; Kyrill Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove DImode expansions for 1-bit shifts     A left shift of 1 can always be done using an add, so slightly adjust rtx cost for DImode left shift by 1 so tha

Re: [PATCH][ARM] Improve max_insns_skipped logic

  ping From: Wilco Dijkstra Sent: 10 November 2016 17:19 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Improve max_insns_skipped logic     Improve the logic when setting max_insns_skipped.  Limit the maximum size of IT to MAX_INSN_PER_IT_BLOCK as otherwise multiple IT instructions are needed,

Re: [PATCH][ARM] Remove Thumb-2 iordi_not patterns

  ping From: Wilco Dijkstra Sent: 17 January 2017 18:00 To: GCC Patches Cc: nd; Kyrylo Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove Thumb-2 iordi_not patterns     After Bernd's DImode patch [1] almost all DImode operations are expanded early (except for -mfpu=neon). This means the

Re: [PATCH][ARM] Fix ldrd offsets

    ping From: Wilco Dijkstra Sent: 03 November 2016 12:20 To: GCC Patches Cc: nd Subject: [PATCH][ARM] Fix ldrd offsets     Fix ldrd offsets of Thumb-2 - for TARGET_LDRD the range is +-1020, without -255..4091.  This reduces the number of addressing instructions when using DI mode operations (

Re: [PATCH][ARM] Remove movdi_vfp_cortexa8

  ping     Richard Earnshaw (lists) wrote: >  (define_insn "*movdi_vfp" > -  [(set (match_operand:DI 0 "nonimmediate_di_operand" > "=r,r,r,r,q,q,m,w,r,w,w, Uv") > +  [(set (match_operand:DI 0 "nonimmediate_di_operand" > "=r,r,r,r,q,q,m,w,!r,w,w, Uv") > Why have you introduced a no-reloads

Re: [PATCH][AArch64] Improve Cortex-A53 shift bypass

ping   On Fri, May 05, 2017 at 05:02:46PM +0100, Wilco Dijkstra wrote: > Richard Earnshaw (lists) wrote: > > > --- a/gcc/config/arm/aarch-common.c > > +++ b/gcc/config/arm/aarch-common.c > > @@ -254,12 +254,7 @@ arm_no_early_alu_shift_dep (rtx producer, rtx consumer) > >  return 0; > > 

Re: [PATCH][ARM] Update max_cond_insns settings

  ping     Richard Earnshaw (lists) wrote: > On 05/05/17 13:42, Wilco Dijkstra wrote: >> Richard Earnshaw (lists) wrote: >>> On 04/05/17 18:38, Wilco Dijkstra wrote: >>> > Richard Earnshaw wrote: >>> > > -  5, /* Max cond insns.  */ > +  2, 

Re: [Patch] Forward triviality in variant

On 18/06/17 12:37 -0700, Tim Shen via libstdc++ wrote: Besides the changes on the comments, I also changed the definition of _S_trivial_copy_assign and _S_trivial_move_assign to match what union has. See [class.copy.assign]p9. On Thu, Jun 1, 2017 at 8:13 AM, Jonathan Wakely wrote: On 30/05/17 0

Ping^2 Re: Fix genmultilib reuse rule checks for large sets of option combinations

Ping^2. This patch is still pending review. -- Joseph S. Myers jos...@codesourcery.com

Re: [PATCH] multiarch support for non-glibc linux systems

On 07/06/17 18:22, Szabolcs Nagy wrote: > Current multiarch directory name is always *-linux-gnu* on linux, > this patch configures different names for uclibc and musl targets. > (tested by the debian rebootstrap scripts for various *-linux-musl > and *-linux-uclibc targets see debian bug #861588)

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On Mon, Jun 26, 2017 at 10:33:48PM -0500, Peter Bergner wrote: > Tulio added support for two new AT_HWCAP2 bits to GLIBC which have been > recently added to the kernel: > > https://www.sourceware.org/ml/libc-alpha/2017-06/msg00069.html > > This patch adds support for them to the __builtin_cpu_s

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On 6/27/17 10:51 AM, Segher Boessenkool wrote: > On Mon, Jun 26, 2017 at 10:33:48PM -0500, Peter Bergner wrote: >> Tulio added support for two new AT_HWCAP2 bits to GLIBC which have been >> recently added to the kernel: >> >> https://www.sourceware.org/ml/libc-alpha/2017-06/msg00069.html >> >> Th

Re: Backports to 6 (and 7, and 5)

On Tue, Jun 27, 2017 at 09:18:07AM +0200, Richard Biener wrote: > On Mon, 26 Jun 2017, Segher Boessenkool wrote: > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01853.html > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01923.html > > https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02048.html > >

Re: [Doc, AArch64] Fix/Update AArch64 options.

On 06/27/2017 06:19 AM, Yvan Roux wrote: diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index 942a7d5..0fd1bfa 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -146,7 +146,7 @@ EnumValue Enum(aarch64_abi) String(lp64) Value(AARCH6

Re: [PATCH, rs6000] Add support to __builtin_cpu_supports() for two new HWCAP2 bits

On Tue, Jun 27, 2017 at 10:55:53AM -0500, Peter Bergner wrote: > On 6/27/17 10:51 AM, Segher Boessenkool wrote: > > On Mon, Jun 26, 2017 at 10:33:48PM -0500, Peter Bergner wrote: > >> Tulio added support for two new AT_HWCAP2 bits to GLIBC which have been > >> recently added to the kernel: > >> > >

Re: [PATCH 1/1] Remove ns32k leftover

On 06/24/2017 11:11 PM, Maya Rashish wrote: > Support for ns32k was removed in GCC4. > --- > include/longlong.h | 36 > 1 file changed, 36 deletions(-) Thanks. I added a ChangeLog entry and committed your change. jeff

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li wrote: > Hi Andrew, > > On 25/06/17 22:38, Andrew Pinski wrote: >> >> On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li wrote: >>> >>> Hi all, >>> >>> In this patch, a new integer register operand modifier 'r' is added. This >>> will use the >>> proper register

Re: Fix genmultilib reuse rule checks for large sets of option combinations

On 06/08/2017 02:28 PM, Joseph Myers wrote: > genmultilib computes combination_space, a list of all combinations of > options in MULTILIB_OPTIONS that might have multilibs built for them > (some of which may end up not having multilibs built for them, and > some of those may end up being mapped to

Re: [PATCH] PR libstdc++/81221 fix namespace qualification for parallel mode

On 27/06/17 15:46 +0100, Jonathan Wakely wrote: std::sample needs to call _GLIBCXX_STD_A::__sample instead of std::__sample, so that it works when Parallel Mode is active. PR libstdc++/81221 * include/bits/stl_algo.h (sample): Qualify with _GLIBCXX_STD_A not std.

Re: fix libcc1 dependencies in toplevel Makefile

Hi Alex, > On Jun 26, 2017, at 09:16 , Olivier Hainque wrote: > >> I'd like to understand better what the concurrency problem is with the >> current build machinery, before we proceed with this change. If you >> manage to trigger the problem again, could you try to further analyze >> build logs

Re: [PATCH][AArch64] Improve Cortex-A53 shift bypass

On Wed, Jun 14, 2017 at 2:55 PM, James Greenhalgh wrote: > On Fri, May 05, 2017 at 05:02:46PM +0100, Wilco Dijkstra wrote: >> Richard Earnshaw (lists) wrote: >> >> > --- a/gcc/config/arm/aarch-common.c >> > +++ b/gcc/config/arm/aarch-common.c >> > @@ -254,12 +254,7 @@ arm_no_early_alu_shift_dep (r

Re: [PATCH] Fix PR bootstrap/81217

On 06/27/2017 07:16 AM, Martin Liška wrote: > Hello. > > Following fixes the PR by removal of superfluous bootstrap_target. > > Ready to be installed? > > ChangeLog: > > 2017-06-27 Martin Liska > > PR bootstrap/81217 > * Makefile.def: Remove superfluous bootstrap_target from >

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