This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c
triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html -
it supersedes https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01907.html
as this fixes the root cause of the failure.
In ILP32 all memory accesses must have Pmode as the base address, but
aarch64_expand_mov_immediate wasn't emitting a conversion in one case.
Besides fixing this add an assert that flags any MEM operands that are
not Pmode.
Passes regress (with/without ilp32). OK for commit?
ChangeLog:
2017-06-27 Wilco Dijkstra <wdijk...@arm.com>
* config/aarch64/aarch64 (aarch64_expand_mov_immediate):
Convert memory address to Pmode.
--
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index
329d244e9cf16dbdf849e5dd02b3999caf0cd5a7..9038748ba049ba589f067f3f04c31704fe673d2c
100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1958,6 +1958,8 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
gcc_assert (can_create_pseudo_p ());
base = gen_reg_rtx (ptr_mode);
aarch64_expand_mov_immediate (base, XEXP (mem, 0));
+ if (ptr_mode != Pmode)
+ base = convert_memory_address (Pmode, base);
mem = gen_rtx_MEM (ptr_mode, base);
}
@@ -5207,6 +5209,7 @@ aarch64_print_operand (FILE *f, rtx x, int code)
case MEM:
output_address (GET_MODE (x), XEXP (x, 0));
+ gcc_assert (GET_MODE (XEXP (x, 0)) == Pmode);
break;
case CONST:
