On Wed, May 28, 2014 at 03:33:15PM +0400, Evgeny Stupachenko wrote:
> Ok. Fixed. Test still passes on x86:
Ok.
> --- a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
> +++ b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
> @@ -1,6 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -g -ftree-vectorize -ms
Ok. Fixed. Test still passes on x86:
diff --git a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
index 6e3cb52..e37b177 100644
--- a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
+++ b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
@@ -1,6 +1,5 @@
/* { dg-do compile } */
-/* { d
missed some line tails. Correct patch below:
diff --git a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
index 6e3cb52..57e8468 100644
--- a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
+++ b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
On Wed, May 28, 2014 at 02:51:57PM +0400, Evgeny Stupachenko wrote:
> Does the following fix ok?
>
> 2014-05-28 Evgeny Stupachenko
>
>* gcc.dg/vect/pr52252-ld.c: Fix target and options for the test.
>
> diff --git a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
> b/gcc/testsuite/gcc.dg/vect/
Does the following fix ok?
2014-05-28 Evgeny Stupachenko
* gcc.dg/vect/pr52252-ld.c: Fix target and options for the test.
diff --git a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
index 6e3cb52..57e8468 100644
--- a/gcc/testsuite/gcc.dg/vect/pr52252-l
Evgeny Stupachenko writes:
> The test is on general changes. So we can wait for others and if there
> are no more objections leave sparc-sun-solaris2 as target to skip.
If so, use sparc*-*-* instead.
> Or change to the following:
> /* { dg-skip-if "The test should pass on x86, other architectur
I'm not sure about other architectures. I can test it on x86. Most
likely it will pass on Arm, but again I'm not sure that { arm*-*-* }
is ok.
The test is on general changes. So we can wait for others and if there
are no more objections leave sparc-sun-solaris2 as target to skip.
Or change to the
On Fri, May 16, 2014 at 03:11:05PM +0200, Rainer Orth wrote:
> Hi Evgeny,
>
> > Does the following fix ok?
> >
> > 2014-05-16 Evgeny Stupachenko
> >
> >* gcc.dg/vect/pr52252-ld.c: Fix target for the test.
> >
> >
> > diff --git a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
> > b/gcc/testsuit
Hi Evgeny,
> Does the following fix ok?
>
> 2014-05-16 Evgeny Stupachenko
>
>* gcc.dg/vect/pr52252-ld.c: Fix target for the test.
>
>
> diff --git a/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
> b/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
> index 6e3cb52..301433b 100644
> --- a/gcc/testsuite/gc
The test uses SSSE3 because of the following restriction in i386.c:
static bool
expand_vec_perm_pshufb2 (struct expand_vec_perm_d *d)
{
rtx rperm[2][16], vperm, l, h, op, m128;
unsigned int i, nelt, eltsz;
if (!TARGET_SSSE3 || GET_MODE_SIZE (d->vmode) != 16)
return false;
Does the foll
It seems like "shuffle of 3 loads is not supported by target" is the root cause.
The permutation like 0, 3, 6, 9, c, is not supported by the target.
Evgeny Stupachenko writes:
> The test is on general changes. However I was able to test it on x86 only.
> I see 2 possible solutions:
> 1. Set the test for x86 only.
> 2. Modify it so that it will pass on sparc-sun-solaris2.
>
> If 2. is not acceptable I'll create patch for 1.
> Currently I don't
On Mon, 12 May 2014, Evgeny Stupachenko wrote:
> The test is on general changes. However I was able to test it on x86 only.
> I see 2 possible solutions:
> 1. Set the test for x86 only.
> 2. Modify it so that it will pass on sparc-sun-solaris2.
>
> If 2. is not acceptable I'll create patch for 1.
The test is on general changes. However I was able to test it on x86 only.
I see 2 possible solutions:
1. Set the test for x86 only.
2. Modify it so that it will pass on sparc-sun-solaris2.
If 2. is not acceptable I'll create patch for 1.
Currently I don't see why "in0_9 = *in_27" is not supported
Evgeny Stupachenko writes:
> Patch with fixes attached.
> Currently if-structure is as following:
> + if (count == 3)
> ...
> + else
> + {
> + /* If length is not equal to 3 then only power of 2 is supported.
> */
> + gcc_assert (exact_log2 (count) != -1);
>
> Fo
On Tue, 6 May 2014, Evgeny Stupachenko wrote:
> Patch with fixes attached.
Ok if bootstrap/regtest passes.
Thanks,
Richard.
> Currently if-structure is as following:
> + if (count == 3)
> ...
> + else
> + {
> + /* If length is not equal to 3 then only power of 2 is suppo
Patch with fixes attached.
Currently if-structure is as following:
+ if (count == 3)
...
+ else
+ {
+ /* If length is not equal to 3 then only power of 2 is supported. */
+ gcc_assert (exact_log2 (count) != -1);
For stores group I've created another mail thread.
T
On Tue, 6 May 2014, Evgeny Stupachenko wrote:
> The patch on cost model was successfully committed.
> I've separated the rest part of the patch on loads/stores group into
> 2: on loads group and on stores group.
> Below is first part on loads group.
>
> Bootstrap and make check passed on x86.
>
The patch on cost model was successfully committed.
I've separated the rest part of the patch on loads/stores group into
2: on loads group and on stores group.
Below is first part on loads group.
Bootstrap and make check passed on x86.
Is it ok?
ChangeLog:
2014-05-06 Evgeny Stupachenko
Ping.
On Fri, Apr 18, 2014 at 2:05 PM, Evgeny Stupachenko wrote:
> Hi,
>
> Merged with current master the patch passes bootstrap and is giving
> expected gains.
> Patch and new tests are attached.
>
> ChangeLog:
>
> 2014-04-18 Evgeny Stupachenko
>
> * tree-vect-data-refs.c (vect_groupe
Hi,
Merged with current master the patch passes bootstrap and is giving
expected gains.
Patch and new tests are attached.
ChangeLog:
2014-04-18 Evgeny Stupachenko
* tree-vect-data-refs.c (vect_grouped_store_supported): New
check for stores group of length 3.
(vect_per
Missed attachment.
On Thu, Mar 6, 2014 at 6:42 PM, Evgeny Stupachenko wrote:
> I've separated the patch into 2: cost model tuning and load/store
> groups parallelism.
> SLM tuning was partially introduced in the patch:
> http://gcc.gnu.org/ml/gcc-patches/2014-03/msg00226.html
> The patch introduc
I've separated the patch into 2: cost model tuning and load/store
groups parallelism.
SLM tuning was partially introduced in the patch:
http://gcc.gnu.org/ml/gcc-patches/2014-03/msg00226.html
The patch introducing vectorization for load/store groups of size 3 attached.
Is it ok for stage1?
Change
On Tue, 11 Feb 2014, Evgeny Stupachenko wrote:
> Missed patch attached in plain-text.
>
> I have copyright assignment on file with the FSF covering work on GCC.
>
> Load/stores groups of length 3 is the most frequent non-power-of-2
> case. It is used in RGB image processing (like test case in PR
Missed patch attached in plain-text.
I have copyright assignment on file with the FSF covering work on GCC.
Load/stores groups of length 3 is the most frequent non-power-of-2
case. It is used in RGB image processing (like test case in PR52252).
For sure we can extend the patch to length 5 and mor
On Tue, 11 Feb 2014, Evgeny Stupachenko wrote:
> Hi,
>
> The patch gives an expected 3 times gain for the test case in the PR52252
> (and even 6 times for AVX2).
> It passes make check and bootstrap on x86.
> spec2000/spec2006 got no regressions/gains on x86.
>
> Is this patch ok?
I've worked o
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