On 16/11/11 08:43, Sebastian Huber wrote:
> On 11/08/2011 09:05 AM, Sebastian Huber wrote:
>> On 10/31/2011 11:39 AM, Sebastian Huber wrote:
>>> On 10/25/2011 06:56 PM, Richard Earnshaw wrote:
On 24/10/11 14:30, Sebastian Huber wrote:
> Hello,
>
> what about the attached patch base
On 11/08/2011 09:05 AM, Sebastian Huber wrote:
On 10/31/2011 11:39 AM, Sebastian Huber wrote:
On 10/25/2011 06:56 PM, Richard Earnshaw wrote:
On 24/10/11 14:30, Sebastian Huber wrote:
Hello,
what about the attached patch based on the original patch provided by Bernd
Schmidt with modifications
On 10/31/2011 11:39 AM, Sebastian Huber wrote:
On 10/25/2011 06:56 PM, Richard Earnshaw wrote:
On 24/10/11 14:30, Sebastian Huber wrote:
Hello,
what about the attached patch based on the original patch provided by Bernd
Schmidt with modifications suggested by Richard Earnshaw.
pr49641.patch
On 10/25/2011 06:56 PM, Richard Earnshaw wrote:
On 24/10/11 14:30, Sebastian Huber wrote:
Hello,
what about the attached patch based on the original patch provided by Bernd
Schmidt with modifications suggested by Richard Earnshaw.
pr49641.patch
* config/arm/arm.c (store_multiple_se
On 24/10/11 14:30, Sebastian Huber wrote:
> Hello,
>
> what about the attached patch based on the original patch provided by Bernd
> Schmidt with modifications suggested by Richard Earnshaw.
>
>
>
> pr49641.patch
>
>
> * config/arm/arm.c (store_multiple_sequence): Avoid cases where
>
Hello,
what about the attached patch based on the original patch provided by Bernd
Schmidt with modifications suggested by Richard Earnshaw.
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 8
On 18/10/11 13:47, Bernd Schmidt wrote:
> On 10/18/11 14:30, Richard Earnshaw wrote:
>> Well, if that's the case why do we need to test for Thumb1 at all? And
>> why do we only enable write-back for Thumb1? other ISA variants can
>> also do that (I know that Thumb1 requires write-back, but it's
>
On 10/18/11 14:30, Richard Earnshaw wrote:
> Well, if that's the case why do we need to test for Thumb1 at all? And
> why do we only enable write-back for Thumb1? other ISA variants can
> also do that (I know that Thumb1 requires write-back, but it's
> optionally available for the other ISA flavo
On 18/10/11 13:19, Bernd Schmidt wrote:
> On 10/17/11 14:54, Richard Earnshaw wrote:
>> On 14/10/11 14:31, Bernd Schmidt wrote:
>>> On 07/13/11 16:03, Richard Earnshaw wrote:
> * config/arm/arm.c (store_multiple_sequence): Avoid cases where
> the base reg is stored iff compiling for Thu
On 10/17/11 14:54, Richard Earnshaw wrote:
> On 14/10/11 14:31, Bernd Schmidt wrote:
>> On 07/13/11 16:03, Richard Earnshaw wrote:
* config/arm/arm.c (store_multiple_sequence): Avoid cases where
the base reg is stored iff compiling for Thumb1.
* gcc.target/arm/pr49641.c
On 14/10/11 14:31, Bernd Schmidt wrote:
> On 07/13/11 16:03, Richard Earnshaw wrote:
>>> * config/arm/arm.c (store_multiple_sequence): Avoid cases where
>>> the base reg is stored iff compiling for Thumb1.
>>>
>>> * gcc.target/arm/pr49641.c: New test.
>
> Ping. Richard, you replied to
On 07/13/11 16:03, Richard Earnshaw wrote:
>> * config/arm/arm.c (store_multiple_sequence): Avoid cases where
>> the base reg is stored iff compiling for Thumb1.
>>
>> * gcc.target/arm/pr49641.c: New test.
Ping. Richard, you replied to the mail but didn't comment on the patch.
Be
On 07/13/11 16:01, Richard Earnshaw wrote:
> On 07/07/11 21:02, Bernd Schmidt wrote:
>> This corrects an error in store_multiple_operation. We're only
>> generating the writeback version of the instruction on Thumb-1, so
>> that's where we must make sure the base register isn't also stored.
>>
>> T
On 07/07/11 21:02, Bernd Schmidt wrote:
> This corrects an error in store_multiple_operation. We're only
> generating the writeback version of the instruction on Thumb-1, so
> that's where we must make sure the base register isn't also stored.
>
> The ARMv7 manual is unfortunately not totally clea
This corrects an error in store_multiple_operation. We're only
generating the writeback version of the instruction on Thumb-1, so
that's where we must make sure the base register isn't also stored.
The ARMv7 manual is unfortunately not totally clear that this does in
fact produce unpredictable res
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