On 07/01/2025 20:16, Torbjörn SVENSSON wrote:
> Ok for trunk and releases/gcc-14?
>
> --
>
> Since armv8-m.base uses thumb1 that does not suport sigcall/tailcall,
> a pattern is needed that uses PUSH/BL/POP sequence instead of a single
> B instruction to reuse an already existing function in the
On 22/12/2024 15:35, Torbjorn SVENSSON wrote:
>
>
> On 2024-12-19 12:48, Richard Earnshaw (lists) wrote:
>> On 18/12/2024 16:24, Torbjörn SVENSSON wrote:
>>> Changes since v1:
>>>
>>> - Updated the commit message to reflect the changes (including the s
On 09/01/2025 21:42, Torbjörn SVENSSON wrote:
> Changes since v1:
>
> - Added dg-add-options arm_arch_v5te_thumb
> - Added -std=c17 to dg-options.
> - Removed -march=armv5te -mfloat-abi=soft -mthumb from dg-options
> - Updated the commit message to reflect the new changes
>
> Note: This changes f
On 09/01/2025 14:50, Christophe Lyon wrote:
> The previous fix only worked for C, for C++ we need to add more
> information to the underlying type so that
> finish_class_member_access_expr accepts it.
>
> We use the same logic as in aarch64's register_tuple_type for AdvSIMD
> tuples.
>
> This pat
On 20/12/2024 22:53, Christophe Lyon wrote:
> Commit r15-6389-g670df03e5294a3 only partially fixed support for moves
> of large modes: despite the introduction of V2x* and V4x* modes in
> r15-6245-g4f4e13dd235b to support MVE tuples, we still need to support
> TI, OI and XI modes, which appear for
On 27/12/2024 17:01, Torbjörn SVENSSON wrote:
> Ok for trunk?
>
> --
>
> This change will enforce that the expected instructions are generated
> per function rather than allowing some other function to use the
> expected instructions.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/armv
On 27/12/2024 08:32, Torbjörn SVENSSON wrote:
> Ok for trunk?
>
> --
>
> The implementation of the functions in the test case expects there to be
> a few arguments to the helper functions, but the prototype does not have
> any arguments at all. Align these to avoid these errors:
>
> .../pr59858.
On 22/12/2024 15:27, Torbjörn SVENSSON wrote:
> Ok for trunk and releases/gcc-14?
>
> --
>
> When the test was initially created, -fcommon was the default, but in
> commit r10-4867-g6271dd984d7 the default value changed to -fno-common.
> This change made the test start failing. To counter the ove
On 08/01/2025 21:47, Thiago Jung Bauermann wrote:
> "Richard Earnshaw (lists)" writes:
>
>> On 27/12/2024 21:47, Thiago Jung Bauermann wrote:
>>> In 32-bit Arm assembly, the @ character is the start of a comment so
>>> the section type needs to use the %
On 09/01/2025 08:58, Christophe Lyon wrote:
> OK for gcc-14?
>
> This backport is a cherry pick of commit
> 2089009210a1774c37e527ead8bbcaaa1a7a9d2d, with a small change needed
> because force_lowpart_subreg does not exist in gcc-14: the patch
> replaces it with the equivalent:
>
> -x = force
On 08/01/2025 18:54, Christophe Lyon wrote:
> The previous fix only worked for C, for C++ we need to add more
> information to the underlying type so that
> finish_class_member_access_expr accepts it.
>
> This patch makes gcc.target/arm/mve/intrinsics/pr118332.c pass in C++
> mode.
>
> gcc/Change
On 27/12/2024 21:47, Thiago Jung Bauermann wrote:
> In 32-bit Arm assembly, the @ character is the start of a comment so
> the section type needs to use the % character instead.
>
> configure.ac attempts to account for this difference by doing a second
> try when checking the assembler for section
On 08/01/2025 13:37, Christophe Lyon wrote:
> On Wed, 8 Jan 2025 at 14:17, Richard Earnshaw (lists)
> wrote:
>>
>> On 19/12/2024 12:17, Christophe Lyon wrote:
>>> Without this patch, testcases using arm_v8_3a_fp16_complex_neon fail
>>> to compile on arm-linux
On 08/01/2025 13:56, Tamar Christina wrote:
>> -Original Message-
>> From: Richard Earnshaw (lists)
>> Sent: Wednesday, January 8, 2025 1:18 PM
>> To: Christophe Lyon ; gcc-patches@gcc.gnu.org;
>> Richard Sandiford ; Tamar Christina
>> ; Andre Simoes
On 19/12/2024 12:17, Christophe Lyon wrote:
> The vect testsuite adds -mfpu=neon before the arm_v8_3a_complex_neon
> flags via check_vect_support_and_set_flags, so before this change
> testcases are compiled with -mfpu=neon (and no -march/-mfloat-abi
> flag) with an arm-linux-gnueabihf toolchain co
On 19/12/2024 12:17, Christophe Lyon wrote:
> Without this patch, testcases using arm_v8_3a_fp16_complex_neon fail
> to compile on arm-linux-gnueabihf with
> fatal error: gnu/stubs-soft.h: No such file or directory
> because they are actually compiled with
> -mfloat-abi=softfp -mfpu=auto -mcpu=unse
On 19/12/2024 12:17, Christophe Lyon wrote:
> These two testcases have twice the same dg-add-options
> arm_v8_3a_complex_neon, the patch removes one of them.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/vect/complex/complex-operations-run.c: Remove duplicate
> dg-add-options arm_v8_3a_co
On 19/12/2024 12:17, Christophe Lyon wrote:
> The test uses floats, not fp16 so it should use arm_v8_3a_complex_neon
> instead of arm_v8_3a_fp16_complex_neon.
>
> This makes it PASS on arm-linux-gnueabihf instead of being UNRESOLVED.
>
> gcc/testsuite/ChangeLog:
> * gcc.dg/vect/comple
On 19/12/2024 16:45, Christophe Lyon wrote:
> Commit r15-6245-g4f4e13dd235b introduced new modes for MVE tuples, but
> missed adding support for them in a few places.
>
> Adding them to the list in arm_attr_length_move_neon is not sufficient
> since we later face another ICE where the compiler doe
On 18/12/2024 16:24, Torbjörn SVENSSON wrote:
> Changes since v1:
>
> - Updated the commit message to reflect the changes (including the subject).
> - Replaced the POP/BEQ checks with chesk for {cmp,mov,orr,and}{eq,ne}.
> - Removed the size check
>
>
> Ok for trunk and releases/gcc-14?
> Should
On 18/12/2024 19:57, Torbjörn SVENSSON wrote:
> Ok for trunk?
>
> --
>
> Update test case to align with used function in C++26.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/abi/arm_rtti1.C: Check for expected symbol in C++26.
>
> Signed-off-by: Torbjörn SVENSSON
OK.
R.
> ---
> gcc/tests
On 18/12/2024 18:45, Torbjörn SVENSSON wrote:
> Changes since v1:
>
> - Split tests into two parts. One part for doing asm checkes. Another part
> for doing run test as these require hardware to be available.
> - Changed existing tests to be "compile" instead of "run".
>
> Changes since v2:
>
On 17/12/2024 21:01, Torbjörn SVENSSON wrote:
> Regtested for arm-none-eabi (Cortex-M0/M23/M33/M55/M85).
>
> Ok for trunk?
>
> --
>
> Without the escape of the tab, newline and semicolon, the generated
> assembler output will not match the expected assmbler in the test cases.
>
> Fixes Linaro C
On 05/11/2024 07:55, Torbjorn SVENSSON wrote:
>
>
> On 2024-11-04 15:41, Richard Earnshaw wrote:
>> On 01/11/2024 18:40, Richard Earnshaw (lists) wrote:
>>> On 24/10/2024 09:50, Torbjörn SVENSSON wrote:
>>>> Ok for trunk and releases/gcc-14?
>>>&
On 15/11/2024 10:15, Christophe Lyon wrote:
> On Thu, 14 Nov 2024 at 18:33, Torbjorn SVENSSON
> wrote:
>>
>>
>>
>> On 2024-11-14 16:53, Christophe Lyon wrote:
>>> On Sun, 10 Nov 2024 at 17:44, Torbjörn SVENSSON
>>> wrote:
Ok for trunk and releases/gcc-14?
--
When the
On 17/12/2024 14:32, Torbjorn SVENSSON wrote:
>
>
> On 2024-12-17 12:06, Richard Earnshaw (lists) wrote:
>> On 17/12/2024 07:04, Torbjörn SVENSSON wrote:
>>> Ok for trunk?
>>>
>>> --
>>>
>>> Fixes Linaro CI reported regression on r15-6
On 10/11/2024 19:25, Torbjörn SVENSSON wrote:
> Ok for trunk and releases/gcc-14?
>
> --
>
> Test fails for Cortex-M0 with:
>
> .../pr81812.C:6:8: error: generic thunk code fails for method 'virtual void
> ChildNode::_ZTv0_n12_NK9ChildNode5errorEz(...) const' which uses '...'
>
> According to
On 17/12/2024 07:04, Torbjörn SVENSSON wrote:
> Ok for trunk?
>
> --
>
> Fixes Linaro CI reported regression on r15-6164-gbdf75257aad2 in
> https://linaro.atlassian.net/browse/GNU-1463.
>
> gcc/testsuite/ChangeLog:
>
> * lib/target-supports.exp: Added corresponding -mtune= option
>
On 17/12/2024 08:01, Gerald Pfeifer wrote:
> On Fri, 20 Sep 2024, Tobias Burnus wrote:
>> This is supposed to document that GCC now supports offloading,
>> e.g., from an ARM CPU to a Nvidia GPU (i.e. Grace<->Hopper)
>> or, e.g., x86-64 to RISC-V. → https://gcc.gnu.org/PR96265
>> and https://gcc.gnu
On 13/12/2024 14:29, Christophe Lyon wrote:
> On Tue, 10 Dec 2024 at 13:14, Richard Earnshaw (lists)
> wrote:
>>
>> On 09/12/2024 21:11, Christophe Lyon wrote:
>>> In this PR, we have to handle a case where MVE predicates are supplied
>>> as a const_int, wher
On 06/12/2024 16:09, Christophe Lyon wrote:
> Like dlstp-compile-asm-1.c, this test would fail if GCC is configured
> with non-default options, such as -mtune=cortex-a9.
>
> Force -mtune=cortex-m55 to avoid this unexpected issue.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/dlstp-
On 12/12/2024 13:47, Torbjorn SVENSSON wrote:
On 2024-12-12 12:02, Richard Earnshaw (lists) wrote:
On 10/11/2024 10:02, Torbjörn SVENSSON wrote:
Ok for trunk, releases/gcc-12, releases/gcc-13 and releases/gcc-14?
--
In version 6-2017-q1-update of the "GNU Arm Embedded Toolchain&q
On 12/12/2024 13:36, Torbjorn SVENSSON wrote:
On 2024-12-12 12:26, Richard Earnshaw (lists) wrote:
On 10/11/2024 13:38, Torbjörn SVENSSON wrote:
Hi Richard,
I'm not sure if I'm doing something wrong here, or if it was an
oversight
when doing the update in r12-8108-g62082d278
On 14/11/2024 10:42, Christophe Lyon wrote:
V2DF is not supported by MVE, so remove it from the only iterator
which contains it.
gcc/ChangeLog:
* config/arm/iterators.md (MVE_vecs): Remove V2DF.
---
gcc/config/arm/iterators.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
On 14/11/2024 10:41, Christophe Lyon wrote:
Remove floating-point condition from mve_vec_extract_sext_internal and
mve_vec_extract_zext_internal, since the MVE_2 iterator does not
include any FP mode.
gcc/ChangeLog:
* config/arm/mve.md (mve_vec_extract_sext_internal): Fix
condit
On 10/11/2024 13:38, Torbjörn SVENSSON wrote:
Hi Richard,
I'm not sure if I'm doing something wrong here, or if it was an oversight
when doing the update in r12-8108-g62082d278d1.
Anyway, the commit message suggest that it's only the constant that is of
interrest, so I updated the test to only c
On 10/11/2024 10:02, Torbjörn SVENSSON wrote:
Ok for trunk, releases/gcc-12, releases/gcc-13 and releases/gcc-14?
--
In version 6-2017-q1-update of the "GNU Arm Embedded Toolchain" build,
there are 2 pop instructions. In version 7-2018-q2-update, the next
version that still have a binary build
On 09/12/2024 15:05, Christophe Lyon wrote:
Changes v1->v2:
- Keep MAX_TUPLE_SIZE=0 and update accesses to acle_vector_types
accordingly.
- implement arm_array_mode in patch 4/4 instead of 2/4 to avoid
temporary regressions when running the testsuite at patch 2/4 (helps
future bisects)
On 07/11/2024 09:18, Christophe Lyon wrote:
This patch series re-implements the store_scatter and load_gather
intrinsincs using the new framework, similarly to previous series.
A few points worth mentioning:
- unlike other intrinsics, these ones have the predicate after the
mode in their nam
On 11/12/2024 09:54, Tamar Christina wrote:
-Original Message-
From: Richard Sandiford
Sent: Wednesday, December 11, 2024 9:50 AM
To: Tamar Christina
Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
; ktkac...@gcc.gnu.org
Subject: Re: [PATCH 1/2]AArch64: Add CMP+CSEL and CMP+CSET for
On 03/12/2024 10:41, Claudio Bantaloukas wrote:
On 12/3/2024 10:24 AM, Kyrylo Tkachov wrote:
Hi Claudio,
On 2 Dec 2024, at 19:14, Claudio Bantaloukas
wrote:
The previous version of the patch was based on the mistaken
assumption that
features in /proc/cpuinfo had matching names to the fe
On 09/12/2024 21:11, Christophe Lyon wrote:
In this PR, we have to handle a case where MVE predicates are supplied
as a const_int, where individual predicates have illegal boolean
values (such as 0xc for a 4-bit boolean predicate). To avoid the ICE,
fix the constant (any non-zero value is conver
On 06/12/2024 18:14, Christophe Lyon wrote:
On Fri, 6 Dec 2024 at 12:41, Richard Earnshaw (lists)
wrote:
On 04/12/2024 20:56, Christophe Lyon wrote:
On Wed, 4 Dec 2024 at 12:39, Richard Earnshaw (lists)
wrote:
On 25/11/2024 20:08, Christophe Lyon wrote:
In this PR, we have to handle a
On 09/12/2024 08:16, Richard Biener wrote:
On Fri, 6 Dec 2024, Richard Earnshaw wrote:
The vcond{,u} expander paterns have been declared as obsolete. Remove
them from the Arm backend.
OK (not sure if you were expecting approval from me ;)), the patterns
are no longer exercised anywhere
The vcond{,u} expander paterns have been declared as obsolete. Remove
them from the Arm backend.
gcc/ChangeLog:
PR target/114189
* config/arm/arm-protos.h (arm_expand_vcond): Delete prototype.
* config/arm/arm.cc (arm_expand_vcond): Delete function.
* config/arm/v
On 06/12/2024 16:09, Christophe Lyon wrote:
> Like dlstp-compile-asm-1.c, this test would fail if GCC is configured
> with non-default options, such as -mtune=cortex-a9.
>
> Force -mtune=cortex-m55 to avoid this unexpected issue.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/dlstp-
These tests all lack ISO-C style function definitions. Some
deliberatly so. Rather than try to adjust the code and risk changing
the nature of the test, add -std=c17 to the test options.
gcc/testsuite/ChangeLog:
* gcc.target/arm/20031108-1.c: Add -std=c17.
* gcc.target/arm/fp16-
On 04/12/2024 20:56, Christophe Lyon wrote:
> On Wed, 4 Dec 2024 at 12:39, Richard Earnshaw (lists)
> wrote:
>>
>> On 25/11/2024 20:08, Christophe Lyon wrote:
>>> In this PR, we have to handle a case where MVE predicates are supplied
>>> as a const_int, wher
On 06/12/2024 10:02, Christophe Lyon wrote:
> This test would fail if GCC is configured with non-default options,
> such as -mtune=cortex-a9.
>
> This 'unexpected' scheduling makes the DLSTP optimization generate
> subslr, #16
> bhi .L4
> lctp
> pop {r4, r5, pc}
On 28/05/2024 10:31, Gerald Pfeifer wrote:
> On Mon, 10 Jul 2023, Kyrylo Tkachov via Gcc-patches wrote:
>> I know the GCC source is inconsistent on this but the proper branding
>> these days is "ARM" -> "Arm" and "ARMv8.1-M" -> "Armv8.1-M".
>
> Arm, Red Hat, and SUSE - those three are spelt incor
I was just looking back through some old emails and saw that this was never
reviewed.
On 26/04/2024 18:37, Andrew Pinski wrote:
> On many cores, the mov instruction is "free" so the sequence:
> cmp w0, #0
> csetw0, ne
> add w0, w0, 42
> is more expensive than j
The mmintrin.h header was adjusted for GCC-14 to generate a
(suppressible) warning if it was used, saying that support would be
removed in GCC-15.
Make that come true by removing the contents of this header and
emitting an error.
At this point in time I've not removed the internal support for the
On 29/11/2024 06:02, Arvin Zhong wrote:
> Hi GCC reviewers,
>
> The star-mc1 CPU is an Armv8-m Mainline CPU supporting ARM CDE feature.
> The attached is the patch to support adding CDE options for -mcpu=star-mc1.
> The patch has been built and tested on the GCC upstream with arm-none-eabi.
>
> I
On 02/12/2024 21:21, Christophe Lyon wrote:
> If the target does not support floating-point, we register FP vector
> types as 'void' (see register_vector_type).
>
> The leads to warnings about 'pure attribute on function returning
> void' when we declare the various load intrinsics because their
>
On 21/11/2024 14:24, Torbjörn SVENSSON wrote:
> Update test case to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/lto/pr96939_0.c: Use effective-target
> arm_arch_v8a.
> * gcc.target/arm/lto/pr96939_
On 21/11/2024 14:24, Torbjörn SVENSSON wrote:
> The test case gcc.target/arm/its.c was created together with restriction
> of IT blocks for Cortex-M7. As the test case fails on all tunes that
> does not match Cortex-M7, explicitly test it for Cortex-M7. To have some
> additional faith that GCC does
On 21/11/2024 14:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
> * gcc.dg/pr41574.c: Added option "-mcpu=unset".
> * gcc.dg/pr59418.c: Likewise.
> * lib/target-supports.
On 21/11/2024 14:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/bfloat16_scalar_1_1.c: Use effective-target
> arm_arch_v8_2a_bf16_hard.
> * gcc.targ
On 21/11/2024 14:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/other/pr56184.C: Use effective-target
> arm_arch_v7a_neon_thumb.
> * g++.dg/other/pr59985.C:
On 21/11/2024 17:23, Torbjörn SVENSSON wrote:
> I'm not sure how to verify that adding the parameter won't destroy the test.
> I've tried to repoduce the ICE on old Arm builds of arm-none-eabi, but none of
> them ICE. I suppose it should be safe to add the parameter as the PR talks
> about the lite
On 21/11/2024 19:01, Torbjörn SVENSSON wrote:
> Ok for trunk and releases/gcc-14?
>
> --
>
> On Cortex-M4, the code generated is:
> cmp r0, r1
> ittene
> lslne r0, r0, r1
> asrne r0, r0, #1
> moveq r0, r1
> add r0, r0, r1
> bx lr
>
> On C
On 22/11/2024 09:37, Torbjörn SVENSSON wrote:
> Changes since v1:
>
> - Rewrote the padding instructions in the macro to instead write to volatile
> memory. This ensures that every expansion of the base macro is exactly 2
> bytes.
>
> If the `GO()` in f3 is removed, the generated assembly wou
On 25/11/2024 20:08, Christophe Lyon wrote:
> In this PR, we have to handle a case where MVE predicates are supplied
> as a const_int, where individual predicates have illegal boolean
> values (such as 0xc for a 4-bit boolean predicate). To avoid the ICE,
> fix the constant (any non-zero value is
On 26/11/2024 15:51, David Malcolm wrote:
> OK for trunk?
OK
> (caveat: I haven't done a full test on this patch)
Linaro's CI has, it's clean.
R.
>
> gcc/ChangeLog:
> PR translation/90160
> * config/arm/arm.cc (arm_option_check_internal): Use quotes in
> messages that refer
On 03/12/2024 16:09, Wilco Dijkstra wrote:
The register indexed variants of LDRD have complex register overlap constraints
which makes them hard to use without using output_move_double (which can't be
used for atomics as it doesn't guarantee to emit atomic LDRD/STRD when
required).
Add a new pr
On 02/12/2024 11:21, Christophe Lyon wrote:
> If the target does not support floating-point, we register FP vector
> types as 'void' (see register_vector_type).
>
> The leads to warnings about 'pure attribute on function returning
> void' when we declare the various load intrinsics because their
>
On 20/11/2024 13:00, Torbjorn SVENSSON wrote:
>
>
> On 2024-11-19 18:57, Richard Earnshaw (lists) wrote:
>> On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
>>> Update test case to use -mcpu=unset/-march=unset feature introduced in
>>> r15-3606-g7d6c6a0d15c
On 08/11/2024 18:29, Christophe Lyon wrote:
> On Fri, 8 Nov 2024 at 19:20, Torbjörn SVENSSON
> wrote:
>>
>> Ok for trunk?
>>
>> --
>>
>> With the changes in r15-1579-g792f97b44ff, the code used as "padding" in
>> the test case is optimized way. Prevent this optimization by forcing a
>> read of the
On 20/11/2024 15:04, Torbjorn SVENSSON wrote:
>
>
> On 2024-11-20 15:53, Richard Earnshaw (lists) wrote:
>> On 20/11/2024 13:00, Torbjorn SVENSSON wrote:
>>>
>>>
>>> On 2024-11-19 18:57, Richard Earnshaw (lists) wrote:
>>>> On 19/11/2024 10:
On 20/11/2024 10:49, Richard Earnshaw (lists) wrote:
> On 20/11/2024 07:58, Torbjorn SVENSSON wrote:
>>
>>
>> On 11/19/24 18:08, Richard Earnshaw (lists) wrote:
>>> On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
>>>> Update test cases to use -mcpu=unset/-
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/vect-early-break-cbranch.c: Use
> effective-target arm_arch_v8a_hard.
>
> Signed-off-by:
On 20/11/2024 10:11, Torbjorn SVENSSON wrote:
>
>
> On 2024-11-19 18:51, Richard Earnshaw (lists) wrote:
>> On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
>>> The test case gcc.target/arm/its.c was created together with restriction
>>> of IT blocks for Cortex-
On 20/11/2024 07:58, Torbjorn SVENSSON wrote:
>
>
> On 11/19/24 18:08, Richard Earnshaw (lists) wrote:
>> On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
>>> Update test cases to use -mcpu=unset/-march=unset feature introduced in
>>> r15-3606-g7d6c6a0d15c
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/opt/pr69175.C: Added option "-mcpu=unset".
>
> Signed-off-by: Torbjörn SVENSSON
> ---
> gcc/testsuite
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * g++.target/arm/pr103676.C: Use effective-target
> arm_cpu_cortex_m7.
> * gcc.target/arm/no-volatile
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/pac-1.c: Use effective-target
> arm_arch_v8_1m_main_pacbti.
> * gcc.target/arm/pac-1
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/pure-code/no-literal-pool-m0.c: Use
> effective-target arm_cpu_cortex-m0.
> * gcc.ta
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test case to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/lto/pr96939_0.c: Use effective-target
> arm_arch_v8a.
> * gcc.target/arm/lto/pr96939_
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/cortex-m55-nodsp-flag-hard.c: Added option
> "-march=unset".
> * gcc.target/arm/cort
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> The test case gcc.target/arm/its.c was created together with restriction
> of IT blocks for Cortex-M7. As the test case fails on all tunes that
> does not match Cortex-M7, explicitly test it for Cortex-M7. To have some
> additional faith that GCC does
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
> * gcc.dg/pr41574.c: Added option "-mcpu=unset".
> * gcc.dg/pr59418.c: Likewise.
> * lib/target-supports.
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/bfloat16_scalar_1_2.c: Added option
> "-march=unset".
> * gcc.target/arm/bfloat16_sc
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/other/pr56184.C: Use effective-target
> arm_arch_v7a_neon and arm_arch_v7a_thumb.
> * g++.dg
On 19/11/2024 10:24, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/ext/pr57735.C: Use effective-target arm_cpu_xscale_arm.
>
> Signed-off-by: Torbjörn SVENSSON
> ---
>
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * g++.target/arm/mve/general-c++/nomve_fp_1.c: Added option
> "-mcpu=unset".
>
> Signed-off-by: Torbjörn S
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/thumb2-slow-flash-data-2.c: Use
> effective-target arm_arch_v7em and added option "-march=
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/small-multiply-m0-1.c: Use effective-target
> arm_arch_v6m and added option "-march=unset"
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/acle/crc_hf_1.c: Use effective-target
> arm_arch_v8a_hard and added option "-mcpu=unset".
On 19/11/2024 10:23, Torbjörn SVENSSON wrote:
> Update test cases to use -mcpu=unset/-march=unset feature introduced in
> r15-3606-g7d6c6a0d15c.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/acle/pacbti-m-predef-1.c: Use effective-target
> arm_arch_v8_1m_main.
> * gcc.target
On 18/11/2024 12:00, Christophe Lyon wrote:
> Hi Torbjörn,
>
>
> On 11/18/24 10:37, Torbjorn SVENSSON wrote:
>>
>>
>> On 2024-11-08 20:37, Torbjorn SVENSSON wrote:
>>>
>>>
>>> On 2024-11-08 12:24, Richard Earnshaw (lists) wrote:
>>
On 18/11/2024 11:13, Torbjörn SVENSSON wrote:
> Changes since v1:
>
> - Replaced fragile checks on constants with check for literal pool
> using "ldr r[0-9]+, \.L[0-9]+".
>
> Ok for trunk?
>
> --
>
> With the changes in r15-1579-g792f97b44ff, the constants have been
> updated.
> This patch dr
On 17/11/2024 23:38, Jeff Law wrote:
>
> csky fails to build libgcc after the c23 changes because it has a typedef for
> bool. AFAICT it's internal to the file, so removing the typedef isn't an ABI
> change.
>
> Similiarly for c6x which includes unwind-arm-common.inc. I suspect most, if
> no
On 12/11/2024 17:30, Martin Uecker wrote:
>
> I added a max element as suggested by Richard to force
> the type to an int.
>
> Regression tested on x86_64 but needs testing on arm-eabi.
>
> Thiago, could you test this?
>
> https://linaro.atlassian.net/browse/GNU-1224
>
>
> Fix test failur
On 08/11/2024 12:12, Torbjorn SVENSSON wrote:
On 2024-11-08 11:33, Richard Earnshaw (lists) wrote:
On 08/11/2024 08:54, Torbjörn SVENSSON wrote:
Changes since v1:
- Added generated assembler in commit message.
- Added comments in test case when each block is relevant.
Ok for trunk and
On 14/10/2024 16:28, Christophe Lyon wrote:
On 10/14/24 16:40, Torbjorn SVENSSON wrote:
Hi Christophe,
On 2024-10-14 14:16, Christophe Lyon wrote:
Hi Torbjörn,
On 10/13/24 19:37, Torbjörn SVENSSON wrote:
Ok for trunk?
--
With the changes in r15-1579-g792f97b44ff, the constants have been
On 08/11/2024 11:48, Torbjörn SVENSSON wrote:
Changes since v1:
- Clarified the commit message to include where the descision is taken
and why it's a bad idea to use "dg-do run" in a test case.
Note: This does not only fix it for arm-none-eabi. I see the same
kind of construct used by f
On 05/11/2024 20:06, Torbjörn SVENSSON wrote:
Based on how these functions are used in test cases, I think it's correct
to require 16-bit float support in both functions.
Without this change, the checks passes for armv8-m and armv8.1-m, but the
test cases that uses them fails due to the incorrec
On 06/11/2024 09:39, Torbjörn SVENSSON wrote:
Ok for trunk and releases/gcc-14?
--
Using "dg-do run" with a selector breaks testing arm-none-eabi for any
architecture when check_effective_target_arm_neon_hw returns 0.
gcc/testsuite/ChangeLog:
* g++.dg/vect/pr84556.cc: Change from "dg-
On 07/11/2024 17:15, Torbjörn SVENSSON wrote:
Ok for trunk and releases/gcc-14?
--
When building the test case with neon, the 'vst1.32' instruction is used
instead of 'strd'. Allow both variants to make the test pass.
gcc/testsuite/ChangeLog:
* gcc.target/arm/pr40457-2.c: Add vst1.32
://linaro.atlassian.net/browse/GNU-1407.
gcc/testsuite/ChangeLog:
* gcc.target/arm/pr68620.c: Use effective-target
arm_libc_fp_abi.
* lib/target-supports.exp: Define effective-target
arm_libc_fp_abi.
Signed-off-by: Torbjörn SVENSSON
Co-authored-by: Richard Earnshaw
OK.
R
1 - 100 of 1184 matches
Mail list logo
