Re: [PATCH 05/10] testsuite: aarch64: arm: Remove redundant dg-do run in advsimd-intrinsics tests

[Richard Earnshaw (lists)]

On 20/03/2025 16:15, Christophe Lyon wrote:
> Tests under advsimd-intrinsics are controlled by
> advsimd-intrinsics.exp which computes the adequate dg-do-what
> depending on the actual target, it should not be redefined in the
> tests, except when the action can never be 'run'.
> 
> This currently makes no difference, but it would when we remove
> dg-skip-if for arm targets from tests that could at least be compiled
> (e.g. vst1x2.c)
> 
>       gcc/testsuite/
> 
>       * gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: Remove
>       dg-do directive.
>       * gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vld1x3.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vst1x2.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vst1x3.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vst1x4.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
>       * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.

OK.

R.

> ---
>  .../gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c     | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c          | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c          | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c     | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c     | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c    | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c       | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c      | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c       | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c        | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c         | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c       | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c       | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c          | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c         | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c     | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c     | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c     | 1 -
>  .../gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c          | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c  | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c  | 1 -
>  gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c  | 1 -
>  120 files changed, 120 deletions(-)
> 
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
> index 3a5efa58088..7478323f7be 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
> index 16a986ac590..ebae42278ae 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
> index 4b0e24284f8..dd62e32b907 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
> index 0bebec76248..70279d21387 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
> index 68ce599719e..2e8205d547a 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
> index 1b5a09b4629..eae7189fb9d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
> index 766c783f3b0..f23900e96ca 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
> index 8f5c14b4349..a7356028277 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
> index ccfecf42999..2792c2c14a6 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
> index 161c7a04e1e..6b4e028bb69 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
> index 2d3cd8ad56a..cf446315bb2 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
> index 0d353859b4d..c95a455798c 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
> index ca23e3f0013..a8017852640 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
> index f51cac35635..9d17b05b9ac 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
> index 57901c8bd45..94e2f5d9248 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
> index 32188732deb..a1c8c504151 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
> index af6a5b64414..96200019ebc 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
> index 2084c3038c3..05cda23c653 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
> index ebfd62a1068..f567e9b58a1 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
> index a27871bbf2a..842005bf54a 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
> index 0642ae037ec..1e23056c50a 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
> index 5ae28fc11db..719769a68fa 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
> index 2d197b4eab3..77b226b24d3 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
> index 540b637fbfe..32a7f92800b 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
> index 2173a0ef4ee..a24f787c4eb 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
> index 5f17dbe9cc3..7a7617d8b08 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
> index 426700cef0b..7c6ad5a4dd3 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
> index 15832023a05..afe6c034979 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
> index 3413de021a0..6c988e6cb55 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
> index 25265d19e7a..87dcfe57a13 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
> index 9ce95581f69..944b325c392 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
> index f0adb097e8c..2756d0e5627 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
> index 74c4e60d50d..874726d4896 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
> index d308c35bea1..4ee9dc749c0 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
> index b393767b356..ef61a2442dd 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
> index 247f7c9fe68..8e725c76af2 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
> index 6e2ee500cf8..f09cab04f20 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
> index 27502c220f6..668be0f27ae 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
> index e5f57f12c6b..d3aeb696789 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
> index 188f60cafe1..c66ee58f125 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
> index cfc33c24e64..dd2dfbd7ad4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
> index 99656544533..21055dbb895 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
> index 6bff9546531..c6d84819860 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
> index c7b3d17469b..a8bb32254a4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
> index e3c5d3a0b73..a2300b4981b 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
> index d5807d74317..1de55518e6c 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
> index a904e5e472a..a5b346f2b38 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
> index ef0132a1ccd..d20e2dca6a1 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
> index f4f7b374d3e..474cd20b1dd 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
> index 7b5b16ff569..b5647490bff 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
> index db56171da3e..1e5c289cc45 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
> index 6cda3b63601..3ee21948426 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
> index cae69a34704..175bcf22aa3 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
> index dec8d857036..ef5acbbd5e6 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
> index 94c333ee44c..2f9855cb11b 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
> index 0048b5bf153..f159ac26222 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
> index 0a95cea6352..39d92ec2105 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
> index 97d5fbabb3f..fe605b525f9 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
> index 3b1b273b645..597a2e0cbd9 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
> index 5ff0d226077..d58cad8677d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
> index 105d2367175..a2a246d4f45 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
> index 290c5b13a7c..a4905b1dac2 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
> index e367dad8e5c..8e443bdefdb 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
> index d66adcd44a7..63b793bc159 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
> index 02290991a9a..b1238def1a9 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
> index c0103fb0bcf..99c3e95c758 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
> index 6a991098efd..c5b458b68bd 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
> index c9d553ac5f7..789d9e2beff 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
> index 1ac6b67ba8b..aae9a94c7d0 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
> index 00c95d3e28d..363d25fcea0 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
> index f01aefb51ad..72416dc0098 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
> index ea751da72b2..57ff6849d7b 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
> index 77021bec615..d2486f1f421 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
> index 6e56ff171f8..0892ce79118 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
> @@ -1,5 +1,4 @@
>  /* We haven't implemented these intrinsics for arm yet.  */
> -/* { dg-do run } */
>  /* { dg-skip-if "unimplemented" { arm*-*-* } } */
>  /* { dg-options "-O3" } */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
> index 42aeadf1c7d..9465e4aabb6 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
> @@ -1,5 +1,4 @@
>  /* We haven't implemented these intrinsics for arm yet.  */
> -/* { dg-do run } */
>  /* { dg-skip-if "unimplemented" { arm*-*-* } } */
>  /* { dg-options "-O3" } */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
> index 694fda86e72..a1461fd1af5 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
> @@ -1,5 +1,4 @@
>  /* We haven't implemented these intrinsics for arm yet.  */
> -/* { dg-do run } */
>  /* { dg-skip-if "unimplemented" { arm*-*-* } } */
>  /* { dg-options "-O3" } */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
> index 182463ed74e..763eb4797d7 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
> index 4db4b84885e..5242d553646 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
> index ce9872f260b..3b12e621c0d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
> index 39c48977c86..bcb56fe5ac2 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
> index d8efbcac693..9ee302fef58 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
> index f6b02161fa4..e70bc6cf918 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
> index b7c51011da5..1910d9f425c 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
> index c454a530192..3ab54326078 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
> index 1719d562671..d470308f8b4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
> index 09684d24d3c..85fe6873d37 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
> index 4cd5c37c632..fe7cc84ddd4 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
> index 51bbead3f2a..1b5b8695038 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
> index f90a36d1cd3..2a4f24fb7c6 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
> index 140647b453d..d1fd3164a5c 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
> index 66c744ce1c0..1c85773eeef 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
> index 90a5be8de4f..d2df24cac1c 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
> index 421d8277fd3..37ce039af6d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
> index c8df67757e0..df3b83d5d17 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
> index 6ebe0743cc4..07d873d5fb3 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
> index 49d319d0181..e8f464d12b8 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
> index 8d06f113dc8..5a3ea62878f 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
> index e8235fe9693..80c66fd6fe2 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
> index 3740d6afa68..f0d0da78f72 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
> index 3e6b24e4378..9dd8981ee4d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
> index fc02b6b7760..9593b18a527 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
> index bcf47f658d3..6b40e29cc73 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
> index 3c4649eb19f..691fcd7ec85 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
> index 7a4620bc894..1c596b0ea8d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
> index 4a7b721a511..6cbcf7c74ea 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
> index 9af357dbd4a..7accb45af87 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
> index eb4b27dda94..bc841b55225 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
> index 3fa9749cbf3..856a661e550 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
> index eb4b27dda94..bc841b55225 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
> index 7c0e6195be6..02d8bb7bc22 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
> index a9753a4df06..b32c44cdef2 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
> index 82249a79828..77f9460d61d 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_neon } */
>  /* { dg-skip-if "" { arm*-*-* } } */
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
> index 7d038277782..89b910cebf9 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
> index 69be40a444a..3cf5eb3bd7e 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
> @@ -1,5 +1,4 @@
>  /* We haven't implemented these intrinsics for arm yet.  */
> -/* { dg-do run } */
>  /* { dg-skip-if "unimplemented" { arm*-*-* } } */
>  /* { dg-options "-O3" } */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
> index 4d42bccec3c..c05f8e73e64 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
> @@ -1,5 +1,4 @@
>  /* We haven't implemented these intrinsics for arm yet.  */
> -/* { dg-do run } */
>  /* { dg-skip-if "unimplemented" { arm*-*-* } } */
>  /* { dg-options "-O3" } */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
> index ddc7fa59465..a9867c312cf 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
> @@ -1,5 +1,4 @@
>  /* We haven't implemented these intrinsics for arm yet.  */
> -/* { dg-do run } */
>  /* { dg-skip-if "unimplemented" { arm*-*-* } } */
>  /* { dg-options "-O3" } */
>  
> diff --git 
> a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
> index a7aba11aaff..d24a599ab26 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
>  /* { dg-add-options arm_v8_2a_fp16_scalar }  */
>  
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
> index 6debfe5bf56..c9485c360d5 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
> index fe35e158b56..12ae8b0d5a1 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c 
> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
> index 59141927ce8..65bc1408531 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
> @@ -1,4 +1,3 @@
> -/* { dg-do run } */
>  /* { dg-skip-if "" { arm*-*-* } } */
>  
>  #include <arm_neon.h>