Re: [PATCH v2 00/12] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

Hi Jakub, Just wanted to add that I'm sorry for the delay in respinning the patchset - I was caught up with another piece of work. Thanks for the reviews so far and thank you for your patience. Thanks, Tejas. On 10/18/24 11:52 AM, Tejas Belagod wrote: The following patch series is reworked

[PATCH v2 08/12] libgomp, AArch64: Test OpenMP uniform clause on SVE types.

This patch tests if simd uniform clause works with SVE types in simd regions. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/simd-uniform.c: New. --- .../libgomp.target/aarch64/simd-uniform.c | 83 +++ 1 file changed, 83 insertions(+) create mode 100644 libgomp

[PATCH v2 04/12] AArch64: Diagnose OpenMP offloading when SVE types involved.

The target clause in OpenMP is used to offload loop kernels to accelarator peripeherals. target's 'map' clause is used to move data from and to the accelarator. When the data is SVE type, it may not be suitable because of various reasons i.e. the two SVE targets may not agree on vector size or so

[PATCH v2 02/12] libgomp, AArch64: Add test cases for SVE types in OpenMP shared clause.

This patch adds a test scaffold for OpenMP compile tests in under the gcc.target testsuite. It also adds a target tests directory libgomp.target along with an SVE execution test gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/omp/gomp.exp: New scaffold. libgomp/ChangeLog: * t

[PATCH v2 05/12] libgomp, AArch64: Test OpenMP lastprivate clause for various constructs.

This patch tests various OpenMP lastprivate clause with SVE object types in various construct contexts. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/omp/lastprivate.c: New test. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/lastprivate.c: New test. --- .../gcc.targ

[PATCH v2 12/12] AArch64: Diagnose SVE type objects when applied to OpenMP doacross clause.

This patch tests if SVE type objects when applied to doacross clause are correctly diagnosed. gcc/testsuite/ChangeLog * gcc.target/aarch64/sve/omp/doacross.c: New test. --- .../gcc.target/aarch64/sve/omp/doacross.c | 22 +++ 1 file changed, 22 insertions(+) create mo

[PATCH v2 11/12] libgomp, AArch64: Test OpenMP depend clause and its variations on SVE types

This patch adds a test to test depend clause and its various dependency variations with SVE type objects. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/depend-1.c: New. --- .../libgomp.target/aarch64/depend-1.c | 223 ++ 1 file changed, 223 insertions(+)

[PATCH v2 00/12] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

The following patch series is reworked from its first version based on Jakub's review comments in https://gcc.gnu.org/pipermail/gcc-patches/2024-August/659540.html The changes in v2: 1. Moved all execute tests to under libgomp/testsuite/libgomp.target/aarch64/. 2. Retained gcc/testsuite/gcc.

[PATCH v2 07/12] libgomp, AArch64: Test OpenMP user-defined reductions with SVE types.

This patch tests user-defined reductions on various constructs with objects of SVE type. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/udr-sve.c: New. --- .../libgomp.target/aarch64/udr-sve.c | 108 ++ 1 file changed, 108 insertions(+) create mode 100644

[PATCH v2 10/12] AArch64: Diagnose OpenMP linear clause for SVE type objects.

This patch tests if SVE object types if applied to linear clause is diagnosed as expected. gcc/testsuite/ChangeLog * gcc.target/aarch64/sve/omp/linear.c: New test. --- .../gcc.target/aarch64/sve/omp/linear.c | 85 +++ 1 file changed, 85 insertions(+) create mode 10

[PATCH v2 06/12] libgomp, AArch64: Test OpenMP threadprivate clause on SVE type.

This patch adds a test for ensuring threadprivate clause works for SVE type objects. libgomp/ChangeLog: * testsuite/libgomp.target/aarch64/threadprivate.c: New test. --- .../libgomp.target/aarch64/threadprivate.c| 48 +++ 1 file changed, 48 insertions(+) create mode

[PATCH v2 03/12] [tree] Add function to strip pointer type and get down to the actual pointee type.

Add a function to traverse down the pointer layers to the pointee type. gcc/ChangeLog: * tree.h (strip_pointer_types): New. --- gcc/tree.h | 9 + 1 file changed, 9 insertions(+) diff --git a/gcc/tree.h b/gcc/tree.h index 75efc760a16..e2b4dd36444 100644 --- a/gcc/tree.h +++ b/gcc/

[PATCH v2 01/12] OpenMP/PolyInt: Pass poly-int structures by address to OMP libs.

Currently poly-int type structures are passed by value to OpenMP runtime functions for shared clauses etc. This patch improves on this by passing around poly-int structures by address to avoid copy-overhead. gcc/ChangeLog * omp-low.c (use_pointer_for_field): Use pointer if the OMP data

RE: [PATCH] i386: Refactor get_intel_cpu

> From: Uros Bizjak > Sent: Friday, October 18, 2024 2:05 PM > > On Fri, Oct 18, 2024 at 4:56 AM Haochen Jiang > wrote: > > > > Hi all, > > > > ISE054 has just been disclosed and you can find doc from here: > > > > https://cdrdv2.intel.com/v1/dl/getContent/671368 > > > > From ISE, it shows that

Re: [PATCH] i386: Refactor get_intel_cpu

On Fri, Oct 18, 2024 at 4:56 AM Haochen Jiang wrote: > > Hi all, > > ISE054 has just been disclosed and you can find doc from here: > > https://cdrdv2.intel.com/v1/dl/getContent/671368 > > From ISE, it shows that we will have family 0x13 for Diamond Rapids. > Therefore, we need to refactor the get

Re: [PATCH v11] ada: fix timeval timespec on 32 bits archs with 64 bits time_t [PR114065]

> > > It may be surprising to have the RTEMS file used by other OS. The > > > original comment should have mentionned that in the first place, but > > > the file was only used with RTEMS. With your change, the file is > > > effectively shared, so it would be best to rename it. > > > > Could you pl

[PATCH] i386: Refactor get_intel_cpu

Hi all, ISE054 has just been disclosed and you can find doc from here: https://cdrdv2.intel.com/v1/dl/getContent/671368 >From ISE, it shows that we will have family 0x13 for Diamond Rapids. Therefore, we need to refactor the get_intel_cpu to accept new families. Also I did some reorder in the sw

Re: [PATCH] target: Fix asm codegen for vfpclasss* and vcvtph2* instructions

On Fri, Oct 18, 2024 at 9:08 AM Antoni Boucher wrote: > > Hi. > This is a patch for the bug 116725. > I'm not sure if it is a good fix, but it seems to do the job. > If you have suggestions for better comments than what I wrote that would > explain what's happening, I'm open to suggestions. >@@ -

[PATCH] target: Fix asm codegen for vfpclasss* and vcvtph2* instructions

Hi. This is a patch for the bug 116725. I'm not sure if it is a good fix, but it seems to do the job. If you have suggestions for better comments than what I wrote that would explain what's happening, I'm open to suggestions. Here are the tests results: === gcc Summary === # o

[PATCH] c++: redundant hashing in register_specialization

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- After r15-4050-g5dad738c1dd164 register_specialization needs to set elt.hash to the (maybe) precomputed hash in order to avoid redundantly rehashing. gcc/cp/ChangeLog: * pt.cc (register_specializati

Re: [PATCH] Add fancy pointer support in std::map/set

On Thu, 17 Oct 2024 at 21:39, Jonathan Wakely wrote: > > > On Thu, 17 Oct 2024 at 20:52, François Dumont > wrote: > >> Here is an updated version that compiles, I think, all your feedbacks. >> It's much cleaner indeed. >> > > Thanks, I'll take a look tomorrow. > > >> It's also tested in C++98/17

Re: [patch, fortran] Fix ICE with use of INT32 et al from ISO_FORTRAN_ENV

On 10/17/24 12:52 PM, Thomas Koenig wrote: Hello world, The attached patch fixes an ICE when an UNSIGNED-specific constant is used from ISO_FORTRAN_ENV.  The error message is not particularly great, it is Error: Unsigned: The symbol 'uint32', referenced at (1), is not in the selected standard

PR105361 Fix of testcase

Pushed as stated in the PR to cleanup the test case. commit 6604a05fa27bc21c3409e767552daca3fcf43964 (HEAD -> master, origin/master, origin/HEAD) Author: Jerry DeLisle Date: Thu Oct 17 13:39:09 2024 -0700 Fortran: Add tolerance to real value comparisons. gcc/testsuite/ChangeLog:

Re: [PATCH] Add fancy pointer support in std::map/set

On Thu, 17 Oct 2024 at 20:52, François Dumont wrote: > Here is an updated version that compiles, I think, all your feedbacks. > It's much cleaner indeed. > Thanks, I'll take a look tomorrow. > It's also tested in C++98/17/23. > > I'm surprised that we do not need to consider potential > alloca

Re: [PATCH] AArch64: Remove redundant check in aarch64_simd_mov

FWIW, I definitely agree about the spuriousness of the V2DI mode check. While I can't approve, I can confirm it looks good. Thanks, Victor. On 10/17/24 16:10, Wilco Dijkstra wrote: The split condition in aarch64_simd_mov uses aarch64_simd_special_constant_p. While doing the split, it checks

Re: [PATCH] rs6000, fix test builtins-1-p10-runnable.c

Ping 2 On 10/9/24 7:43 AM, Carl Love wrote: Ping, FYI this is a fairly simple fix to a testcase. On 10/3/24 8:11 AM, Carl Love wrote: GCC maintainers: The builtins-1-10-runnable.c has the debugging inadvertently enabled.  The test uses #ifdef to enable/disable the debugging. Unfortunately

Re: [PATCH ver2 0/4] rs6000, remove redundant built-ins and add more test cases

Ping 2 On 10/9/24 7:44 AM, Carl Love wrote: Ping On 10/1/24 8:12 AM, Carl Love wrote: GCC maintainers: The following version 2 of a series of patches for PowerPC removes some built-ins that are covered by existing overloaded built-ins. Additionally, there are patches to add missing test

libgo: fix for C23 nullptr keyword

Making GCC default to -std=gnu23 for C code produces Go test failures because of C code used by Go that uses a variable called nullptr, which is a keyword in C23. I've submitted this fix upstream at https://github.com/golang/go/pull/69927 using the GitHub mirror workflow. Ian, once some form

Re: [PATCH] libstdc++: Move std::__niter_base and std::__niter_wrap to stl_iterator.h

On Thu, 17 Oct 2024, Jonathan Wakely wrote: > I've split this out of "Refactor std::uninitialized_{copy, fill, fill_n}" > because this part can be done separately. Call it [PATCH -1/7] if you > like :-) > > This fixes the ordering problem that Patrick noticed in [PATCH 1/7], and > adds a test for

Re: [PATCH] Add fancy pointer support in std::map/set

Here is an updated version that compiles, I think, all your feedbacks. It's much cleaner indeed. It's also tested in C++98/17/23. I'm surprised that we do not need to consider potential allocator::const_pointer. Is there a plan to deprecate it ? And if not, should not alloc traits const_poin

[patch, fortran] Fix ICE with use of INT32 et al from ISO_FORTRAN_ENV

Hello world, The attached patch fixes an ICE when an UNSIGNED-specific constant is used from ISO_FORTRAN_ENV. The error message is not particularly great, it is Error: Unsigned: The symbol 'uint32', referenced at (1), is not in the selected standard but it is better than an ICE. OK for trun

[PATCH] libstdc++: Move std::__niter_base and std::__niter_wrap to stl_iterator.h

I've split this out of "Refactor std::uninitialized_{copy, fill, fill_n}" because this part can be done separately. Call it [PATCH -1/7] if you like :-) This fixes the ordering problem that Patrick noticed in [PATCH 1/7], and adds a test for it. It also updates the comments as was previously done

Re: [PATCH v2] contrib/: Configure git-format-patch(1) to add To: gcc-patches@gcc.gnu.org

On Thu, Oct 17, 2024 at 10:54 AM Alejandro Colomar wrote: > > Just like we already do for git-send-email(1). In some cases, patches > are prepared with git-format-patch(1), but are sent with a different > program, or some flags to git-send-email(1) may accidentally inhibit the > configuration. B

Re: [PATCH 5/5] libgm2/libm2pim/wrapc.cc: Define NULL as nullptr

Alejandro Colomar writes: > For internal C++ code, unconditionally define NULL as nullptr. > We already require a C++11 compiler to bootstrap GCC anyway. > > Link: > Signed-off-by: Alejandro Colomar > --- > libgm2/libm2pim/wrapc.cc | 4 +--- > 1 file

Re: [PATCH v1 3/4] aarch64: improve assembly debug comments for build attributes

Matthieu Longo writes: > On 2024-10-08 18:45, Richard Sandiford wrote: >> However... >> >>> + return s; >> >> ...we are unfortunately limited to C++11 constexprs, so I think this needs >> to be: >> >>return (t == uleb128 ? "ULEB128" >>: t == asciz ? "asciz" >>: null

Re: [PATCH v2 9/9] aarch64: Handle alignment when it is bigger than BIGGEST_ALIGNMENT

Evgeny Karpov writes: > Thursday, September 19, 2024 > Richard Sandiford wrote: > >>> For instance: >>> float __attribute__((aligned (32))) large_aligned_array[3]; >>> >>> BIGGEST_ALIGNMENT could be up to 512 bits on x64. >>> This patch has been added to cover this case without needing to >>> cha

Re: [RFC][PATCH] AArch64: Remove AARCH64_EXTRA_TUNE_USE_NEW_VECTOR_COSTS

Jennifer Schmitz writes: > [...] > Looking at the diff of the vect dumps (below is a section of the diff for > strided_store_2.c), it seemed odd that vec_to_scalar operations cost 0 now, > instead of the previous cost of 2: > > +strided_store_1.c:38:151: note:=== vectorizable_operation === >

Re: [PATCH 2/2] c++: constrained auto NTTP vs associated constraints

On Thu, 17 Oct 2024, Patrick Palka wrote: > On Tue, 15 Oct 2024, Patrick Palka wrote: > > > On Tue, 15 Oct 2024, Patrick Palka wrote: > > > > > According to [temp.param]/11, the constraint on an auto NTTP is an > > > associated constraint and so should be checked as part of satisfaction > > > of

Re: [PATCH] SVE intrinsics: Add fold_active_lanes_to method to refactor svmul and svdiv.

Jennifer Schmitz writes: >> On 16 Oct 2024, at 21:16, Richard Sandiford >> wrote: >> >> External email: Use caution opening links or attachments >> >> >> Jennifer Schmitz writes: >>> As suggested in >>> https://gcc.gnu.org/pipermail/gcc-patches/2024-September/663275.html, >>> this patch adds

RE: [PATCH 2/2] Add a new permute optimization step in SLP

Hi Christoph, > -Original Message- > From: Christoph Müllner > Sent: Tuesday, October 15, 2024 3:57 PM > To: gcc-patches@gcc.gnu.org; Philipp Tomsich ; Tamar > Christina ; Richard Biener > Cc: Jeff Law ; Robin Dapp ; > Christoph Müllner > Subject: [PATCH 2/2] Add a new permute optimizat

Re: [PATCH 3/3] aarch64: libgcc: Add -Werror support

On Thu, 17 Oct 2024 at 15:06, Richard Sandiford wrote: > > Richard Sandiford writes: > > Christophe Lyon writes: > >> When --enable-werror is enabled when running the top-level configure, > >> it passes --enable-werror-always to subdirs. Some of them, like > >> libgcc, ignore it. > >> > >> This

Re: Frontend access to target features (was Re: [PATCH] libgccjit: Add ability to get CPU features)

Hi. Thanks for the review, David! I talked to Arthur and he's OK with having a file to include in both gccrs and libgccjit. I sent the patch to gccrs to move the code in a new file that we can include in both frontends: https://github.com/Rust-GCC/gccrs/pull/3195 I also renamed gcc_jit_targ

[PATCH] AArch64: Remove redundant check in aarch64_simd_mov

The split condition in aarch64_simd_mov uses aarch64_simd_special_constant_p. While doing the split, it checks the mode before calling aarch64_maybe_generate_simd_constant. This risky since it may result in unexpectedly calling aarch64_split_simd_move instead of aarch64_maybe_generate_simd_con

[committed] tree-object-size: Fall back to wholesize for non-const offset

Sorry I had missed calling the test case itself, so fixed that up, rebased on master and committed. ->8-- Don't bail out early if the offset to a pointer in __builtin_object_size is a variable, return the wholesize instead since that is a better fallback for maximum estimate. This should

Re: [PATCH v2] contrib/: Configure git-format-patch(1) to add To: gcc-patches@gcc.gnu.org

On Thu, Oct 17, 2024 at 04:54:04PM GMT, Alejandro Colomar wrote: > Just like we already do for git-send-email(1). In some cases, patches > are prepared with git-format-patch(1), but are sent with a different > program, or some flags to git-send-email(1) may accidentally inhibit the > configuration

[PATCH v2] contrib/: Configure git-format-patch(1) to add To: gcc-patches@gcc.gnu.org

Just like we already do for git-send-email(1). In some cases, patches are prepared with git-format-patch(1), but are sent with a different program, or some flags to git-send-email(1) may accidentally inhibit the configuration. By adding the TO in the email file, we make sure that gcc-patches@ wil

RE: [PATCH 1/2] Reduce lane utilization in VEC_PERM_EXPRs for two_operator nodes

Hi Christoph, > -Original Message- > From: Christoph Müllner > Sent: Tuesday, October 15, 2024 3:57 PM > To: gcc-patches@gcc.gnu.org; Philipp Tomsich ; Tamar > Christina ; Richard Biener > Cc: Jeff Law ; Robin Dapp ; > Christoph Müllner > Subject: [PATCH 1/2] Reduce lane utilization in

[PATCH v2] c++: Fix crash during NRV optimization with invalid input [PR117099, PR117129]

Hi, The issue reported in PR117129 is pretty similar to the one in PR117099, so here’s an updated version of the patch that fixes both issues, by ensuring that finish_return_expr sets current_function_return_value to error_mark_node in case of error with said return value. Successfully tested on

Re: [SH][committed] PR 113533

On Mon, 2024-10-14 at 11:37 +0900, Oleg Endo wrote: > For memory loads/stores (that contain a MEM rtx) sh_rtx_costs would wrongly > report a cost lower than 1 insn which is not accurate as it makes > loads/stores appear cheaper than simple arithmetic insns. The cost of a > load/store insn is at le

[PATCH v3] AArch64: Fix copysign patterns

The current copysign pattern has a mismatch in the predicates and constraints - operand[2] is a register_operand but also has an alternative X which allows any operand. Since it is a floating point operation, having an integer alternative makes no sense. Change the expander to always use vector i

Re: [PATCH 3/3] aarch64: libgcc: Add -Werror support

Richard Sandiford writes: > Christophe Lyon writes: >> When --enable-werror is enabled when running the top-level configure, >> it passes --enable-werror-always to subdirs. Some of them, like >> libgcc, ignore it. >> >> This patch adds support for it, enabled only for aarch64, to avoid >> breaki

[PATCH] Add --param vect-force-slp=1 to VECT_ADDITIONAL_FLAGS

This makes us also use --param vect-force-slp=1 in addition to -flto where LTO is supported. Note this only covers the subset of tests not in one of the special naming-adds-option set. Note neither g++.dg nor gfortran.dg vect.exp has VECT_ADDITIONAL_FLAGS. This is a request for comments - the te

[PATCH] Relax boolean processing in vect_maybe_update_slp_op_vectype

The following makes VECTOR_BOOLEAN_TYPE_P processing consistent with what we do without SLP. The original motivation for rejecting of VECTOR_BOOLEAN_TYPE_P extern defs was bad code generation. But the non-SLP codepath happily goes along - but always hits the case of an uniform vector and this cas

RE: [PATCH 4/4]middle-end: create the longest possible zero extend chain after overwidening

On Tue, 15 Oct 2024, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Tuesday, October 15, 2024 1:42 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd > > Subject: Re: [PATCH 4/4]middle-end: create the longest possible zero extend > > chain

Re: [PATCH 2/2] c++: constrained auto NTTP vs associated constraints

On Tue, 15 Oct 2024, Patrick Palka wrote: > On Tue, 15 Oct 2024, Patrick Palka wrote: > > > According to [temp.param]/11, the constraint on an auto NTTP is an > > associated constraint and so should be checked as part of satisfaction > > of the overall associated constraints rather than checked i

RE: [PATCH 1/4]middle-end: support multi-step zero-extends using VEC_PERM_EXPR

On Tue, 15 Oct 2024, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Tuesday, October 15, 2024 1:20 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd > > Subject: RE: [PATCH 1/4]middle-end: support multi-step zero-extends using > > VEC_PERM_

Re: [PATCH] doc: remove outdated C++ Concepts section

On 10/15/24 2:05 PM, Patrick Palka wrote: This was added as part of the initial Concepts TS implementation and reflects an early version of the Concepts TS paper, which is very different from standard C++20 concepts (and even from more recent versions of the Concepts TS, support for which we depr

[PATCH] RISC-V: override alignment of function/jump/loop

Just like what AArch64 has done. Signed-off-by: Wang Pengcheng gcc/ChangeLog: * config/riscv/riscv.cc (struct riscv_tune_param): Add new tune options. (riscv_override_options_internal): Override the default alignment when not optimizing for size. --- gcc/config/riscv/riscv.cc | 15 ++

Re: [PATCH 1/7] libstdc++: Refactor std::uninitialized_{copy, fill, fill_n} algos [PR68350]

On Thu, 17 Oct 2024 at 11:12, Jonathan Wakely wrote: > > On Thu, 17 Oct 2024 at 02:39, Patrick Palka wrote: > > > > On Tue, 15 Oct 2024, Jonathan Wakely wrote: > > > > > This is v2 of > > > https://gcc.gnu.org/pipermail/gcc-patches/2024-October/665246.html > > > fixing some thinkos in uninitializ

Re: [PATCH] RISC-V:Auto vect for vector bf16

+;; - +;; - vfwmaccbf16 +;; - +;; Combine extend + fma to widen_fma (vfwmacc) +(define_insn_and_split "*widen_bf16_fma" + [(set (match_operand:VWEXTF_ZVFB

[patch,avr,applied] Add test cases for PR116550

Added two test cases for that PR. Johann -- rtl-optimization/116550 - Add test cases. PR rtl-optimization/116550 gcc/testsuite/ * gcc.target/avr/torture/lra-pr116550-1.c: New file. * gcc.target/avr/torture/lra-pr116550-2.c: New file.rtl-optimization/116550 - Add tes

[PATCH] tree-optimization/117172 - single lane SLP for non-linear inductions

The following adds single-lane SLP support for vectorizing non-linear inductions. This fixes a bunch of i386 specific testcases with --param vect-force-slp=1. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/117172 * tree-vect-loop.cc (vectorizabl

[PATCH] [1/n] remove gcc.dg/vect special naming in favor of dg-additional-options

This kicks off removal of keying options used on testcase names as done in gcc.dg/vect as the appropriate way to do this is using dg-additional-options. Starting with two of the least used ones. This causes the moved tests to be covered by VECT_ADDITIONAL_FLAGS processing. Tested on x86_64-unkno

Re: [PATCH v4 2/7] OpenMP: middle-end support for dispatch + adjust_args

Minor follow-up comments: Paul-Antoine Arras wrote: This patch adds middle-end support for the `dispatch` construct and the `adjust_args` clause. The heavy lifting is done in `gimplify_omp_dispatch` and `gimplify_call_expr` respectively. For `adjust_args`, this mostly consists in emitting a call

Re: [PATCH 1/7] libstdc++: Refactor std::uninitialized_{copy, fill, fill_n} algos [PR68350]

On Thu, 17 Oct 2024 at 02:39, Patrick Palka wrote: > > On Tue, 15 Oct 2024, Jonathan Wakely wrote: > > > This is v2 of > > https://gcc.gnu.org/pipermail/gcc-patches/2024-October/665246.html > > fixing some thinkos in uninitialized_{fill,fill_n}. We don't need to > > worry about overwriting tail-pa

RE: [PATCH v1] Internal-fn: Add new IFN mask_len_strided_load/store

Thanks Richard for comments. > Enabling it via match.pd looks possible but also possibly sub-optimal > for costing side on the > vectorizer - supporting it directly in the vectorizer can be done later > though. Sure, will have a try in v2. Pan -Original Message- From: Richard Biener

Re: [PATCH 2/2] Only do switch bit test clustering when multiple labels point to same bb

Hi Andi, This seems like a reasonable way to avoid the specific issue in PR117091 and generally speed up switch lowering of switches with all cases unique. I cannot approve this but want to share some comments. On Wed 2024-10-16 17:50:59, Andi Kleen wrote: > diff --git a/gcc/gimple-if-to-switch.

Re: [PATCH v4] libstdc++: implement concatenation of strings and string_views

Hello, Il 17/10/24 06:32, François Dumont ha scritto: As a side note you should provide your patches as .txt files so that any email client can render it without going through an editor. Apologies for that. Do you mean I should use text/plain attachments instead of text/x-patch? And regar

Re: [PATCH v3] MATCH: Simplify `a rrotate (32-b) -> a lrotate b` [PR109906]

Hi Eikansh > On 16 Oct 2024, at 18:23, Eikansh Gupta wrote: > > The pattern `a rrotate (32-b)` should be optimized to `a lrotate b`. > The same is also true for `a lrotate (32-b)`. It can be optimized to > `a rrotate b`. > > This patch adds following patterns: > a rrotate (32-b) -> a lrotate b

Re: [PATCH] c++: Fix crash during NRV optimization with invalid input [PR117099]

Hi Sam, On 16 Oct 2024, at 22:06, Sam James wrote: > Simon Martin writes: > >> We ICE upon the following invalid code because we end up calling >> finalize_nrv_r with a RETURN_EXPR with no operand. >> >> === cut here === >> struct X { >> ~X(); >> }; >> X test(bool b) { >> { >> X x; >>

Re: [PATCH] testsuite: Fix typos for AVX10.2 convert testcases

On Thu, Oct 17, 2024 at 3:17 PM Haochen Jiang wrote: > > From: Victor Rodriguez > > Hi all, > > There are some typos in AVX10.2 vcvtne[,2]ph[b,h]f8[,s] testcases. > They will lead to type mismatch. > > Previously they are not found due to the binutils did not checkin. > > Ok for trunk? Ok. > > Th

Re: [PATCH][LRA][PR116550] Reuse scratch registers generated by LRA

чт, 17 окт. 2024 г. в 00:32, Vladimir Makarov : > > > On 10/10/24 14:32, Denis Chertykov wrote: > > > > The patch is very simple. > > On x86_64, it bootstraps+regtests fine. > > Ok for trunk? > > > Sorry for the delay with the answer. I missed your patch and pinging it > was the right thing to do.

Re: [PATCH 1/2] Disable -fbit-tests and -fjump-tables at -O0

On Thu, Oct 17, 2024 at 2:51 AM Andi Kleen wrote: > > From: Andi Kleen Instead of initializing with -1 can you Init(0) and add OPT_fjump_tables and OPT_fbit_tests to the default_options_table table in opts.cc, under OPT_LEVELS_1_PLUS_NOT_DEBUG I'd guess. Thanks, Richard. > gcc/ChangeLog: > >

Re: [PATCH RFC] build: update bootstrap req to C++14

On Wed, Oct 16, 2024 at 5:14 PM Jakub Jelinek wrote: > > On Wed, Oct 16, 2024 at 11:04:32AM -0400, Jason Merrill wrote: > > > Alternatively, systems (that care about Ada and D) running 4.7 could > > > build 10.5, systems running 4.8 could build 11.5. > > > > Here's an updated patch. I tested C++1

Re: [PATCH 3/7] libstdc++: Inline memmove optimizations for std::copy etc. [PR115444]

On Thu, 17 Oct 2024, 03:04 Patrick Palka, wrote: > On Tue, 15 Oct 2024, Jonathan Wakely wrote: > > > This is a slightly different approach to C++98 compatibility than used > > in patch 1/1 of this series for the uninitialized algos. It worked out a > > bit cleaner this way for these algos, I thin

[PATCH] testsuite: Fix typos for AVX10.2 convert testcases

From: Victor Rodriguez Hi all, There are some typos in AVX10.2 vcvtne[,2]ph[b,h]f8[,s] testcases. They will lead to type mismatch. Previously they are not found due to the binutils did not checkin. Ok for trunk? Thx, Haochen --- Fix typos related to types for vcvtne[,2]ph[b,h]f8[,s] testcas

Re: [PATCH v1] Internal-fn: Add new IFN mask_len_strided_load/store

On Thu, Oct 17, 2024 at 8:38 AM Li, Pan2 wrote: > > It is quit a while since last discussion. > I recall these materials recently and have a try in the risc-v backend. > >1 │ void foo (int * __restrict a, int * __restrict b, int stride, int n) >2 │ { >3 │ for (int i = 0; i <

Re: SVE intrinsics: Fold constant operands for svlsl.

Hi Soumya > On 17 Oct 2024, at 06:10, Soumya AR wrote: > > Hi Richard, > > Thanks for the feedback. I’ve updated the patch with the suggested change. > Ok for mainline? > > Best, > Soumya > > > On 14 Oct 2024, at 6:40 PM, Richard Sandiford > > wrote: > > > > External email: Use caution ope