Re: [PATCHv4, expand] Add const0 move checking for CLEAR_BY_PIECES optabs

On Tue, Aug 20, 2024 at 2:12 PM HAO CHEN GUI wrote: > > Hi, > Add Hongtao Liu as the patch affects x86. > > 在 2024/8/20 6:32, Richard Sandiford 写道: > > HAO CHEN GUI writes: > >> Hi, > >> This patch adds const0 move checking for CLEAR_BY_PIECES. The original > >> vec_duplicate handles duplicat

Re: [PATCHv4, expand] Add const0 move checking for CLEAR_BY_PIECES optabs

Hi, Add Hongtao Liu as the patch affects x86. 在 2024/8/20 6:32, Richard Sandiford 写道: > HAO CHEN GUI writes: >> Hi, >> This patch adds const0 move checking for CLEAR_BY_PIECES. The original >> vec_duplicate handles duplicates of non-constant inputs. But 0 is a >> constant. So even a platform

Re: Re-compute TYPE_MODE and DECL_MODE while streaming in for accelerator

> Am 19.08.2024 um 20:56 schrieb Richard Sandiford : > > Prathamesh Kulkarni writes: >> diff --git a/gcc/lto-streamer-in.cc b/gcc/lto-streamer-in.cc >> index cbf6041fd68..0420183faf8 100644 >> --- a/gcc/lto-streamer-in.cc >> +++ b/gcc/lto-streamer-in.cc >> @@ -44,6 +44,7 @@ along with GCC; se

[PATCH v4] RISC-V: Supports Profiles in '-march' option.

Supports RISC-V profiles[1] in -march option. Default input set the profile before other formal extensions. V2: Fixes some format errors and adds code comments for parse function Thanks for Jeff Law's review and comments. V3: Update testcases and profiles extensions support.Remove S/M mode Profi

[PATCH] pro

--- gcc/common/config/riscv/riscv-common.cc | 75 +++- gcc/config/riscv/riscv-subset.h | 2 + gcc/testsuite/gcc.target/riscv/arch-44.c | 5 ++ gcc/testsuite/gcc.target/riscv/arch-45.c | 12 gcc/testsuite/gcc.target/riscv/arch-46.c | 12 5 files changed, 10

RE: [PATCH v2] Match: Support form 1 for scalar signed integer .SAT_ADD

Kindly ping. Pan -Original Message- From: Li, Pan2 Sent: Wednesday, August 7, 2024 5:31 PM To: gcc-patches@gcc.gnu.org Cc: richard.guent...@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com; Li, Pan2 Subject: [PATCH v2] Match: Support fo

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

Thanks Jakub and Tamar for comments and suggestions. The match.pd list as below doesn't check the INT_CST type for .SAT_ADD. (match (unsigned_integer_sat_add @0 @1) (cond^ (ne (imagpart (IFN_ADD_OVERFLOW@2 @0 INTEGER_CST@1)) integer_zerop) integer_minus_onep (realpart @2)) (if (INTEGRAL_TYPE_

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2

Great! Thanks Patrick. Pan -Original Message- From: Patrick O'Neill Sent: Tuesday, August 20, 2024 12:14 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com; Jeff Law Subject: Re: [PATCH v1 1/2] RISC-V: Add testcases for unsign

Re: [PATCH] c++/modules: Fix type lookup in DECL_TEMPLATE_INSTANTIATIONS [PR116364]

On 8/15/24 7:55 AM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? OK. -- >8 -- We need to use the DECL_TEMPLATE_INSTANTIATIONS property to find reachable specialisations from a template to ensure that any GM specialisations are properly marked as rea

Re: [PATCH] c++: Appertain standard attributes after array closing square bracket to array type rather than declarator [PR110345]

On 8/15/24 4:53 PM, Jakub Jelinek wrote: Hi! For C++ 26 P2552R3 I went through all the spots (except modules) where attribute-specifier-seq appears in the grammar and tried to construct a testcase in all those spots, for now for [[deprecated]] attribute. This is the second issue I found. The c

Re: FIXED_REGISTERS / ira_no_alloc_regs: aarch64 vs. risc-v (was Re: sched1 pathology on RISC-V : PR/114729)

On 8/19/24 14:52, Richard Sandiford wrote: >> 2. On RISC-V sched1 is counter intuitively assuming HARD_FP is live due to >> the weird interaction of DF infra (which always marks HARD_FP with >> artificial def) and ira_no_alloc_regs. > In general, it isn't possible to predict at this stage whether

Re: [PATCHv4, expand] Add const0 move checking for CLEAR_BY_PIECES optabs

HAO CHEN GUI writes: > Hi, > This patch adds const0 move checking for CLEAR_BY_PIECES. The original > vec_duplicate handles duplicates of non-constant inputs. But 0 is a > constant. So even a platform doesn't support vec_duplicate, it could > still do clear by pieces if it supports const0 move b

Re: [wwwdocs] porting_to: Two-stage overload resolution for implicit move removed

On Mon, Aug 19, 2024 at 10:34:20PM +0100, Jonathan Wakely wrote: > On Mon, 19 Aug 2024 at 21:51, Gerald Pfeifer wrote: > > > > On Wed, 12 Oct 2022, Marek Polacek via Gcc-patches wrote: > > > + > > > +The two overload resolutions approach was complicated and quirky, so > > > users > > > +should tr

Re: FIXED_REGISTERS / ira_no_alloc_regs: aarch64 vs. risc-v (was Re: sched1 pathology on RISC-V : PR/114729)

Vineet Gupta writes: > On 8/6/24 17:36, Vineet Gupta wrote: >> I'm currently pursuing a different trail which comes form observation >> that initial model setup concludes that pressure is 28 so with 27 >> allocable regs we are bound to spill one. >> More on that after I find something concrete. >

Re: [wwwdocs] porting_to: Two-stage overload resolution for implicit move removed

On Mon, 19 Aug 2024 at 22:34, Jonathan Wakely wrote: > > On Mon, 19 Aug 2024 at 21:51, Gerald Pfeifer wrote: > > > > On Wed, 12 Oct 2022, Marek Polacek via Gcc-patches wrote: > > > + > > > +The two overload resolutions approach was complicated and quirky, so > > > users > > > +should transition

Re: [wwwdocs] porting_to: Two-stage overload resolution for implicit move removed

On Mon, 19 Aug 2024 at 21:51, Gerald Pfeifer wrote: > > On Wed, 12 Oct 2022, Marek Polacek via Gcc-patches wrote: > > + > > +The two overload resolutions approach was complicated and quirky, so users > > +should transition to the newer model. This change means that code that > > +previously didn'

Re: [PATCH] c++: Allow standard attributes after closing square bracket in new-type-id [PR110345]

On 8/15/24 4:53 PM, Jakub Jelinek wrote: Hi! For C++ 26 P2552R3 I went through all the spots (except modules) where attribute-specifier-seq appears in the grammar and tried to construct a testcase in all those spots, for now for [[deprecated]] attribute. The first thing I found is that we aren'

Re: [PATCH] c++: Parse and ignore attributes on base specifiers [PR110345]

On 8/15/24 4:53 PM, Jakub Jelinek wrote: Hi! For C++ 26 P2552R3 I went through all the spots (except modules) where attribute-specifier-seq appears in the grammar and tried to construct a testcase in all those spots, for now for [[deprecated]] attribute. This is the third issue I found. https:

Re: [RFC PATCH] c++: Disallow [[deprecated]] on types other than class/enum definitions [PR110345]

On 8/15/24 5:13 PM, Jakub Jelinek wrote: Hi! For C++ 26 P2552R3 I went through all the spots (except modules) where attribute-specifier-seq appears in the grammar and tried to construct a testcase in all those spots, for now for [[deprecated]] attribute. The patch below contains that testcase.

Re: New version of unsiged patch

On Sun, Aug 18, 2024 at 12:10:18PM +0200, Thomas Koenig wrote: > > this version of the patch includes DOT_PRODUCT, MATMUL and quite > a few improvements for simplification. Thomas, Your updated patch applied cleanly on top-of-tree gcc. Bootstrap and regression testing on amd64-*-freebsd comple

Re: [wwwdocs] porting_to: Two-stage overload resolution for implicit move removed

On Mon, Aug 19, 2024 at 10:51:28PM +0200, Gerald Pfeifer wrote: > On Wed, 12 Oct 2022, Marek Polacek via Gcc-patches wrote: > > + > > +The two overload resolutions approach was complicated and quirky, so users > > +should transition to the newer model. This change means that code that > > +previou

Re: [wwwdocs] porting_to: Two-stage overload resolution for implicit move removed

On Wed, 12 Oct 2022, Marek Polacek via Gcc-patches wrote: > + > +The two overload resolutions approach was complicated and quirky, so users > +should transition to the newer model. This change means that code that > +previously didn't compile in C++17 will now compile, for example: I looked at th

FIXED_REGISTERS / ira_no_alloc_regs: aarch64 vs. risc-v (was Re: sched1 pathology on RISC-V : PR/114729)

On 8/6/24 17:36, Vineet Gupta wrote: > I'm currently pursuing a different trail which comes form observation > that initial model setup concludes that pressure is 28 so with 27 > allocable regs we are bound to spill one. > More on that after I find something concrete. (caveat: I enabled -fomit-fra

[PATCH] sra: Avoid risking x87 magling binary representation of a replacement (PR 58416)

Hi, PR 58416 shows that storing non-floating point data to floating point scalar registers can lead to miscompilations when the data is normalized or otherwise processed upon loading to a register. To avoid that risk, this patch detects situations where we have multiple types and a we decide to r

Re: [PATCH] RISC-V: Remove testcase XFAIL

On 8/19/24 2:14 PM, Edwin Lu wrote: The testcase has been modified to include the -fwrapv flag which now causes the test to pass. Remove the xfail exception gcc/testsuite/ChangeLog: * gcc.dg/signbit-5.c: Remove riscv xfail exception OK jeff

[PATCH] RISC-V: Remove testcase XFAIL

The testcase has been modified to include the -fwrapv flag which now causes the test to pass. Remove the xfail exception gcc/testsuite/ChangeLog: * gcc.dg/signbit-5.c: Remove riscv xfail exception Signed-off-by: Edwin Lu --- gcc/testsuite/gcc.dg/signbit-5.c | 1 - 1 file changed, 1 del

m68k: Add -mlra

PR target/113939 * config/m68k/m68k.opt (mlra): New target option. * config/m68k/m68k.cc (m68k_use_lra_p): New function. (TARGET_LRA_P): Use it. * config/m68k/m68k.opt.urls: Regenerate. --- gcc/config/m68k/m68k.cc | 11 ++- gcc/config/m68k/m68k

Re: [PATCH v2 10/10] fortran: Add -finline-intrinsics flag for MINLOC/MAXLOC [PR90608]

Hi Mikael, apart from patch #04/10, which did not apply cleanly here, I was able to test your patch. It seems to work with a manual workaround (-fno-frontend-optimize) to work around this problem. Might be a local issue... That said, it works as advertised. Thanks for separating out the IEEE-N

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

> -Original Message- > From: Jakub Jelinek > Sent: Monday, August 19, 2024 8:25 PM > To: Tamar Christina > Cc: Li, Pan2 ; Richard Biener ; > gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; > jeffreya...@gmail.com; rdapp@gmail.com; Liu, Hongtao > > Subject: Re: [P

Re: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

On Mon, Aug 19, 2024 at 01:55:38PM +, Tamar Christina wrote: > So would this not be the simplest fix: > > diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc > index 87b3dc413b8..fcbc83a49f0 100644 > --- a/gcc/tree-vect-patterns.cc > +++ b/gcc/tree-vect-patterns.cc > @@ -4558,6

Re: [PATCH v3 01/12] OpenMP: metadirective tree data structures and front-end interfaces

On 8/9/24 10:42, Jakub Jelinek wrote: Why needs omp-general.h the move in GTFILES etc.? Will just moving those definitions be ok? I just double-checked that. The Makefile.in change to reorder omp-general.h in GTFILES is because of moving the definition of score_wide_int there from omp-gene

Re: [PATCH] PR tree-optimization/101390: Vectorize modulo operator

Jennifer Schmitz writes: > Thanks for the comments. I updated the patch accordingly and bootstrapped and > tested again. > Best, Jennifer > > From 9ef423f23afaeaa650d511c51bbc1a167e40b349 Mon Sep 17 00:00:00 2001 > From: Jennifer Schmitz > Date: Wed, 7 Aug 2024 08:56:45 -0700 > Subject: [PATCH]

Re: Re-compute TYPE_MODE and DECL_MODE while streaming in for accelerator

Prathamesh Kulkarni writes: > diff --git a/gcc/lto-streamer-in.cc b/gcc/lto-streamer-in.cc > index cbf6041fd68..0420183faf8 100644 > --- a/gcc/lto-streamer-in.cc > +++ b/gcc/lto-streamer-in.cc > @@ -44,6 +44,7 @@ along with GCC; see the file COPYING3. If not see > #include "debug.h" > #include

[PATCH 2/2] phiopt: Reject non gimple val inside factor_out_conditional_operation [PR116412]

After the conversion to use maybe_push_res_to_seq, sometimes (REALPART_EXPR and IMAGPART_EXPR and VCE) the argument will not be a gimple value and then phiopt here would create an invalid PHI. Just add a check for gimple val is the way to fix this. Bootstrapped and tested on x86_64-linux-gnu.

[PATCH 1/2] phi-opt: Fix for non-const functions for factor_out_conditional_operation [PR 116409]

Currently maybe_push_res_to_seq does not handle non-const builtins (it does handle internal functions though). So we need to disable factoring out non-const builtins. This will be fixed in a better way later but this fixes the regression at hand and does not change what was goal on moving factor

[PATCH v2] RISC-V: Enable -gvariable-location-views by default

This affects only the RISC-V targets, where the compiler options -gvariable-location-views and consequently also -ginline-points are disabled by default, which is unexpected and disables some useful features of the generated debug info. Due to a bug in the gas assembler the .loc statement is not u

Re: [PATCH] c++/modules: Avoid rechecking initializers when streaming NTTPs [PR116382]

On 8/16/24 2:55 AM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? Maybe also skip the unshare_constructor when !check_init? OK either way. -- >8 -- When reading an NTTP we call get_template_parm_object which delegates setting of DECL_INITIAL to the

Re: [PATCH v2] c++: Ensure ANNOTATE_EXPRs remain outermost expressions in conditions [PR116140]

On 8/16/24 7:20 AM, Alex Coplan wrote: On 16/08/2024 12:47, Jakub Jelinek wrote: On Fri, Aug 16, 2024 at 11:38:03AM +0100, Alex Coplan wrote: Looking at the calls to build3 (ANNOTATE_EXPR, ...) in cp/semantics.cc, it looks like the other two operands of ANNOTATE_EXPRs are only ever INTEGER_CSTs

Re: [PATCH] c++: ICE with enum and conversion fn in template [PR115657]

On 8/16/24 9:44 AM, Marek Polacek wrote: Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? OK. -- >8 -- Here we initialize an enumerator with a class prvalue with a conversion function. When we fold it in build_enumerator, we create a TARGET_EXPR for the object, and subsequently c

Re: [PATCH] c++: default targ eligibility refinement [PR101463]

On 8/16/24 12:00 PM, Patrick Palka wrote: Here during default template argument substitution we wrongly consider the (substituted) default arguments v and vt as value-dependent[1] which ultimately leads to deduction failure for the calls. The bogus value_dependent_expression_p result aside, I no

Re: [PATCH] c++: fix ICE in convert_nontype_argument [PR116384]

On 8/16/24 4:07 PM, Marek Polacek wrote: Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? OK for trunk and 14. -- >8 -- Here we ICE since r14-8291 in C++11/C++14 modes. Fortunately this is an easy one. The important bit of r14-8291 is this: @@ -20056,9 +20071,12 @@ tsubst_expr

Re: [PATCH] c++/modules: Disable streaming definitions of non-vague-linkage GMF decls [PR115020]

On 8/17/24 8:51 AM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? -- >8 -- The error in the linked PR is caused because 'DECL_THIS_STATIC' is true for the static member function, causing the streaming code to assume that this is an internal linkage GM e

Re: [PATCH] c++/modules: Handle transitive reachability for deduction guides [PR116403]

On 8/17/24 9:45 PM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? OK. -- >8 -- Currently we implement [temp.deduct.guide] p1 by forcing all deduction guides to be considered as exported. However this is not sufficient: for transitive non-exported im

Re: [PATCH] c++/modules: Slightly clean up error for referencing TU-local entity

On 8/18/24 8:11 AM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? Or should we even just remove the warning entirely? I'm not sure it really adds all that much, since it's usual AFAICT for errors to prevent the intended outputs from being generated. A

Re: [PATCH v10 1/3] gcc/: Rename array_type_nelts() => array_type_nelts_minus_one()

On 8/19/24 6:58 AM, Alejandro Colomar wrote: The old name was misleading. While at it, also rename some temporary variables that are used with this function, for consistency. Link: https://inbox.sourceware.org/gcc-patches/9fffd80-dca-2c7e-14b-6c9b509a7...@redhat.com/T/#m2f661c67c8f7b2c405c8c7f

Re: [PATCH v3] Improve bad error message with stray semicolon in initializer (and related) [PR101232]

On 8/19/24 12:01 PM, Jason Merrill wrote: On 8/19/24 6:01 AM, Jonathan Wakely wrote: On 05/08/24 09:32 +0200, Franciszek Witt wrote: Author: Franciszek Witt Date:   Mon Aug 5 09:00:35 2024 +0200    c++: [PR101232] The line above should be the first line of your Git commit message, which sho

Re: [PING 5][PATCH v3] rs6000/p8swap: Fix incorrect lane extraction by vec_extract() [PR106770]

Hi Segher, Pinging the patch. Please let me know if it is ok for trunk. Regards, Surya On 06/05/24 1:54 pm, Surya Kumari Jangala wrote: > Ping > > On 08/01/24 11:19 am, Surya Kumari Jangala wrote: >> Ping >> >> On 28/11/23 6:24 pm, Surya Kumari Jangala wrote: >>> Ping >>> >>> On 10/11/23 12:27 p

Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2

Hi Pan, Once the postcommit baseline moves forward (trunk is currently failing to build linux targets [1] [2]) I'll re-trigger precommit for you. Thanks, Patrick [1]: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116409 [2]: https://github.com/patrick-rivos/gcc-postcommit-ci/issues/1564 On 8/

Re: [PATCH v3] Improve bad error message with stray semicolon in initializer (and related) [PR101232]

On 8/19/24 6:01 AM, Jonathan Wakely wrote: On 05/08/24 09:32 +0200, Franciszek Witt wrote: Author: Franciszek Witt Date:   Mon Aug 5 09:00:35 2024 +0200    c++: [PR101232] The line above should be the first line of your Git commit message, which should be in the form "component: Summary of c

Re: [Ping x 3, Fortran, Patch, coarray, PR84246, v2] Fix for [Coarray] ICE in conv_caf_send, at fortran/trans-intrinsic.c:1950

On 8/19/24 4:43 AM, Andre Vehreschild wrote: Hi all, another ping on this patch. Regtests ok on x86_64-pc-linux-gnu on updated master. Ok for mainline? Regards, Andre Looks OK to go ahead Andre. Thanks, Jerry On Fri, 9 Aug 2024 16:29:08 +0200 Andre Vehreschild wrote: Ping! O

Re: [PATCH 1/2] SVE intrinsics: Fold constant operands for svdiv

Kyrylo Tkachov writes: > Hi Richard, > >> On 19 Aug 2024, at 14:57, Richard Sandiford >> wrote: >> >> External email: Use caution opening links or attachments >> >> >> Jennifer Schmitz writes: >>> This patch implements constant folding for svdiv. A new gimple_folder >>> method was added that

Re: [PATCH v3 0/5] aarch64: Fix intrinsic availability [PR112108]

On Fri, Aug 16, 2024 at 07:17:24AM +, Kyrylo Tkachov wrote: > > > > On 15 Aug 2024, at 18:48, Andrew Carlotti wrote: > > > > External email: Use caution opening links or attachments > > > > > > On Thu, Aug 15, 2024 at 05:15:03PM +0100, Richard Sandiford wrote: > >> Andrew Carlotti writes

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

Hi Pan, > > Thanks Jakub for explaining. > > Hi Richard, > > Does it mean we need to do some promotion similar as this patch to make the > vectorizable_call happy > when there is a constant operand? I am not sure if there is a better approach > for > this case. I'll leave it up to Richi, but

Re: [PATCH 1/2] SVE intrinsics: Fold constant operands for svdiv

Hi Richard, > On 19 Aug 2024, at 14:57, Richard Sandiford wrote: > > External email: Use caution opening links or attachments > > > Jennifer Schmitz writes: >> This patch implements constant folding for svdiv. A new gimple_folder >> method was added that uses const_binop to fold binary operat

Re: [PATCH 1/2] SVE intrinsics: Fold constant operands for svdiv

On Mon, 19 Aug 2024, Richard Sandiford wrote: > Jennifer Schmitz writes: > > This patch implements constant folding for svdiv. A new gimple_folder > > method was added that uses const_binop to fold binary operations using a > > given tree_code. For svdiv, this method is used to fold constant > >

Re: Re-compute TYPE_MODE and DECL_MODE while streaming in for accelerator

On Mon, 19 Aug 2024, Prathamesh Kulkarni wrote: > Hi Richard, > As mentioned in RFC email, for the following test: > > int main() > { > long c[4]; > #pragma omp target map(c) > c[0] = 0; > return 0; > } > > Compiling for AArch64 host with -O2 -fopenmp -foffload=nvptx-none results in: >

RE: [optc-save-gen.awk] Fix streaming of command line options for offloading

On Mon, 19 Aug 2024, Prathamesh Kulkarni wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Tuesday, August 13, 2024 12:52 PM > > To: Andrew Pinski > > Cc: Prathamesh Kulkarni ; gcc- > > patc...@gcc.gnu.org; Thomas Schwinge > > Subject: Re: [optc-save-gen.awk] Fix st

Re: [PATCH 2/2] SVE intrinsics: Fold constant operands for svmul

Jennifer Schmitz writes: > This patch implements constant folding for svmul. It uses the > gimple_folder::const_fold function to fold constant integer operands. > Additionally, if at least one of the operands is a zero vector, svmul is > folded to a zero vector (in case of ptrue, _x, or _z). > Tes

Re: [PATCH 1/2] SVE intrinsics: Fold constant operands for svdiv

Jennifer Schmitz writes: > This patch implements constant folding for svdiv. A new gimple_folder > method was added that uses const_binop to fold binary operations using a > given tree_code. For svdiv, this method is used to fold constant > operands. > Additionally, if at least one of the operands

Re: [PATCH 4/5] lto: Set has_unroll flag when streaming in for LTO [PR116140]

On Fri, 9 Aug 2024, Alex Coplan wrote: > On 09/08/2024 13:12, Richard Biener wrote: > > > > > > > Am 09.08.2024 um 11:30 schrieb Alex Coplan : > > > > > > When #pragma GCC unroll is processed in > > > tree-cfg.cc:replace_loop_annotate_in_block, we set both the loop->unroll > > > field (which i

Re: [nvptx] Pass -m32/-m64 to host_compiler if it has multilib support

On Thu, 8 Aug 2024, Prathamesh Kulkarni wrote: > Hi Richard, > After differing NUM_POLY_INT_COEFFS fix for AArch64/nvptx offloading, the > following minimal test: > > int main() > { > int x; > #pragma omp target map(x) > x = 5; > return x; > } > > compiled with -fopenmp -foffload=nvpt

Re: [Ping x 3, Fortran, Patch, coarray, PR84246, v2] Fix for [Coarray] ICE in conv_caf_send, at fortran/trans-intrinsic.c:1950

Hi all, another ping on this patch. Regtests ok on x86_64-pc-linux-gnu on updated master. Ok for mainline? Regards, Andre On Fri, 9 Aug 2024 16:29:08 +0200 Andre Vehreschild wrote: > Ping! > > On Wed, 17 Jul 2024 15:15:51 +0200 > Andre Vehreschild wrote: > > > Hi all, > > > > attache

[PATCH v10 2/3] Merge definitions of array_type_nelts_top()

There were two identical definitions, and none of them are available where they are needed for implementing __nelementsof__. Merge them, and provide the single definition in gcc/tree.{h,cc}, where it's available for __nelementsof__, which will be added in the following commit. gcc/ChangeLog:

[PATCH v10 3/3] c: Add __nelementsof__ operator

This operator is similar to sizeof but can only be applied to an array, and returns its number of elements. FUTURE DIRECTIONS: - We should make it work with array parameters to functions, and somehow magically return the number of elements of the array, regardless of it being really a poin

[PATCH v10 1/3] gcc/: Rename array_type_nelts() => array_type_nelts_minus_one()

The old name was misleading. While at it, also rename some temporary variables that are used with this function, for consistency. Link: https://inbox.sourceware.org/gcc-patches/9fffd80-dca-2c7e-14b-6c9b509a7...@redhat.com/T/#m2f661c67c8f7b2c405c8c7fc3152dd85dc729120 Cc: Gabriel Ravier Cc: Marti

[PATCH v10 0/3] c: Add __nelementsof__ operator

Hi! This is v10 of this patch set; hopefully, we're close to an end. I've already submitted a proposal for C2y to WG14, as n3313: For those who haven't been following since the start, the entire thread of patch set revisions and their

Re: [PATCH v3] Improve bad error message with stray semicolon in initializer (and related) [PR101232]

On 05/08/24 09:32 +0200, Franciszek Witt wrote: Hi, could someone review this patch? This is built on top of the v2 from https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101232 the only difference is fix for error59.C I have tested it on x86_64 Ubuntu 22 machine. Regards Franciszek --- Author:

Re: [committed][rtl-optimization/116244] Don't create bogus regs in alter_subreg

Jeff Law writes: > On 8/12/24 3:50 PM, Jeff Law wrote: >> >> >> On 8/12/24 1:49 PM, Richard Sandiford wrote: >> -  regno = subreg_regno (x); +  /* A paradoxical should always be REGNO (y) + 0.  Using subreg_regno + for something like (subreg:DI (reg:SI N) 0)

Re: [committed] testsuite: Prune warning about size of enums

On 8/19/24 10:56, Torbjörn SVENSSON wrote: Committed as obvious in r15-3017 and r14-10602. > -- This fixes reported regression at https://linaro.atlassian.net/browse/GNU-1315. Thanks. This happens because libs/startup code are compiled with the default short-enums scheme for the target, w

Re: [Fortran, Patch, PR46371, v1] Fix coarrays use in select type

Hi Harald, thanks for the review. Committed as: gcc-15-3020-g8871489c516 I have checked on PR99837 and the code fragments in there work or error out as expected w/o ICE. So I associate this PR to 46371 and close it. Thanks again, Andre On Fri, 16 Aug 2024 19:06:02 +0200 Harald Anlauf w

[PATCH 11/12] AVX10.2: Support compare instructions

From: "Zhang, Jun" gcc/ChangeLog: * config/i386/i386-expand.cc (ix86_ssecom_setcc): Mention behavior change on flags. (ix86_expand_sse_comi): Handle AVX10.2 behavior. (ix86_expand_sse_comi_round): Ditto. (ix86_expand_round_builtin): Ditto. (ix86_ex

[PATCH 12/12] i386: Add bf8 -> fp16 intrin

Since BF8 and FP16 have same bits for exponent, the type conversion between them is just a cast for fraction part. We will use a sequence of instrctions instead of new instructions to do that. For convenience, intrins are also provided. gcc/ChangeLog: * config/i386/avx10_2-512convertintri

[PATCH 10/12] AVX10.2: Support vector copy instructions

From: "Zhang, Jun" gcc/ChangeLog: * config/config.gcc: Add avx10_2copyintrin.h. * config/i386/i386.md (avx10_2): New isa attribute. * config/i386/immintrin.h: Include avx10_2copyintrin.h. * config/i386/sse.md (sse_movss_): Add new constraints to handle AVX

[PATCH 09/12] AVX10.2: Support minmax instructions

From: "Mo, Zewei" gcc/ChangeLog: * config.gcc: Add avx10_2-512minmaxintrin.h and avx10_2minmaxintrin.h. * config/i386/i386-builtin-types.def: Add DEF_FUNCTION_TYPE (V8BF, V8BF, V8BF, INT, V8BF, UQI), (V16BF, V16BF, V16BF, INT, V16BF, UHI), (V32BF,

[committed] testsuite: Prune warning about size of enums

Committed as obvious in r15-3017 and r14-10602. -- This fixes reported regression at https://linaro.atlassian.net/browse/GNU-1315. gcc/testsuite/ChangeLog: * g++.dg/warn/pr33738-2.C: dg-prune arm linker messages about size of enums. Signed-off-by: Torbjörn SVENSSON --- gcc/te

[PATCH 06/12] [PATCH 2/2] AVX10.2: Support BF16 instructions

From: konglin1 gcc/ChangeLog: * config/i386/avx10_2-512bf16intrin.h: Add new intrinsics. * config/i386/avx10_2bf16intrin.h: Diito. * config/i386/i386-builtin-types.def : Add new DEF_FUNCTION_TYPE for new type. * config/i386/i386-builtin.def (BDESC): Add ne

Re: [PATCH][RFC] aarch64: Reduce FP reassociation width for Neoverse V2 and set AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA

> On 12 Aug 2024, at 17:24, Tamar Christina wrote: > > External email: Use caution opening links or attachments > > >> -Original Message- >> From: Kyrylo Tkachov >> Sent: Monday, August 12, 2024 3:54 PM >> To: Tamar Christina >> Cc: GCC Patches ; Richard Sandiford >> >> Subject: Re

[PATCH 05/12] [PATCH 1/2] AVX10.2: Support BF16 instructions

From: konglin1 gcc/ChangeLog: * config.gcc: Add avx10_2-512bf16intrin.h and avx10_2bf16intrin.h. * config/i386/i386-builtin-types.def : Add new DEF_FUNCTION_TYPE for V32BF_FTYPE_V32BF_V32BF, V16BF_FTYPE_V16BF_V16BF, V8BF_FTYPE_V8BF_V8BF, V8BF_FTYPE_V8BF_V8

[PATCH 07/12] [PATCH 1/2] AVX10.2: Support saturating convert instructions

From: "Hu, Lin1" gcc/ChangeLog: * config.gcc: Add avx10_2satcvtintrin.h and avx10_2-512satcvtintrin.h. * config/i386/i386-builtin-types.def: Add DEF_FUNCTION_TYPE (V8HI, V8BF, V8HI, UQI), (V16HI, V16BF, V16HI, UHI), (V32HI, V32BF, V32HI, USI), (V16

[PATCH 08/12] [PATCH 2/2] AVX10.2: Support saturating convert instructions

From: "Hu, Lin1" gcc/ChangeLog: * config/i386/i386-builtin.def (BDESC): Add new builtins. * config/i386/sse.md (avx10_2_vcvttpd2dqs): New. (avx10_2_vcvttpd2qqs): Ditto. (avx10_2_vcvttps2dqs): Ditto. (avx10_2_vcvttps2qqs):

[PATCH 02/12] [PATCH 1/2] AVX10.2: Support media instructions

From: Hongyu Wang gcc/ChangeLog * config.gcc: Add avx10_2mediaintrin.h and avx10_2-512mediaintrin.h. * config/i386/i386-builtin.def: Add new builtins. * config/i386/i386-builtins.cc (def_builtin): Handle shared builtins between AVXVNNIINT8 and AVX10.2.

[PATCH 03/12] [PATCH 2/2] AVX10.2: Support media instructions

gcc/ChangeLog: * config/i386/avx10_2-512mediaintrin.h: Add new intrins. * config/i386/avx10_2mediaintrin.h: Ditto. * config/i386/i386-builtin.def: Add new builtins. * config/i386/i386-builtins.cc (def_builtin): Handle shared builtins between AVXVNNIINT16 and

[PATCH 00/12] AVX10.2: Support new instructions

Hi all, The AVX10.2 ymm rounding patches has been merged to trunk around 6 hours ago. As mentioned before, next step will be AVX10.2 new instruction support. This patch series could be divided into three part. The first patch will refactor m512-check.h under testsuite to reuse AVX-512 helper fun

[PATCH 01/12] i386: Refactor m512-check.h

After AVX10 introduction, we still want to use AVX512 helper functions to avoid duplicate code. In order to reuse them, we need to do some refactor to make sure each function define happen under correct ISA to avoid ABI warnings. gcc/testsuite/ChangeLog: * gcc.target/i386/m512-check.h: Wr

Re: [PATCH] gnat: fix lto-type-mismatch between C_Version_String and gnat_version_string [PR115917]

Arsen Arsenović writes: Hello Arsen, > Reg-tested on x86_64-pc-linux-gnu with all languages and yes,rtl,extra > checking. > > OK for trunk? > > TIA, have a lovely day. > -- >8 -- > > gcc/ada/ChangeLog: > > PR ada/115917 > * gnatvsn.ads: Add note about the duplication

Re: [PATCH] PR tree-optimization/101390: Vectorize modulo operator

Thanks for the comments. I updated the patch accordingly and bootstrapped and tested again. Best, Jennifer 0001-PR-tree-optimization-101390-Vectorize-modulo-operato.patch Description: Binary data > On 14 Aug 2024, at 16:18, Richard Sandiford wrote: > > External email: Use caution opening lin

Re: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

Hi, It's not useful to CC the gcc-bugs list with patches. Please just send the patch to the gcc-patches list (and any other appropriate lists, like libstdc++ or fortran, if appropriate). If you want to update the bugzilla report, you can manually add a comment to it with the URL of the patch submi

Re-compute TYPE_MODE and DECL_MODE while streaming in for accelerator

Hi Richard, As mentioned in RFC email, for the following test: int main() { long c[4]; #pragma omp target map(c) c[0] = 0; return 0; } Compiling for AArch64 host with -O2 -fopenmp -foffload=nvptx-none results in: lto1: fatal error: nvptx-none - 256-bit integer numbers unsupported (mode

[PATCH] RISC-V: Bugfix for Duplicate entries for -mtune in --target-help[Bug 116347]

From: yulong This patch try to fix a bug[116347]. I change the name of the micro-arch, because I think micro-arch and core have the same name that caused the error. gcc/ChangeLog: * config/riscv/riscv-cores.def (RISCV_TUNE): Rename. (RISCV_CORE): Ditto. --- gcc/config/riscv/ri

RE: [optc-save-gen.awk] Fix streaming of command line options for offloading

> -Original Message- > From: Richard Biener > Sent: Tuesday, August 13, 2024 12:52 PM > To: Andrew Pinski > Cc: Prathamesh Kulkarni ; gcc- > patc...@gcc.gnu.org; Thomas Schwinge > Subject: Re: [optc-save-gen.awk] Fix streaming of command line options > for offloading > > External emai

Re: [PATCH] libstdc++: Remove note from the GCC 4.0.1 days

On Sun, 18 Aug 2024, 23:39 Eric Gallager, wrote: > On Sun, Aug 18, 2024 at 4:52 AM Gerald Pfeifer wrote: > > > > When I updated one of the links yesterday I noticed we have this obsolete > > reference to GCC 4.0.1 and binutils 2.15.90.0.1.1 from 19 (nineteen) > years > > ago. > > > > I suggest w

Re: [Ping x 3, Patch, Fortran, PR84244, v3] Fix ICE in recompute_tree_invariant_for_addr_expr, at tree.c:4535

Hi Harald, thanks for the review. Committed as: gcc-15-3014-g661acde60ef Regards, Andre On Fri, 16 Aug 2024 19:20:58 +0200 Harald Anlauf wrote: > Hi Andre, > > Am 16.08.24 um 12:05 schrieb Andre Vehreschild: > > Hi all, > > > > any one for a review? This patch is over a month old and s

Re: [PATCH, gfortran] libgfortran: implement fpu-macppc for Darwin, support IEEE arithmetic

Thank you very much! Sergey On Aug 19, 2024 at 00:55 +0800, FX Coudert , wrote: > Thanks Sergey, > > I have pushed the patch at > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=1cfe4a4d0d4447b364815d5e5c889deb2e533669 > > FX

Re: [RFC][PATCH] SVE intrinsics: Fold svdiv (svptrue, x, x) to ones

Based on our discussion, I submitted two new patches for folding SVE intrinsics (svdiv and svmul): https://gcc.gnu.org/pipermail/gcc-patches/2024-August/660744.html https://gcc.gnu.org/pipermail/gcc-patches/2024-August/660745.html > On 13 Aug 2024, at 10:58, Richard Sandiford wrote: > > Exter

[PATCH 2/2] SVE intrinsics: Fold constant operands for svmul

This patch implements constant folding for svmul. It uses the gimple_folder::const_fold function to fold constant integer operands. Additionally, if at least one of the operands is a zero vector, svmul is folded to a zero vector (in case of ptrue, _x, or _z). Tests were added to check the produced

[PATCH 1/2] SVE intrinsics: Fold constant operands for svdiv

This patch implements constant folding for svdiv. A new gimple_folder method was added that uses const_binop to fold binary operations using a given tree_code. For svdiv, this method is used to fold constant operands. Additionally, if at least one of the operands is a zero vector, svdiv is folded t