[PATCH][v2] tree-optimization/115868 - ICE with .MASK_CALL in simdclone

The following adjusts mask recording which didn't take into account that we can merge call arguments from two vectors like _50 = {vect_d_1.253_41, vect_d_1.254_43}; _51 = VIEW_CONVERT_EXPR(mask__19.257_49); _52 = (unsigned int) _51; _53 = _Z3bazd.simdclone.7 (_50, _52); _54 = BIT_FIELD_R

Re: [PATCH] s390: Fix output template for movv1qi

On 7/2/24 15:43, Stefan Schulze Frielinghaus wrote: Although for instructions MVI and MVIY it does not make a difference whether the immediate is interpreted as signed or unsigned, GAS expects unsigned immediates for instruction format SI_URD. gcc/ChangeLog: * config/s390/vector.md (mo

Re: [PATCH] [libatomic]: Handle AVX+CX16 ZHAOXIN like intel for 16b atomic [PR104688]

On Fri, Jul 12, 2024 at 12:41:38PM +0800, MayShao-oc wrote: > From: mayshao > > Hi all: > We reply in PR104688 that ZHAOXIN guarantees that 16-byte VMOVDQA on > 16-byte aligned address is atomic, if memory type of the address is WB. So > there is no need to clear bit_AVX on ZHAOXIN CPUs. >

Re: [PATCH v2] RISC-V: Disable misaligned vector access in hook riscv_slow_unaligned_access[PR115862]

LGTM, but...this seems to have discovered another bug in the current trunk? could you take a look? Will trigger by -O2 -march=rv64gcv_zvl512b -mabi=lp64d or -O2 -march=rv64gcv_zvl256b -mabi=lp64d during RTL pass: combine x.c: In function '__libc_mallinfo': x.c:47:1: internal compiler error: in sm

Re: [PATCH v2 10/11] Add new bbitmap class

On Thu, Jul 11, 2024 at 2:18 PM Andrew Carlotti wrote: > > This class provides a constant-size bitmap that can be used as almost a > drop-in replacement for bitmaps stored in integer types. The > implementation is entirely within the header file and uses recursive > templated operations to suppor

Re: [RFC] Proposal to support Packed Boolean Vector masks.

On Fri, Jul 12, 2024 at 6:17 AM Tejas Belagod wrote: > > On 7/10/24 4:37 PM, Richard Biener wrote: > > On Wed, Jul 10, 2024 at 12:44 PM Richard Sandiford > > wrote: > >> > >> Tejas Belagod writes: > >>> On 7/10/24 2:38 PM, Richard Biener wrote: > On Wed, Jul 10, 2024 at 10:49 AM Tejas Belag

[PATCH] Fix SSA_NAME leak due to def_stmt is removed before use_stmt.

>- _5 = __atomic_fetch_or_8 (&set_work_pending_p, 1, 0); >- # DEBUG old => (long int) _5 >+ _6 = .ATOMIC_BIT_TEST_AND_SET (&set_work_pending_p, 0, 1, 0, >__atomic_fetch_or_8); >+ # DEBUG old => NULL > # DEBUG BEGIN_STMT >- # DEBUG D#2 => _5 & 1 >+ # DEBUG D#2 => NULL >... >- _10 = ~_5; >-

Re: [PATCH 2/4] vect: Fix inaccurate vector stmts number for slp reduction with lane-reducing

Hi, Richard, Let me explain some idea that has to be chosen for lane-reducing. The key complication is that these ops are associated with two kinds of vec_nums, one is number of effective vector stmts, which is used by partial vectorzation function such as vect_get_loop_mask. The other is number

Re: [PATCH] s390: Align *cjump_64 and *icjump_64

On Thu, Jul 11, 2024 at 07:32:17PM +0200, Stefan Schulze Frielinghaus wrote: > On Thu, Jul 11, 2024 at 05:14:58PM +0200, Jakub Jelinek wrote: > > On Thu, Jul 11, 2024 at 05:09:41PM +0200, Stefan Schulze Frielinghaus wrote: > > > I didn't have the schedule for 11.5 RC in mind which is tomorrow and t

[PATCH] [libatomic]: Handle AVX+CX16 ZHAOXIN like intel for 16b atomic [PR104688]

From: mayshao Hi all: We reply in PR104688 that ZHAOXIN guarantees that 16-byte VMOVDQA on 16-byte aligned address is atomic, if memory type of the address is WB. So there is no need to clear bit_AVX on ZHAOXIN CPUs. Bootstrapped /regtested X86_64. Ok for trunk? BR Mayshao libato

Re: [RFC] Proposal to support Packed Boolean Vector masks.

On 7/10/24 4:37 PM, Richard Biener wrote: On Wed, Jul 10, 2024 at 12:44 PM Richard Sandiford wrote: Tejas Belagod writes: On 7/10/24 2:38 PM, Richard Biener wrote: On Wed, Jul 10, 2024 at 10:49 AM Tejas Belagod wrote: On 7/9/24 4:22 PM, Richard Biener wrote: On Tue, Jul 9, 2024 at 11:45

[committed] Fix m68k bootstrap segfault with late-combine

So the m68k port has failed to bootstrap since the introduction of late-combine. My suspicion has been this is a backend problem. Sure enough after bisecting things down (thank goodness for the debug counter!) I'm happy to report m68k will bootstrap, though it's failing the comparison check.

Re: [PATCH-1v4] Value Range: Add range op for builtin isinf

Hi Jeff, Thanks for your comments. 在 2024/7/12 6:13, Jeff Law 写道: > > > On 7/11/24 1:32 AM, HAO CHEN GUI wrote: >> Hi, >>    The builtin isinf is not folded at front end if the corresponding optab >> exists. It causes the range evaluation failed on the targets which has >> optab_isinf. For ins

libbacktrace patch committed: Avoid infinite recursion

libbacktrace could get an infinite recursion in an odd case in which a .gnu_debugdata section was added to a debug file, and mini_debuginfo was put into the debug file, and the debug file was put into a /usr/lib/debug directory to be found by build ID. This combination doesn't really make sense bu

Re:[pushed] [PATCH 2/2] LoongArch: Remove unreachable codes.

Pushed to r15-1987. 在 2024/7/4 下午5:56, Lulu Cheng 写道: gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_split_move): Delete. (loongarch_hard_regno_mode_ok_uncached): Likewise. * config/loongarch/loongarch.md (move_doubleword_fpr): Likewise.

Re:[pushed] [PATCH 1/2] LoongArch: TFmode is not allowed to be stored in the float register.

Pushed to r15-1986. 在 2024/7/4 下午5:56, Lulu Cheng 写道: PR target/115752 gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_hard_regno_mode_ok_uncached): Replace UNITS_PER_FPVALUE with UNITS_PER_HWFPVALUE. * config/loongarch/loongarch.h (UNITS_PER_F

RE: [PATCH 05/10] i386: Fix dot_prod backend patterns for mmx and sse targets

> -Original Message- > From: Hongtao Liu > Sent: Thursday, July 11, 2024 9:45 AM > To: Victor Do Nascimento > Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com; > richard.earns...@arm.com > Subject: Re: [PATCH 05/10] i386: Fix dot_prod backend patterns for mmx and > sse targets > >

Re: [x86 SSE PATCH] Some AVX512 ternlog expansion refinements (take #2)

On Fri, Jul 12, 2024 at 5:33 AM Roger Sayle wrote: > > > Hi Hongtao, > Thanks for the review and pointing out the remaining uses of force_reg > that I'd overlooked. Here's a revised version of the patch that incorporates > your feedback. One minor change was that rather than using > memory_opera

[PATCH] combine.cc (make_more_copies): Copy attributes from the original pseudo, PR115883

CC to both the combine maintainer and the RA maintainer for verdict on whether this is the true correction or just a "fix"; whether REG_POINTER must be present or is just an optimization hint. And I almost forgot, the late-combine author! At least I hope to clarify the commit log based on your re

libbacktrace patch committed: Don't fail if symbol size is unknown

Mach-O and PE/COFF don't record symbol sizes in the symbol table. Adjust the libbacktrace testsuite so that it doesn't fail if the symbol size is unknown, only if it is incorrect. Ran libbacktrace tests on macOS on the compile farm and on x86_64-pc-linux-gnu. Committed to mainline. Ian

libbacktrace patch committed: Correctly gather Mach-O symbols

The libbacktrace symbol table code was incorrectly discarding global Mach-O symbols. This patch fixes the problem. Tested on macOS on the compile farm, and also on x86_64-pc-linux-gnu. Committed to mainline. Ian For PR libbacktrace/97082 * macho.c (MACH_O_N_EXT): Don't

[PATCH v2] RISC-V: Disable misaligned vector access in hook riscv_slow_unaligned_access[PR115862]

From: xuli The reason is that in the following code, icode = movmisalignv8si has already been rejected by TARGET_VECTOR_MISALIGN_SUPPORTED, but it is allowed by targetm.slow_unaligned_access,which is contradictory. (((icode = optab_handler (movmisalign_optab, mode)) != CODE_FOR_nothin

Re: libbacktrace patch committed: Add clang optnone attribute

On Thu, Jul 11, 2024 at 7:19 PM Andrew Pinski wrote: > > On Thu, Jul 11, 2024 at 4:14 PM Ian Lance Taylor wrote: > > > > The libbacktrace testsuite was not passing when run with current > > versions of clang. Add the optnone attribute to make it pass. Add > > -Wno-attributes and -Wno-unknown-at

Re: [committed] Fix previously latent bug in reorg affecting cris port

> Date: Wed, 3 Jul 2024 12:46:46 -0600 > From: Jeff Law > The late-combine patch has triggered a previously latent bug in reorg. > > Basically we have a sequence like this in the middle of reorg before we > start relaxing delay slots (cris-elf, gcc.dg/torture/pr98289.c) [...] > Pushing to the

Re: libbacktrace patch committed: Add clang optnone attribute

On Thu, Jul 11, 2024 at 4:18 PM Andrew Pinski wrote: > > On Thu, Jul 11, 2024 at 4:14 PM Ian Lance Taylor wrote: > > > > The libbacktrace testsuite was not passing when run with current > > versions of clang. Add the optnone attribute to make it pass. Add > > -Wno-attributes and -Wno-unknown-at

[PATCH v2] libstdc++: Handle encodings in localized chrono formatting [PR109162]

I sent v1 of this patch in February, and it added the new symbols to libstdc++exp.a which meant users needed to use -lstdc++exp to format chrono types in C++23 mode. That was less than ideal. This v2 patch adds the new symbols to the main library, which means no extra step to get the new features,

Re: libbacktrace patch committed: Add clang optnone attribute

On Thu, Jul 11, 2024 at 4:14 PM Ian Lance Taylor wrote: > > The libbacktrace testsuite was not passing when run with current > versions of clang. Add the optnone attribute to make it pass. Add > -Wno-attributes and -Wno-unknown-attributes to disable warnings about > unrecognized function attribu

[committed] libstdc++: the specialization atomic_ref should use the primary template

On Thu, 23 May 2024 at 00:06, Lebrun-Grandie, Damien wrote: > > See patch attached to this email. Thanks for the patch. Sorry it took a while, but I've now pushed it to trunk, along with the test below. Tested x86_64-linux. Pushed to trunk. -- >8 -- The previous commit changed atomic_ref to not

libbacktrace patch committed: Add clang optnone attribute

The libbacktrace testsuite was not passing when run with current versions of clang. Add the optnone attribute to make it pass. Add -Wno-attributes and -Wno-unknown-attributes to disable warnings about unrecognized function attributes. Bootstrapped and ran libbacktrace testsuite on x86_64-pc-linu

libbacktrace patch committed: Suggest -g if no debug info

This small libbacktrace patch suggests compiling with -g (and, on macOS, running dsymutil), if there is no debug info. Ran libbacktrace testsuite. Committed to mainline. Ian * elf.c (elf_nodebug): Suggest -g. * macho.c (macho_nodebug): Suggest -g and dsymutil.

libbacktrace patch committed: Remove trailing whitespace

This minor libbacktrace patch removes trailing whitespace. Ran libbacktrace tests. Committed to mainline. Ian * dwarf.c: Remove trailing whitespace. * macho.c: Likewise. 3f660179d6a0ebcd83d6a546f48a163d1a685f72 diff --git a/libbacktrace/dwarf.c b/libbacktrace/dwarf.c index ed067

Re: [ARC PATCH] Improve performance of SImode right shifts.

On 7/11/24 12:45 PM, Roger Sayle wrote: This patch improves the speed of ARC's ashrsi3 and lshrsi3, on CPUs without a barrel shifter, when not optimizing for size. The current implementations of right shifts by a constant are optimal for code size, but at significant performance cost. By em

Re: [PATCH 3/3 v3] RISC-V: Add md files for vector BFloat16

On 7/11/24 1:10 AM, Feng Wang wrote: V3: Add Bfloat16 vector insn in generic-vector-ooo.md v2: Rebase Accroding to the BFloat16 spec, some vector iterators and new pattern are added in md files. Signed-off-by: Feng Wang gcc/ChangeLog: * config/riscv/generic-vector-ooo.md: Add def_in

Re: [PATCH 1/3 v3] RISC-V: Add vector type of BFloat16 format

On 7/11/24 1:26 AM, Kito Cheng wrote: OK for this patch set, I know you already got LGTM from JuZhe or me before, so just an explicitly ack to let you know it's still OK once CI is passed. The tabs vs spaces problem pointed out by the linter should be fixed. The other lint issues probably sho

Re: [PATCH-1v4] Value Range: Add range op for builtin isinf

On 7/11/24 1:32 AM, HAO CHEN GUI wrote: Hi, The builtin isinf is not folded at front end if the corresponding optab exists. It causes the range evaluation failed on the targets which has optab_isinf. For instance, range-sincos.c will fail on the targets which has optab_isinf as it calls bui

[pushed] libstdc++: Switch gcc.gnu.org links to https

Pushed. Gerald libstdc++-v3: * doc/xml/manual/using.xml: Switch gcc.gnu.org links to https. * doc/html/manual/using_concurrency.html: Regenerate. * doc/html/manual/using_dynamic_or_shared.html: Ditto. * doc/html/manual/using_headers.html: Ditto. * doc/html

[PATCH 12/15] arm: [MVE intrinsics] rework vcvtaq vcvtmq vcvtnq vcvtpq

Implement vcvtaq vcvtmq vcvtnq vcvtpq using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vcvtaq): New. (vcvtmq): New. (vcvtnq): New. (vcvtpq): New. * config/arm/arm-mve-builtins-base.def (

[PATCH 06/15] arm: [MVE intrinsics] rework vcvtq

Implement vcvtq using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (class vcvtq_impl): New. (vcvtq): New. * config/arm/arm-mve-builtins-base.def (vcvtq): New. * config/arm/arm-mve-builtins-base.h (

[PATCH 08/15] arm: [MVE intrinsics] add vcvt_f16_f32 and vcvt_f32_f16 shapes

This patch adds the vcvt_f16_f32 and vcvt_f32_f16 shapes descriptions. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-shapes.cc (vcvt_f16_f32) (vcvt_f32_f16): New. * config/arm/arm-mve-builtins-shapes.h (vcvt_f16_f32) (vcvt_f32_f16): New.

[PATCH 10/15] arm: [MVE intrinsics] factorize vcvtaq vcvtmq vcvtnq vcvtpq

Factorize vcvtaq vcvtmq vcvtnq vcvtpq builtins so that they use parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add VCVTAQ_M_S, VCVTAQ_M_U, VCVTAQ_S, VCVTAQ_U, VCVTMQ_M_S, VCVTMQ_M_U, VCVTMQ_S, VCVTMQ_U, VCVTNQ_M_S, VCV

[PATCH 15/15] arm: [MVE intrinsics] rework vorn

Implement vorn using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vornq): New. * config/arm/arm-mve-builtins-base.def (vornq): New. * config/arm/arm-mve-builtins-base.h (vornq): New. * config/arm/

[PATCH 07/15] arm: [MVE intrinsics] factorize vcvtbq vcvttq

Factorize vcvtbq, vcvttq so that they use the same parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add VCVTBQ_F16_F32, VCVTTQ_F16_F32, VCVTBQ_F32_F16, VCVTTQ_F32_F16, VCVTBQ_M_F16_F32, VCVTTQ_M_F16_F32, VCVTBQ_M_F32_F16

[PATCH 11/15] arm: [MVE intrinsics] add vcvtx shape

This patch adds the vcvtx shape description for vcvtaq, vcvtmq, vcvtnq, vcvtpq. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-shapes.cc (vcvtx): New. * config/arm/arm-mve-builtins-shapes.h (vcvtx): New. --- gcc/config/arm/arm-mve-builtins-shapes.cc | 59

[PATCH 14/15] arm: [MVE intrinsics] factorize vorn

Factorize vorn so that they use the parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC): Add VORNQ_M_S, VORNQ_M_U. (MVE_FP_M_BINARY_LOGIC): Add VORNQ_M_F. (mve_insn): Add VORNQ_M_S, VORNQ_M_U, VORNQ_M_F

[PATCH 13/15] arm: [MVE intrinsics] rework vbicq

Implement vbicq using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (vbicq): New. * config/arm/arm-mve-builtins-base.def (vbicq): New. * config/arm/arm-mve-builtins-base.h (vbicq): New. * config/arm

[PATCH 03/15] arm: [MVE intrinsics] Cleanup arm-mve-builtins-functions.h

This patch brings no functional change but removes some code duplication in arm-mve-builtins-functions.h and makes it easier to read and maintain. It introduces a new expand_unspec () member of unspec_based_mve_function_base and makes a few classes inherit from it instead of function_base. This a

[PATCH 05/15] arm: [MVE intrinsics] add vcvt shape

This patch adds the vcvt shape description. It needs to add a new type_suffix_info parameter to explicit_type_suffix_p (), because vcvt uses overloads for type suffixes for integer-> floating-point conversions, but not for floating-point to integer. 2024-07-11 Christophe Lyon gcc/

[PATCH 09/15] arm: [MVE intrinsics] rework vcvtbq_f16_f32 vcvttq_f16_f32 vcvtbq_f32_f16 vcvttq_f32_f16

Implement vcvtbq_f16_f32, vcvttq_f16_f32, vcvtbq_f32_f16 and vcvttq_f32_f16 using the new MVE builtins framework. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-base.cc (class vcvtxq_impl): New. (vcvtbq, vcvttq): New. * config/arm/arm-mve-builtins-

[PATCH 04/15] arm: [MVE intrinsics] factorize vcvtq

Factorize vcvtq so that they use the parameterized names. 2024-07-11 Christophe Lyon gcc/ * config/arm/iterators.md (mve_insn): Add VCVTQ_FROM_F_S, VCVTQ_FROM_F_U, VCVTQ_M_FROM_F_S, VCVTQ_M_FROM_F_U, VCVTQ_M_N_FROM_F_S, VCVTQ_M_N_FROM_F_U, VCVTQ_M_N_TO_F_S,

[PATCH 01/15] arm: [MVE intrinsics] improve comment for orrq shape

Add a comment about the lack of "n" forms for floating-point nor 8-bit integers, to make it clearer why we use build_16_32 for MODE_n. 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-shapes.cc (binary_orrq_def): Improve comment. --- gcc/config/arm/arm-mve-builti

[PATCH 02/15] arm: [MVE intrinsics] remove useless resolve from create shape

vcreateq have no overloaded forms, so there's no need for resolve (). 2024-07-11 Christophe Lyon gcc/ * config/arm/arm-mve-builtins-shapes.cc (create_def): Remove resolve. --- gcc/config/arm/arm-mve-builtins-shapes.cc | 6 -- 1 file changed, 6 deletions(-) diff --

[x86 SSE PATCH] Some AVX512 ternlog expansion refinements (take #2)

Hi Hongtao, Thanks for the review and pointing out the remaining uses of force_reg that I'd overlooked. Here's a revised version of the patch that incorporates your feedback. One minor change was that rather than using memory_operand, which as you point out also needs to include bcst_mem_operand

Re: [PATCH v2] Add gcc.gnu.org account names to MAINTAINERS

On Thu, Jul 11, 2024 at 09:48:18PM +0100, Richard Sandiford wrote: > Jakub Jelinek writes: > > On Wed, Jul 10, 2024 at 12:36:15PM +0100, Richard Sandiford wrote: > >> The account names in the file were taken from a trawl of the > >> gcc-cvs archives, with a very small number of manual edits for >

Re: [PATCH] fortran: Factor the evaluation of MINLOCK/MAXLOC's BACK argument

Hi Mikael, Am 11.07.24 um 21:55 schrieb Mikael Morin: From: Mikael Morin Hello, I discovered this while testing the inline MINLOC/MAXLOC (aka PR90608) patches. Regression tested on x86_64-linux. OK for master? this is a nice finding! (NAG seems to fail on the cases with array size 0, while

Re: Lower zeroing array assignment to memset for allocatable arrays

Hi Prathamesh! Am 11.07.24 um 12:16 schrieb Prathamesh Kulkarni: -Original Message- From: Harald Anlauf Sent: Thursday, July 11, 2024 12:53 AM To: Prathamesh Kulkarni ; gcc- patc...@gcc.gnu.org; fort...@gcc.gnu.org Subject: Re: Lower zeroing array assignment to memset for allocatable

Re: [PATCH] fixincludes: skip stdio_stdarg_h on darwin

Hi Iain, > This does fix the bootstrap problem on those, thanks > In this case, I’d like to test it across the OS versions I still test > regularly - but the machines are all going to be tied up testing the 11.5 RC > - so it might be a week or so. I do want to get this in as soon as poss - > r

[PATCH] eh: ICE with std::initializer_list and ASan [PR115865]

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? -- >8 -- Here we ICE with -fsanitize=address on std::initializer_list x = { 1, 2, 3 }; since r14-8681, which removed .ASAN_MARK calls on TREE_STATIC variables. That means that lower_try_finally now instead of try { .ASAN

[PATCH] fortran: Factor the evaluation of MINLOCK/MAXLOC's BACK argument

From: Mikael Morin Hello, I discovered this while testing the inline MINLOC/MAXLOC (aka PR90608) patches. Regression tested on x86_64-linux. OK for master? -- 8< -- Move the evaluation of the BACK argument out of the loop in the inline code generated for MINLOC or MAXLOC. For that, add a new

Re: [PATCH] [analyzer] [testsuite] avoid unexpected null dereference warning

On Thu, 2024-07-11 at 10:36 -0300, Alexandre Oliva wrote: > > The analyzer testsuite, on a customer's own operating system, reports > a potential NULL pointer dereference in flex-without-call- > summaries.c. > I'm not sure why it shows up on that system, but not on others, but > the test is not me

[PATCH] libcpp, c, middle-end: Optimize initializers using #embed in C

Hi! This patch on top of the https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655012.html https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655013.html

Re: [PATCH] fixincludes: skip stdio_stdarg_h on darwin

Hi FX > On 11 Jul 2024, at 13:54, FX Coudert wrote: > Sorry about that, thanks for reverting. It appears to be a SDK version issue, > so my analysis of the old SDK versions was incorrect. Could you try (when you > get some time) the attached patch on one of the versions that was broken by > m

[ARC PATCH] Improve performance of SImode right shifts.

This patch improves the speed of ARC's ashrsi3 and lshrsi3, on CPUs without a barrel shifter, when not optimizing for size. The current implementations of right shifts by a constant are optimal for code size, but at significant performance cost. By emitting an extra instruction or two, when not

[PATCH] arm: Update fp16-aapcs-[24].c after insn_propagation patch

These tests used to generate: bl swap ldr r2, [sp, #4] mov r0, r2 @ __fp16 but g:9d20529d94b23275885f380d155fe8671ab5353a means that we can load directly into r0: bl swap ldrhr0, [sp, #4]@ __fp16 This patch updates the tests to

[PATCH] libcpp, v2: Add support for gnu::base64 #embed parameter

Hi! On top of the https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655012.html https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655013.html patches here is a new version of the patch which adds another #embed extension, gnu::base64. As mentioned in the documentation, this extension is prima

[to-be-committed][RISC-V] Avoid unnecessary sign extension after memcmp

Similar to the str[n]cmp work, this adjusts the block compare expansion to do its work in X mode with an appropriate lowpart extraction of the results at the end of the sequence. This has gone through my tester on rv32 and rv64, but that's it. Waiting on pre-commit testing before moving forwar

Re: [PATCH] s390: Align *cjump_64 and *icjump_64

On Thu, Jul 11, 2024 at 05:14:58PM +0200, Jakub Jelinek wrote: > On Thu, Jul 11, 2024 at 05:09:41PM +0200, Stefan Schulze Frielinghaus wrote: > > I didn't have the schedule for 11.5 RC in mind which is tomorrow and the > > release a week afterwards. I hope this is still appropriate for 11.5? > >

Re: [PATCH v2 09/11] aarch64: Use constructor explicitly in get_flags_off

Andrew Carlotti writes: > gcc/ChangeLog: > > * config/aarch64/aarch64-feature-deps.h > (get_flags_off): Construct aarch64_feature_flags (0) explicitly. OK, thanks. Richard > diff --git a/gcc/config/aarch64/aarch64-feature-deps.h > b/gcc/config/aarch64/aarch64-feature-deps.h > index

Re: [PATCH v2 08/11] aarch64: Add bool conversion to TARGET_* macros

Andrew Carlotti writes: > Use a new AARCH64_HAVE_ISA macro in TARGET_* definitions, and eliminate > all the AARCH64_ISA_* feature macros. > > gcc/ChangeLog: > > * config/aarch64/aarch64-c.cc > (aarch64_define_unconditional_macros): Use TARGET_V8R macro. > (aarch64_update_cpp_buil

Re: [PATCH v2 07/11] aarch64: Add explicit bool cast to return value

Andrew Carlotti writes: > gcc/ChangeLog: > > * config/aarch64/aarch64.cc > (aarch64_valid_sysreg_name_p): Add bool cast. OK, thanks. Richard > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc > index > 69f481ecfc848e6c5b61516c2f7b8bff5cd4f8b8..229e438115c2

Re: [PATCH v2 06/11] aarch64: Decouple feature flag option storage type

Andrew Carlotti writes: > The awk scripts that process the .opt files are relatively fragile and > only handle a limited set of data types correctly. The unrecognised > aarch64_feature_flags type is handled as a uint64_t, which happens to be > correct for now. However, that assumption will chang

Re: [PATCH v2 05/11] aarch64: Define aarch64_get_{asm_|}isa_flags

Andrew Carlotti writes: > Building an aarch64_feature_flags value from data within a gcc_options > or cl_target_option struct will get more complicated in a later commit. > Use a macro to avoid doing this manually in more than one location. > > gcc/ChangeLog: > > * common/config/aarch64/aarc

Re: [PATCH v2 04/11] aarch64: Introduce aarch64_isa_mode type

Andrew Carlotti writes: > @@ -9157,14 +9156,14 @@ aarch64_emit_stack_tie (rtx reg) > then the signal handler doesn't know the state of the stack and can make > no > assumptions about which pages have been probed. > > - FORCE_ISA_MODE is AARCH64_FL_SM_ON if any variable component of PO

Re: [PATCH v2 11/11] aarch64: Extend aarch64_feature_flags to 128 bits

Andrew Carlotti writes: > Replace the existing uint64_t typedef with a bbitmap<2> typedef. Most > of the preparatory work was carried out in previous commits, so this > patch itself is fairly small. > > gcc/ChangeLog: > > * common/config/aarch64/aarch64-common.cc > (aarch64_set_asm_is

[PATCH] c++: constrained partial spec type context [PR111890]

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? -- >8 -- maybe_new_partial_specialization wasn't propagating TYPE_CONTEXT when creating a new class type corresponding to a constrained partial spec, which do_friend relies on via template_class_depth to distinguis

Re: [PATCH v2 10/11] Add new bbitmap class

Andrew Carlotti writes: > This class provides a constant-size bitmap that can be used as almost a > drop-in replacement for bitmaps stored in integer types. The > implementation is entirely within the header file and uses recursive > templated operations to support effective optimisation and usag

[nvptx PATCH] Implement rtx_costs target hook for nvptx backend.

This patch adds support for TARGET_RTX_COSTS to the nvptx backend. Currently, nvptx uses GCC's default instruction timing estimates, but this patch provides (slightly) more accurate timings. The most significant difference is that integer division is much slower (relatively) than other instruction

Re: [PATCH] s390: Align *cjump_64 and *icjump_64

On 7/11/24 16:29, Stefan Schulze Frielinghaus wrote: During machine reorg we optimize backward jumps and transform insns as e.g. (jump_insn 118 117 119 (set (pc) (if_then_else (ne (reg:CCRAW 33 %cc) (const_int 8 [0x8])) (label_ref 134) (pc)))

Re: [PATCH 3/3] c++: Add locations to using_p OVERLOADs

On 7/9/24 9:55 AM, Nathaniel Shead wrote: On Mon, Jul 08, 2024 at 02:24:14PM -0400, Jason Merrill wrote: On 7/6/24 10:13 PM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? I have also been working on a patch that uses the locations of using-decls in 'di

Re: [PATCH] RISC-V: skip vector tests if target not supporting v extension

On 7/11/24 1:20 AM, Jerry Zhang Jian wrote: The original method tried to overwrite the march option when the target doesn't support v exctension, which caused unexpected compile and runtime test failures This patch change the way to handle targets that don't support v extension by simply skip

Re: [PATCH] [libstdc++] [testsuite] avoid arbitrary errno codes

On Thu, 11 Jul 2024 at 17:23, Alexandre Oliva wrote: > > On Jul 11, 2024, Jonathan Wakely wrote: > > > And std::system_error doesn't limit the values that can be passed to > > it either. So I'd prefer to keep testing with arbitrary int values, > > because that *should* work. > > Fair enough, than

Re: [PATCH] [libstdc++] [testsuite] avoid arbitrary errno codes

On Jul 11, 2024, Jonathan Wakely wrote: > And std::system_error doesn't limit the values that can be passed to > it either. So I'd prefer to keep testing with arbitrary int values, > because that *should* work. Fair enough, thanks. I've seen portability documentation suggesting that strerror re

Re: [PATCH] Ranger: Mark a few classes as final

On 7/11/24 10:02 AM, Andrew Pinski (QUIC) wrote: -Original Message- From: Andrew Pinski (QUIC) Sent: Saturday, June 22, 2024 7:25 AM To: gcc-patches@gcc.gnu.org Cc: Andrew Pinski (QUIC) Subject: [PATCH] Ranger: Mark a few classes as final I noticed there was a warning from clang abo

Re: [PATCH] rs6000: Adjust -fpatchable-function-entry* support for dual entry [PR112980]

Hi, can I add myself to the bunch of people who are pinging this? Having this in will make our life easier. Thanks a lot, Martin On Wed, May 08 2024, Kewen.Lin wrote: > Hi, > > As the discussion in PR112980, although the current > implementation for -fpatchable-function-entry* conforms > with

Re: [PATCH] [libstdc++] [testsuite] xfail 128bit from_chars on all aarch64-*-*

On Jul 11, 2024, Andreas Schwab wrote: > On Jul 11 2024, Jonathan Wakely wrote: >> On Thu, 11 Jul 2024 at 14:21, Alexandre Oliva wrote: >>> >>> >>> Having observed failures of these two tests on yet another aarch64 >>> operating system, and having concluded that the conditions that >>> trigger

Re: [PATCH] [libstdc++] [testsuite] require dfprt on some tests

On Jul 11, 2024, Jonathan Wakely wrote: > btw, you touched it last, so now you own the decimal floating-point code ;-) Heh. Yet another reason ["why software shouldn't have owners"] (https://www.gnu.org/philosophy/why-free.en.html) :-) -- Alexandre Oliva, happy hackerhttps://FSFLA

RE: [PATCH] Ranger: Mark a few classes as final

> -Original Message- > From: Andrew Pinski (QUIC) > Sent: Saturday, June 22, 2024 7:25 AM > To: gcc-patches@gcc.gnu.org > Cc: Andrew Pinski (QUIC) > Subject: [PATCH] Ranger: Mark a few classes as final > > I noticed there was a warning from clang about int_range's > dtor being marked as

[committed] libstdc++: Disable expensive test for debug mode [PR108636]

Tested x86_64-linux. Pushed to trunk. -- >8 -- This test uses -fkeep-inline-functions and with debug mode enabled that compiles much slower and times out if the system is under heavy load. The original problem being tested is independent of debug mode, so just require normal mode for the test.

Re: [PATCH v2 03/11] aarch64: Eliminate a temporary variable.

> On 11 Jul 2024, at 14:12, Andrew Carlotti wrote: > > External email: Use caution opening links or attachments > > > The name would become misleading in a later commit anyway, and I think > this is marginally more readable. > > gcc/ChangeLog: > >* config/aarch64/aarch64.cc >

Re: [PATCH v2 02/11] aarch64: Move AARCH64_NUM_ISA_MODES definition

> On 11 Jul 2024, at 14:12, Andrew Carlotti wrote: > > External email: Use caution opening links or attachments > > > AARCH64_NUM_ISA_MODES will be used within aarch64-opts.h in a later > commit. > > gcc/ChangeLog: > >* config/aarch64/aarch64.h (DEF_AARCH64_ISA_MODE): Move to... >

Re: [PATCH v2 01/11] aarch64: Remove unused global aarch64_tune_flags

Hi Andrew, > On 11 Jul 2024, at 14:11, Andrew Carlotti wrote: > > External email: Use caution opening links or attachments > > > gcc/ChangeLog: > >* config/aarch64/aarch64.cc >(aarch64_tune_flags): Remove unused global variable. >(aarch64_override_options_internal): Re

Re: [PATCH v2 1/3] c++: Introduce USING_DECLs for non-function usings [PR114683]

On 7/11/24 6:22 AM, Nathaniel Shead wrote: On Tue, Jul 09, 2024 at 05:43:59PM -0400, Jason Merrill wrote: On 7/9/24 9:44 AM, Nathaniel Shead wrote: On Mon, Jul 08, 2024 at 12:26:41PM -0400, Jason Merrill wrote: For a using-decl in the same scope as the original decl, won't this replace it so o

Re: [PATCH] s390: Align *cjump_64 and *icjump_64

On Thu, Jul 11, 2024 at 05:09:41PM +0200, Stefan Schulze Frielinghaus wrote: > I didn't have the schedule for 11.5 RC in mind which is tomorrow and the > release a week afterwards. I hope this is still appropriate for 11.5? >From my side, if Andreas or somebody else approves it, it is tested on 1

Re: [PATCH] s390: Align *cjump_64 and *icjump_64

On Thu, Jul 11, 2024 at 04:29:19PM +0200, Stefan Schulze Frielinghaus wrote: > During machine reorg we optimize backward jumps and transform insns as > e.g. > > (jump_insn 118 117 119 (set (pc) > (if_then_else (ne (reg:CCRAW 33 %cc) > (const_int 8 [0x8])) > (lab

Re: [PATCH] gimple ssa: Teach switch conversion to optimize powers of 2 switches

> > > > +/* Check that the "exponential index transform" can be applied to this > > > > switch. > > > > + > > > > + See comment of the exp_index_transform function for details about > > > > this > > > > + transformation. > > > > + > > > > + We want: > > > > + - This form of the switch is

Re: [PATCH] [libstdc++] [testsuite] xfail 128bit from_chars on all aarch64-*-*

On Jul 11 2024, Jonathan Wakely wrote: > On Thu, 11 Jul 2024 at 14:21, Alexandre Oliva wrote: >> >> >> Having observed failures of these two tests on yet another aarch64 >> operating system, and having concluded that the conditions that >> trigger the problem ought to be present on all aarch64 ta

Re: [PATCH] [libstdc++] [testsuite] xfail 128bit from_chars on all aarch64-*-*

On Thu, 11 Jul 2024 at 14:21, Alexandre Oliva wrote: > > > Having observed failures of these two tests on yet another aarch64 > operating system, and having concluded that the conditions that > trigger the problem ought to be present on all aarch64 targets, I'm > now matching any aarch64 target_os

Re: [PATCH] [libstdc++] [testsuite] require dfprt on some tests

On Thu, 11 Jul 2024 at 15:28, Jonathan Wakely wrote: > > On Thu, 11 Jul 2024 at 14:22, Alexandre Oliva wrote: > > > > > > On a target that doesn't enable decimal float components in libgcc > > (because the libc doens't define all required FE_* macros), but whose > > compiler supports _Decimal* ty

Re: [PATCH] [libstdc++] [testsuite] require dfprt on some tests

On Thu, 11 Jul 2024 at 14:22, Alexandre Oliva wrote: > > > On a target that doesn't enable decimal float components in libgcc > (because the libc doens't define all required FE_* macros), but whose > compiler supports _Decimal* types, the effective target requirement > dfp passes, but several test

[PATCH] s390: Align *cjump_64 and *icjump_64

During machine reorg we optimize backward jumps and transform insns as e.g. (jump_insn 118 117 119 (set (pc) (if_then_else (ne (reg:CCRAW 33 %cc) (const_int 8 [0x8])) (label_ref 134) (pc))) "dec_math_1.f90":204:8 discrim 1 2161 {*cjump_64} (expr

Re: [PATCH] [libstdc++] [testsuite] avoid arbitrary errno codes

On Thu, 11 Jul 2024 at 14:23, Alexandre Oliva wrote: > > > Passing an arbitrary error number to strerror* functions doesn't seem > to be portable; 19_diagnostics/system_error/cons-1.cc is hitting > runtime errors in the block that attempts to instantiate a > std:;system_error for error number 95.

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