Andrew Carlotti <andrew.carlo...@arm.com> writes:
> Use a new AARCH64_HAVE_ISA macro in TARGET_* definitions, and eliminate
> all the AARCH64_ISA_* feature macros.
>
> gcc/ChangeLog:
>
>       * config/aarch64/aarch64-c.cc
>       (aarch64_define_unconditional_macros): Use TARGET_V8R macro.
>       (aarch64_update_cpp_builtins): Use TARGET_* macros.
>       * config/aarch64/aarch64.h (AARCH64_HAVE_ISA): New macro.
>       (AARCH64_ISA_SM_OFF, AARCH64_ISA_SM_ON, AARCH64_ISA_ZA_ON)
>       (AARCH64_ISA_V8A, AARCH64_ISA_V8_1A, AARCH64_ISA_CRC)
>       (AARCH64_ISA_FP, AARCH64_ISA_SIMD, AARCH64_ISA_LSE)
>       (AARCH64_ISA_RDMA, AARCH64_ISA_V8_2A, AARCH64_ISA_F16)
>       (AARCH64_ISA_SVE, AARCH64_ISA_SVE2, AARCH64_ISA_SVE2_AES)
>       (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3)
>       (AARCH64_ISA_SVE2_SM4, AARCH64_ISA_SME, AARCH64_ISA_SME_I16I64)
>       (AARCH64_ISA_SME_F64F64, AARCH64_ISA_SME2, AARCH64_ISA_V8_3A)
>       (AARCH64_ISA_DOTPROD, AARCH64_ISA_AES, AARCH64_ISA_SHA2)
>       (AARCH64_ISA_V8_4A, AARCH64_ISA_SM4, AARCH64_ISA_SHA3)
>       (AARCH64_ISA_F16FML, AARCH64_ISA_RCPC, AARCH64_ISA_RCPC8_4)
>       (AARCH64_ISA_RNG, AARCH64_ISA_V8_5A, AARCH64_ISA_TME)
>       (AARCH64_ISA_MEMTAG, AARCH64_ISA_V8_6A, AARCH64_ISA_I8MM)
>       (AARCH64_ISA_F32MM, AARCH64_ISA_F64MM, AARCH64_ISA_BF16)
>       (AARCH64_ISA_SB, AARCH64_ISA_RCPC3, AARCH64_ISA_V8R)
>       (AARCH64_ISA_PAUTH, AARCH64_ISA_V8_7A, AARCH64_ISA_V8_8A)
>       (AARCH64_ISA_V8_9A, AARCH64_ISA_V9A, AARCH64_ISA_V9_1A)
>       (AARCH64_ISA_V9_2A, AARCH64_ISA_V9_3A, AARCH64_ISA_V9_4A)
>       (AARCH64_ISA_MOPS, AARCH64_ISA_LS64, AARCH64_ISA_CSSC)
>       (AARCH64_ISA_D128, AARCH64_ISA_THE, AARCH64_ISA_GCS): Remove.
>       (TARGET_BASE_SIMD, TARGET_SIMD, TARGET_FLOAT)
>       (TARGET_NON_STREAMING, TARGET_STREAMING, TARGET_ZA, TARGET_SHA2)
>       (TARGET_SHA3, TARGET_AES, TARGET_SM4, TARGET_F16FML)
>       (TARGET_CRC32, TARGET_LSE, TARGET_FP_F16INST)
>       (TARGET_SIMD_F16INST, TARGET_DOTPROD, TARGET_SVE, TARGET_SVE2)
>       (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3)
>       (TARGET_SVE2_SM4, TARGET_SME, TARGET_SME_I16I64)
>       (TARGET_SME_F64F64, TARGET_SME2, TARGET_ARMV8_3, TARGET_JSCVT)
>       (TARGET_FRINT, TARGET_TME, TARGET_RNG, TARGET_MEMTAG)
>       (TARGET_I8MM, TARGET_SVE_I8MM, TARGET_SVE_F32MM)
>       (TARGET_SVE_F64MM, TARGET_BF16_FP, TARGET_BF16_SIMD)
>       (TARGET_SVE_BF16, TARGET_PAUTH, TARGET_BTI, TARGET_MOPS)
>       (TARGET_LS64, TARGET_CSSC, TARGET_SB, TARGET_RCPC, TARGET_RCPC2)
>       (TARGET_RCPC3, TARGET_SIMD_RDMA, TARGET_ARMV9_4, TARGET_D128)
>       (TARGET_THE, TARGET_GCS): Redefine using AARCH64_HAVE_ISA.
>       (TARGET_V8R, TARGET_V9A): New.
>       * config/aarch64/aarch64.md (arch_enabled): Use TARGET_RCPC2.
>       * config/aarch64/iterators.md (GPI_I16): Use TARGET_FP_F16INST.
>       (GPF_F16): Ditto.
>       * config/aarch64/predicates.md
>       (aarch64_rcpc_memory_operand): Use TARGET_RCPC2.

Thanks for doing this.

A couple of long lines below, but OK with those fixed:

> -#define TARGET_F16FML (TARGET_SIMD && AARCH64_ISA_F16FML && 
> TARGET_FP_F16INST)
> +#define TARGET_F16FML (TARGET_SIMD && AARCH64_HAVE_ISA (F16FML) && 
> TARGET_FP_F16INST)
...
> -#define TARGET_SVE2_BITPERM (AARCH64_ISA_SVE2_BITPERM && 
> TARGET_NON_STREAMING)
> +#define TARGET_SVE2_BITPERM (AARCH64_HAVE_ISA (SVE2_BITPERM) && 
> TARGET_NON_STREAMING)

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