[PATCH] rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389]

We currently only compute the offset for the ROP hash save location in the stack frame for Altivec compiles. For non-Altivec compiles when we emit ROP mitigation instructions, we use a default offset of zero which corresponds to the backchain save location which will get clobbered on any call. Th

[PATCH] MIPS: Use signaling fcmp instructions for LT/LE/LTGT

LT/LE: c.lt.fmt/c.le.fmt on pre-R6 and cmp.lt.fmt/cmp.le.fmt have different semantic: c.lt.fmt will signal for all NaN, including qNaN; cmp.lt.fmt will only signal sNaN, while not qNaN; cmp.slt.fmt has the same semantic as c.lt.fmt; lt/le of RTL will signaling qNaN. while in `s__using_

[PATCH] aarch64: Add vector floating point trunc pattern

This patch is a follow-up of r15-1079-g230d62a2cdd16c to add vector floating point trunc pattern for V2DF->V2SF and V4SF->V4HF conversions by renaming the existing aarch64_float_truncate_lo_ pattern to the standard optab one, i.e., trunc2. This allows the vectorizer to vectorize certain floating po

Re: [PATCH v1 0/6] Add DLL import/export implementation to AArch64

On 6/6/24 09:23, Evgeny Karpov wrote: Thursday, June 6, 2024 1:42 AM Jonathan Yong <10wa...@gmail.com> wrote: Where is HAVE_64BIT_POINTERS used? Sorry, it was missed in the posted changes for review. Regards, Evgeny diff --git a/gcc/config/mingw/mingw32.h b/gcc/config/mingw/mingw32.h index

Re: [PATCH v2 3/3] RISC-V: Add Zalrsc amo-op patterns

On 6/3/24 3:53 PM, Patrick O'Neill wrote: All amo patterns can be represented with lrsc sequences. Add these patterns as a fallback when Zaamo is not enabled. gcc/ChangeLog: * config/riscv/sync.md (atomic_): New expand pattern. (amo_atomic_): Rename amo pattern. (ato

Re: [PATCH v2 2/3] RISC-V: Add Zalrsc and Zaamo testsuite support

On 6/3/24 3:53 PM, Patrick O'Neill wrote: Convert testsuite infrastructure to use Zalrsc and Zaamo rather than A. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo-table-a-6-amo-add-1.c: Use Zaamo rather than A. * gcc.target/riscv/amo-table-a-6-amo-add-2.c: Ditto. * gcc

Re: [PATCH v2 1/3] RISC-V: Add basic Zaamo and Zalrsc support

On 6/3/24 3:53 PM, Patrick O'Neill wrote: The A extension has been split into two parts: Zaamo and Zalrsc. This patch adds basic support by making the A extension imply Zaamo and Zalrsc. Zaamo/Zalrsc spec: https://github.com/riscv/riscv-zaamo-zalrsc/tags Ratification: https://jira.riscv.org/b

Re: [PATCH v2] Target-independent store forwarding avoidance.

On 6/6/24 4:10 AM, Manolis Tsamis wrote: This pass detects cases of expensive store forwarding and tries to avoid them by reordering the stores and using suitable bit insertion sequences. For example it can transform this: strbw2, [x1, 1] ldr x0, [x1] # Expensive stor

[pushed] wwwdocs: simtest-howto: Use https to link to our install docs

--- htdocs/simtest-howto.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/htdocs/simtest-howto.html b/htdocs/simtest-howto.html index d9c027fd..3afbdb0b 100644 --- a/htdocs/simtest-howto.html +++ b/htdocs/simtest-howto.html @@ -115,7 +115,7 @@ cd gcc && find . -print | cp

[PATCH, obvious] rs6000: Update ELFv2 stack frame comment showing the correct ROP save location

I consider this one obvious, so I plan on pushing this soonish. Peter The ELFv2 stack frame layout comment in rs6000-logue.cc shows the ROP hash save slot in the wrong location. Update the comment to show the correct ROP hash save location in the frame. gcc/ * config/rs6000/rs6000-logu

[pushed] analyzer: add logging to get_representative_path_var

This was very helpful when debugging the cast_region::m_original_region removal, but is probably too verbose to enable except by hand on specific calls to get_representative_tree. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Successful run of analyzer integration tests on x86_64-

[pushed] analyzer: eliminate cast_region::m_original_region

cast_region had its own field m_original_region, rather than simply using region::m_parent, leading to lots of pointless special-casing of RK_CAST. Remove the field and simply use the parent region. Doing so revealed a bug (seen in gcc.dg/analyzer/taint-alloc-4.c) where region_model::get_represen

[pushed] analyzer: new warning: -Wanalyzer-undefined-behavior-ptrdiff (PR analyzer/105892)

Add a new warning to complain about pointer subtraction involving different chunks of memory. For example, given: #include int arr[42]; int sentinel; ptrdiff_t test_invalid_calc_of_array_size (void) { return &sentinel - arr; } this emits: demo.c: In function ‘test_invalid_c

[r15-1100 Regression] FAIL: gcc.target/i386/sse2-v1ti-vne.c scan-assembler-times pcmpeq 6 on Linux/x86_64

On Linux/x86_64, ec985bc97a01577bca8307f986caba7ba7633cde is the first bad commit commit ec985bc97a01577bca8307f986caba7ba7633cde Author: Roger Sayle Date: Fri Jun 7 13:57:23 2024 +0100 i386: Improve handling of ternlog instructions in i386/sse.md caused FAIL: gcc.target/i386/avx2-pr9846

Re: [analyzer PATCH] Restore bootstrap with g++ 4.8.

On Fri, 2024-06-07 at 19:40 +0100, Roger Sayle wrote: > > This patch restores bootstrap when using g++ 4.8 as a host compiler. > Returning a std::unique_ptr requires a std::move on C++ compilers > (pre-C++17) that don't guarantee copy elision/return value > optimization. > > Bootstrapped on x86_6

Re: [RFC][PATCH] PR tree-optimization/109071 - -Warray-bounds false positive warnings due to code duplication from jump threading

Hi, Richard, > On Jun 5, 2024, at 13:58, Qing Zhao wrote: >> > Like this? > > diff --git a/libcpp/include/line-map.h b/libcpp/include/line-map.h > index e6e2b0897572..ee344f91333b 100644 > --- a/libcpp/include/line-map.h > +++ b/libcpp/include/lin

[committed] libstdc++: Add missing header to for std::__memcmp

Tested x86_64-linux. Pushed to trunk. -- >8 -- As noticed by Michael Levine. libstdc++-v3/ChangeLog: * include/bits/ranges_algobase.h: Include . --- libstdc++-v3/include/bits/ranges_algobase.h | 1 + 1 file changed, 1 insertion(+) diff --git a/libstdc++-v3/include/bits/ranges_algobase

Re: [PATCH] libstdc++: Optimize std::gcd

On Fri, 7 Jun 2024 at 19:42, Stephen Face wrote: > > On 6/7/24 2:30 AM, Jonathan Wakely wrote: > > On Fri, 7 Jun 2024 at 09:57, Sam James wrote: > >> > >> Stephen Face writes: > >> > >>> This patch is to optimize the runtime execution of gcd. Mathematically, > >>> it computes with the same algor

Re: [PATCH] libstdc++: Optimize std::gcd

On 6/7/24 2:30 AM, Jonathan Wakely wrote: > On Fri, 7 Jun 2024 at 09:57, Sam James wrote: >> >> Stephen Face writes: >> >>> This patch is to optimize the runtime execution of gcd. Mathematically, >>> it computes with the same algorithm as before, but subtractions and >>> branches are rearranged t

[analyzer PATCH] Restore bootstrap with g++ 4.8.

This patch restores bootstrap when using g++ 4.8 as a host compiler. Returning a std::unique_ptr requires a std::move on C++ compilers (pre-C++17) that don't guarantee copy elision/return value optimization. Bootstrapped on x86_64-pc-linux-gnu using both gcc 4.8.5 (system) and gcc 10.2.1 (using "

[pushed] c++: -include and header unit translation

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- Within a source file, #include is translated to import if a suitable header unit is available, but this wasn't working with -include. This turned out to be because we suppressed the translation before the beginning of the main file. Af

Re: [to-be-committed] [RISC-V] Use Zbkb for general 64 bit constants when profitable

In file included from ../../gcc/rtl.h:3973, from ../../gcc/config/riscv/riscv.cc:31: In function 'rtx_def* init_rtx_fmt_ee(rtx, machine_mode, rtx, rtx)', inlined from 'rtx_def* gen_rtx_fmt_ee_stat(rtx_code, machine_mode, rtx, rtx)' at ./genrtl.h:50:26, inlined from 'void r

Re: [PATCH] c++: Make *_cast<*> parsing more robust to errors [PR108438]

On 6/7/24 08:12, Simon Martin wrote: We ICE upon the following when trying to emit a -Wlogical-not-parentheses warning: === cut here === template T foo (T arg, T& ref, T* ptr) { int a = 1; return static_cast(a); } === cut here === This patch makes *_cast<*> parsing more robust by skippin

Re: [PATCH] c++: Handle erroneous DECL_LOCAL_DECL_ALIAS in duplicate_decls [PR107575]

On 6/5/24 05:20, Simon Martin wrote: On 5 Jun 2024, at 10:34, Jakub Jelinek wrote: On Wed, Jun 05, 2024 at 08:13:14AM +, Simon Martin wrote: --- a/gcc/cp/decl.cc +++ b/gcc/cp/decl.cc @@ -2792,10 +2792,13 @@ duplicate_decls (tree newdecl, tree olddecl, bool hiding, bool was_hidden)

Re: [PATCH] c++: lambda in pack expansion [PR115378]

On 6/7/24 10:44, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? OK. -- >8 -- Here find_parameter_packs_r is incorrectly treating the 'auto' return type of a lambda as a parameter pack due to Concepts-TS specific logic added in r6-4517,

[PATCH] c++: lambda in pack expansion [PR115378]

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? -- >8 -- Here find_parameter_packs_r is incorrectly treating the 'auto' return type of a lambda as a parameter pack due to Concepts-TS specific logic added in r6-4517, leading to confusion later when expanding the

Re: [PATCH] lto: Fix build on MacOS

> Am 07.06.2024 um 16:30 schrieb Simon Martin : > > The build fails on x86_64-apple-darwin19.6.0 starting with 5b6d5a886ee > because > vector is included after system.h and runs into poisoned identifiers. > > This patch fixes this by defining INCLUDE_VECTOR before including system.h. Ok >

[PATCH] lto: Fix build on MacOS

The build fails on x86_64-apple-darwin19.6.0 starting with 5b6d5a886ee because vector is included after system.h and runs into poisoned identifiers. This patch fixes this by defining INCLUDE_VECTOR before including system.h. Validated by doing a full build on x86_64-apple-darwin19.6.0. gcc/lto/C

Re: [PATCH v3] RISC-V: Implement .SAT_SUB for unsigned scalar int

LGTM. Let's keep in mind that min/max will save us two insns(?) and a conditional move would save us one. Regards Robin

[PATCH v3] RISC-V: Implement .SAT_SUB for unsigned scalar int

From: Pan Li As the middle support of .SAT_SUB committed, implement the unsigned scalar int of .SAT_SUB for the riscv backend. Consider below example code: T __attribute__((noinline))\ sat_u_sub_##T##_fmt_1 (T x, T y) \ { \ return (x - y) & (-(T)(x

Re: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int

>> When you say other variants are still to be implemented >> does that also include variants for zbb with min/max >> or zicond? > > No, I mean some other forms like branch need the improvement from the > middle end(aka widen_mul). Ah, I see, thanks. Those can save one instruction and we want th

RE: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int

Thanks Robin for comments. > Can we replace step 3 and 4 with sub lt, -1 directly when > it's supposed to be optimized like that anyway? Sure thing, will update in v3. > When you say other variants are still to be implemented > does that also include variants for zbb with min/max > or zicond? N

[PATCH] c++: Make *_cast<*> parsing more robust to errors [PR108438]

We ICE upon the following when trying to emit a -Wlogical-not-parentheses warning: === cut here === template T foo (T arg, T& ref, T* ptr) { int a = 1; return static_cast(a); } === cut here === This patch makes *_cast<*> parsing more robust by skipping to the closing '>' upon error in the ta

[PATCH] tree-optimization/114107 - avoid peeling for gaps in more cases

The following refactors the code to detect necessary peeling for gaps, in particular the PR103116 case when there is no gap but the group size is smaller than the vector size. The testcase in PR114107 shows we fail to SLP for (int i=0; i

Re: [PATCH v2 2/6] Extract ix86 dllimport implementation to mingw

On Fri, Jun 7, 2024 at 11:48 AM Evgeny Karpov wrote: > > This patch extracts the ix86 implementation for expanding a SYMBOL > into its corresponding dllimport, far-address, or refptr symbol. > It will be reused in the aarch64-w64-mingw32 target. > The implementation is copied as is from i386/i386.

Re: [x86 PATCH] PR target/115351: RTX costs for *concatditi3 and *insvti_highpart.

On Fri, Jun 7, 2024 at 11:21 AM Roger Sayle wrote: > > > This patch addresses PR target/115351, which is a code quality regression > on x86 when passing floating point complex numbers. The ABI considers > these arguments to have TImode, requiring interunit moves to place the > FP values (which ar

Re: [patch, rs6000, middle-end 0/1] v1: Add implementation for different targets for pair mem fusion

Hello Richard: On 07/06/24 1:52 pm, Richard Sandiford wrote: > Ajit Agarwal writes: + + df_ref use; + df_insn_info *insn_info = DF_INSN_INFO_GET (info->rtl ()); + FOR_EACH_INSN_INFO_DEF (use, insn_info) +{ + struct df_link *def_lin

[PATCH] tree-optimization/115383 - EXTRACT_LAST_REDUCTION with multiple stmt copies

The EXTRACT_LAST_REDUCTION code isn't ready to deal with multiple stmt copies but SLP no longer checks for this. The following adjusts code generation to handle the situation. Bootstrap and regtest running on x86_64-unknown-linux-gnu. Testing on aarch64 appreciated, note the testcase in the test

Re: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int

Hi Pan, > + /* Step-2: lt = x < y */ > + riscv_emit_binary (LTU, pmode_lt, pmode_x, pmode_y); > + > + /* Step-3: lt = -lt */ > + riscv_emit_unary (NEG, pmode_lt, pmode_lt); > + > + /* Step-4: lt = ~lt */ > + riscv_emit_unary (NOT, pmode_lt, pmode_lt); Can we replace step 3 and 4 with sub

[PATCH v2 6/6] aarch64: Add DLL import/export to AArch64 target

This patch reuses the MinGW implementation to enable DLL import/export functionality for the aarch64-w64-mingw32 target. It also modifies environment configurations for MinGW. gcc/ChangeLog: * config.gcc: Add winnt-dll.o, which contains the DLL import/export implementation.

[PATCH v2 5/6] Adjust DLL import/export implementation for AArch64

The DLL import/export mingw implementation, originally from ix86, requires minor adjustments to be compatible with AArch64. gcc/ChangeLog: * config/i386/cygming.h (PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Declare whether an external declaration should be legitimized. (H

[PATCH v2 4/6] aarch64: Add selectany attribute handling

This patch extends the aarch64 attributes list with the selectany attribute for the aarch64-w64-mingw32 target and reuses the mingw implementation to handle it. * config/aarch64/aarch64.cc: Extend the aarch64 attributes list. * config/aarch64/cygming.h (SUBTARGET_ATTRIBUTE_

[PATCH v2 3/6] Rename functions for reuse in AArch64

This patch renames functions related to dllimport/dllexport and selectany functionality. These functions will be reused in the aarch64-w64-mingw32 target. gcc/ChangeLog: * config/i386/cygming.h (mingw_pe_record_stub): Rename functions in mingw folder which will be reused for

[PATCH v2 2/6] Extract ix86 dllimport implementation to mingw

This patch extracts the ix86 implementation for expanding a SYMBOL into its corresponding dllimport, far-address, or refptr symbol. It will be reused in the aarch64-w64-mingw32 target. The implementation is copied as is from i386/i386.cc with minor changes to follow to the code style. Also this pa

[PATCH v2 1/6] Move mingw_* declarations to the mingw folder

This patch refactors recent changes to move mingw-related functionality to the mingw folder. More renamings to the mingw_ prefix will be done in follow-up commits. This is the first commit in the second patch series to add DLL import/export implementation to AArch64. Coauthors: Zac Walker , Mark

[PATCH v2 0/6] Add DLL import/export implementation to AArch64

Hello, Thank you for reviewing v1! v2 addresses all comments on v1. Changes in v2: - Move winnt.h and winnt-dll.h to config.gcc. - Resolve the issue with GCC GC in winnt-dll.cc. - Add definitions for GOT_ALIAS_SET, PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED, and HAVE_64BIT_POINTERS to cygming.h.

[PATCH] fixincludes: bypass the math_exception fix on __cplusplus

The fixincludes fix “math_exception” is being applied overly broadly, including many targets which don’t need it, like darwin (and probably all non-glibc targets). I’m not sure if it is still needed on any target, but because I can’t be absolutely positive about that, I don’t want to remove it.

Re: [RE] [v2] RISC-V: Add Zfbfmin extension

Hi Jin We have completed zvfbfmin and zvfbfwma in GCC. Wang Feng will post after dragon boat festival. BR, Fei From: Jin Ma Date: 2024-06-07 15:35 To: gcc-patches; zengxiao CC: jeffreyalaw; kito.cheng; juzhe.zhong; jinma.contrib; Jin Ma Subject: [RE] [v2] RISC-V: Add Zfbfmin extension Hi,

Re: [PATCH] libstdc++: Optimize std::gcd

On Fri, 7 Jun 2024 at 09:57, Sam James wrote: > > Stephen Face writes: > > > This patch is to optimize the runtime execution of gcd. Mathematically, > > it computes with the same algorithm as before, but subtractions and > > branches are rearranged to encourage generation of code that can use > >

[committed] libstdc++: Optimize std::to_address

Tested x86_64-linux. Pushed to trunk. -- >8 -- We can use if-constexpr and variable templates to simplify and optimize std::to_address. This should compile faster (and run faster for -O0) than dispatching to the pre-C++20 std::__to_address overloads. libstdc++-v3/ChangeLog: * include/bi

Re: [PATCH] ifcvt: Clarify if_info.original_cost.

> Is there any way we can avoid using pattern_cost here? Using it means > that we can make use of targetm.insn_cost for the jump but circumvent > it for the condition, giving a bit of a mixed metric. > > (I realise there are existing calls to pattern_cost in ifcvt.cc, > but if possible I think we

[x86 PATCH] PR target/115351: RTX costs for *concatditi3 and *insvti_highpart.

This patch addresses PR target/115351, which is a code quality regression on x86 when passing floating point complex numbers. The ABI considers these arguments to have TImode, requiring interunit moves to place the FP values (which are actually passed in SSE registers) into the upper and lower pa

Re: [PATCH] fixincludes: bypass some fixes for recent darwin headers

Hi FX, > On 7 Jun 2024, at 09:57, FX Coudert wrote: > > macOS SDKs sometimes contain non-standard constructs, and require fixes > through fixincludes. However, they are typically fixed in later SDK versions, > although the process can be slow. Fixes have accumulated, which may be needed > on

[PATCH] fixincludes: bypass some fixes for recent darwin headers

Hi, macOS SDKs sometimes contain non-standard constructs, and require fixes through fixincludes. However, they are typically fixed in later SDK versions, although the process can be slow. Fixes have accumulated, which may be needed only for some older versions of the SDKs. They should be bypass

Re: [PATCH 1/4] Relax COND_EXPR reduction vectorization SLP restriction

Thanks Richard. Created https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115383 Thanks, Kugan On Fri, Jun 7, 2024 at 5:51 PM Richard Biener wrote: > > On Fri, 7 Jun 2024, Kugan Vivekanandarajah wrote: > > > Hi Richard, > > > > This seems to have introduced a regression. I am seeing ICE while > > bui

[PATCH v2 1/2] arm: Zero/Sign extends for CMSE security on Armv8-M.baseline [PR115253]

Properly handle zero and sign extension for Armv8-M.baseline as Cortex-M23 can have the security extension active. Currently, there is a internal compiler error on Cortex-M23 for the epilog processing of sign extension. This patch addresses the following CVE-2024-0151 for Armv8-M.baseline. gcc/Ch

Re: [Commited, Patch, Fortran/90068] Add finalizer creation to array constructor for functions of derived type.

Hi Paul, and thanks for the review. Merged as gcc-15-1090-g51046e46ae6. > I had been working in exactly the same area to correct the implementation > of finalization of function results in array constructors. However, I > couldn't see a light way of having the finalization occur at the correct >

[PATH 0/2] arm: Zero/Sign extends for CMSE security on

Hi, Updated the patch to also fix the Cortex-M55 issue reported in PR115253 and updated the commit message to mention the PR number. Initial issue reported at https://linaro.atlassian.net/browse/GNU-1205. Ok for these branches? - releases/gcc-11 - releases/gcc-12 - releases/gcc-13 - releases/

[PATCH v2 2/2] testsuite: Fix expand-return CMSE test for Armv8.1-M [PR115253]

For Armv8.1-M, the clearing of the registers is handled differently than for Armv8-M, so update the test case accordingly. gcc/testsuite/ChangeLog: PR target/115253 * gcc.target/arm/cmse/extend-return.c: Update test case condition for Armv8.1-M. Signed-off-by: Torbjörn SV

Re: [PATCH] libstdc++: Optimize std::gcd

Stephen Face writes: > This patch is to optimize the runtime execution of gcd. Mathematically, > it computes with the same algorithm as before, but subtractions and > branches are rearranged to encourage generation of code that can use > flags from the subtractions for conditional moves. Addition

Re: [PATCH v3] libstdc++: Fix std::ranges::iota not in numeric [PR108760]

On Thu, 6 Jun 2024 at 21:49, Michael Levine (BLOOMBERG/ 731 LEX) wrote: > > To test the theory that this issue was unrelated to my patch, I moved the > out_value_result definition into std/numeric and restored the version of > bits/ranges_algobase.h to the version in master. I kept the include l

Re: [PATCH] [libstdc++] drop workaround for clang<=7 (was: [libstdc++] add _GLIBCXX_CLANG to workaround predefined __clang__)

On Fri, 7 Jun 2024 at 05:43, Alexandre Oliva wrote: > > On May 31, 2024, Alexandre Oliva wrote: > > >> I think we could drop this kluge entirely, clang 7 is old now, we > >> generally only support the most recent 3 or 4 clang versions. > > > Fine with me, but I'd do that in a separate later patch

Re: [patch, rs6000, middle-end 0/1] v1: Add implementation for different targets for pair mem fusion

Ajit Agarwal writes: >>> + >>> + df_ref use; >>> + df_insn_info *insn_info = DF_INSN_INFO_GET (info->rtl ()); >>> + FOR_EACH_INSN_INFO_DEF (use, insn_info) >>> +{ >>> + struct df_link *def_link = DF_REF_CHAIN (use); >>> + >>> + if (!def_link || !def

Re: [PATCH] OpenMP: warn about iteration var modifications in loop body

On Wed, Mar 06, 2024 at 06:08:47PM +0100, Frederik Harwath wrote: > Subject: [PATCH] OpenMP: warn about iteration var modifications in loop body Note, the partially rewritten OpenMP loop transformations changes are now in. See below. > --- a/gcc/gimplify.cc > +++ b/gcc/gimplify.cc > @@ -235,6 +23

Re: [Patch, PR Fortran/90072] Polymorphic Dispatch to Polymophic Return Type Memory Leak

Hi Paul, thank you for the review. No need to apologize. I am happily working on and will ping if I get no reviews. Btw, Mikael, Nikolas and I are covered by the same funding and agreed to not review each others work to prevent any "smells", like "they follow there own agenda". We can of course b

Re: [PATCH 1/4] Relax COND_EXPR reduction vectorization SLP restriction

On Fri, 7 Jun 2024, Kugan Vivekanandarajah wrote: > Hi Richard, > > This seems to have introduced a regression. I am seeing ICE while > building TSVC_2 for AARCH64 > with -O3 -flto -mcpu=neoverse-v2 -msve-vector-bits=128 > > tsvc.c: In function 's331': > tsvc.c:2744:8: internal compiler error: S

[PATCH] Fix fold-left reduction vectorization with multiple stmt copies

There's a typo when code generating the mask operand for conditional fold-left reductions in the case we have multiple stmt copies. The latter is now allowed for SLP and possibly disabled for non-SLP by accident. This fixes the observed run-FAIL for gcc.dg/vect/vect-cond-reduc-in-order-2-signed-z

Re: [PATCH 1/4] Relax COND_EXPR reduction vectorization SLP restriction

Hi Richard, This seems to have introduced a regression. I am seeing ICE while building TSVC_2 for AARCH64 with -O3 -flto -mcpu=neoverse-v2 -msve-vector-bits=128 tsvc.c: In function 's331': tsvc.c:2744:8: internal compiler error: Segmentation fault 2744 | real_t s331(struct args_t * func_args)

Re: [patch, rs6000, middle-end 0/1] v1: Add implementation for different targets for pair mem fusion

Hello Richard: On 07/06/24 4:24 am, Richard Sandiford wrote: > Ajit Agarwal writes: >> On 06/06/24 8:03 pm, Richard Sandiford wrote: >>> Ajit Agarwal writes: On 06/06/24 2:28 pm, Richard Sandiford wrote: > Hi, > > Just some comments on the fuseable_load_p part, since that's what

[RE] [v2] RISC-V: Add Zfbfmin extension

Hi, Is there a plan to implement zvfbfmin and zvfbfwma? Or how can I get the relevant patches in advance for testing? By the way, The LLVM seems to be fully implemented now :-) Ref: https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/293 https://github.com/riscv-non-isa/rvv-intrinsic-doc

[PATCH] bitint: Fix up lower_addsub_overflow [PR115352]

Hi! The following testcase is miscompiled because of a flawed optimization. If one changes the 65 in the testcase to e.g. 66, one gets: ... _25 = .USUBC (0, _24, _14); _12 = IMAGPART_EXPR <_25>; _26 = REALPART_EXPR <_25>; if (_23 >= 1) goto ; [80.00%] else goto ; [20.00%] :

Re: [Patch, Fortran/90068] Add finalizer creation to array constructor for functions of derived type.

Hi Andre, I had been working in exactly the same area to correct the implementation of finalization of function results in array constructors. However, I couldn't see a light way of having the finalization occur at the correct time; "If an executable construct references a nonpointer function, the