Thanks Robin for comments. > Can we replace step 3 and 4 with sub lt, -1 directly when > it's supposed to be optimized like that anyway?
Sure thing, will update in v3. > When you say other variants are still to be implemented > does that also include variants for zbb with min/max > or zicond? No, I mean some other forms like branch need the improvement from the middle end(aka widen_mul). Pan -----Original Message----- From: Robin Dapp <rdapp....@gmail.com> Sent: Friday, June 7, 2024 6:18 PM To: Li, Pan2 <pan2...@intel.com>; gcc-patches@gcc.gnu.org Cc: rdapp....@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com Subject: Re: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int Hi Pan, > + /* Step-2: lt = x < y */ > + riscv_emit_binary (LTU, pmode_lt, pmode_x, pmode_y); > + > + /* Step-3: lt = -lt */ > + riscv_emit_unary (NEG, pmode_lt, pmode_lt); > + > + /* Step-4: lt = ~lt */ > + riscv_emit_unary (NOT, pmode_lt, pmode_lt); Can we replace step 3 and 4 with sub lt, -1 directly when it's supposed to be optimized like that anyway? I was a bit irritated when reading the code because I figured we could surely save one instruction there but then realized that the cover letter has the shorter sequence. The rest LGTM. When you say other variants are still to be implemented does that also include variants for zbb with min/max or zicond? Regards Robin
