On Tue, 3 Oct 2023, Jakub Jelinek wrote:
> Hi!
>
> On Sat, Sep 30, 2023 at 11:57:38AM +0200, Jakub Jelinek wrote:
> > > This fixes PR111369, where one of the bitint*.c tests FAILs with
> > > GCC_TEST_RUN_EXPENSIVE=1.
> >
> > Though, I think there is an preexisting issue which the
> > build_nonst
On Sat, 30 Sep 2023, Jakub Jelinek wrote:
> On Sat, Sep 30, 2023 at 11:44:59AM +0200, Jakub Jelinek wrote:
> > I really can't figure out why one would need to add extra casts.
> > type must be an integral type which has BIT_NOT_EXPR applied on it
> > which yields all ones and we need a type in whi
On Sat, 30 Sep 2023, Jakub Jelinek wrote:
> Hi!
>
> I really can't figure out why one would need to add extra casts.
> type must be an integral type which has BIT_NOT_EXPR applied on it
> which yields all ones and we need a type in which negating 0 or 1
> range will yield 0 or all ones, I think a
LGTM!
Thanks!
在 2023/10/3 上午11:46, Xi Ruoyao 写道:
When I added copysign support for LoongArch (r13-3702), we did not have
a copysign RTL insn, so I had to use UNSPEC to represent the copysign
instruction. Now the copysign RTX code has been added in r14-1586, so
this patch removes those UNSPECs,
> From: Christophe Lyon
> Date: Tue, 3 Oct 2023 15:20:39 +0200
> The patch passed almost all our CI configurations, except arm-eabi when
> testing with
> -mthumb/-march=armv6s-m/-mtune=cortex-m0/-mfloat-abi=soft/-mfpu=auto
> where is causes these failures:
> FAIL: 29_atomics/atomic_flag/clear/1.
> From: Christophe Lyon
> Date: Tue, 3 Oct 2023 15:20:39 +0200
> Maybe we need a new variant of dg-require-thread-fence ?
Yes: many of the dg-require-thread-fence users need
something stronger. Tested arm-eabi together with the next
patch (2/2) with
RUNTESTFLAGS=--target_board=arm-sim/-mthumb/-
On Tue, 3 Oct 2023, 18:19 Tom Tromey, wrote:
> flake8 pointed out that is_specialization_of in xmethods.py looks at a
> global that wasn't added to the file. This patch correct the
> oversight.
>
OK, thanks
>
> libstdc++-v3/ChangeLog:
>
> * python/libstdcxx/v6/xmethods.py (_versioned
On Tue, 3 Oct 2023, 23:55 Jonathan Wakely, wrote:
>
>
> On Tue, 3 Oct 2023, 19:27 Tom Tromey, wrote:
>
>> Some code in the pretty-printers seems to assume that the
>> _versioned_namespace global might be None (or the empty string).
>> However, doesn't occur, as the variable is never reassigned.
On Tue, 3 Oct 2023, 19:27 Tom Tromey, wrote:
> Some code in the pretty-printers seems to assume that the
> _versioned_namespace global might be None (or the empty string).
> However, doesn't occur, as the variable is never reassigned.
>
ok for trunk, but we should just remove that bit from xmeth
On Tue, Oct 3, 2023 at 12:04 PM Brendan Shanks wrote:
>
> + ret = posix_spawnattr_init (&attr);
> + if (ret) { *err = ret; *errmsg = "posix_spawnattr_init"; goto exit; }
Sorry, but let's keep the formatting used in the rest of the file.
if (ret != 0)
{
*err = ret;
*errmsg = "posix_sp
The RISC-V Ztso extension currently has no effect on generated code.
With the additional ordering constraints guarenteed by Ztso, we can emit
more optimized atomic mappings than the RVWMO mappings.
This PR implements the Ztso psABI mappings[1].
[1] https://github.com/riscv-non-isa/riscv-elf-psabi
On rv32 targets, this patch fixes ztso testcases errors like this:
cc1: error: ABI requires '-march=rv32'
2023-08-11 Patrick O'Neill
gcc/testsuite/ChangeLog:
* gcc.target/riscv/amo-table-ztso-amo-add-1.c: Add -mabi=lp64d
to dg-options.
* gcc.target/riscv/amo-table-ztso-a
From: Jeff Law
amo-table-ztso-load-3 the coordination branch after merging up the Ztso changes
due to a spurious newline in the output causing scan-function-body to fail.
There's probably an over-zealous .* or similar regexp in the framework. I
didn't see it in a quick scan, but could have easil
I vaugely recall some discussion about backporting the Ztso mappings
along with the RVWMO mappings. Now that the RVWMO mappings have been
backported for 13.3, is there interest in also backporting the Ztso
mappings?
Tested using for regressions using rv32gc/rv64gc glibc.
Jeff Law (1):
[RISCV][c
On Tue, 19 Sep 2023, Mark Wielaard wrote:
>> Although there were some positive responses (on list and on irc) it is
>> sometimes hard to know if there really is consensus for these kind of
>> infrastructure tweaks. But I believe there is at least no sustained
>> opposition to changing the gcc-patch
On 10/3/23 14:55, Jeff Law wrote:
On 10/3/23 14:19, Patrick O'Neill wrote:
Some characters are escaped which causes the testcase to fail. This
patch restores the original characters.
Tested for regressions using multilib rv32gcv-ilp32d, rv64gcv-lp64d.
gcc/testsuite/ChangeLog:
* gcc.ta
On 10/3/23 08:41, Patrick Palka wrote:
On Mon, 2 Oct 2023, Patrick Palka wrote:
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look
OK for trunk?
-- >8 --
The relationship between tsubst_copy_and_build and tsubst_copy (two of
the main template argument substitution routines for
On 10/3/23 14:19, Patrick O'Neill wrote:
Some characters are escaped which causes the testcase to fail. This
patch restores the original characters.
Tested for regressions using multilib rv32gcv-ilp32d, rv64gcv-lp64d.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/fortran/pr111566.
Properly check for pointers instead of just using range_info_get_range.
bootstrapped on 86_64-pc-linux-gnu (and presumably AIX too :-) with no
regressions.
On 10/3/23 12:53, David Edelsohn wrote:
AIX bootstrap is happier with the patch.
Thanks, David
commit d8808c37d29110872fa51b98e71aef9e1
On 10/3/23 12:48, David Malcolm wrote:
As mentioned in my Cauldron talk, this patch adds a call to
diagnostic_show_locus to the "required from here" messages
in print_instantiation_partial_context_line, so that e.g., rather
than the rather mystifying:
In file included from ../x86_64-pc-linux-gnu
This revision changes from using DK_PEDWARN for permerror-with-option to using
DK_PERMERROR.
Tested x86_64-pc-linux-gnu. OK for trunk?
-- 8< --
In the discussion of promoting some pedwarns to be errors by default, rather
than move them all into -fpermissive it seems to me to make sense to suppo
On 10/2/23 06:57, Kito Cheng wrote:
On Tue, Sep 26, 2023 at 10:59 AM Patrick O'Neill wrote:
stdint.h can be replaced with stdint-gcc.h to resolve some missing
system headers in non-multilib installations.
Tested using glibc rv32gcv and rv64gcv on r14-4258-gc9837443075.
gcc/ChangeLog:
Some characters are escaped which causes the testcase to fail. This
patch restores the original characters.
Tested for regressions using multilib rv32gcv-ilp32d, rv64gcv-lp64d.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/fortran/pr111566.f90: Restore escaped
characters.
Sign
Indeed ! Here is the right one.
On 03/10/2023 11:52, Jonathan Wakely wrote:
On Mon, 2 Oct 2023 at 18:07, François Dumont wrote:
Hi
Gentle reminder for this minor patch.
It looks like you attached the wrong patch.
Thanks
On 23/09/2023 22:10, François Dumont wrote:
I'm eventually fixing t
Hi,
This patch implements pex_unix_exec_child using posix_spawn when
available.
This should especially benefit recent macOS (where vfork just calls
fork), but should have equivalent or faster performance on all
platforms.
In addition, the implementation is substantially simpler than the
vfork+exe
Hi!
On Sat, Sep 30, 2023 at 11:57:38AM +0200, Jakub Jelinek wrote:
> > This fixes PR111369, where one of the bitint*.c tests FAILs with
> > GCC_TEST_RUN_EXPENSIVE=1.
>
> Though, I think there is an preexisting issue which the
> build_nonstandard_integer_type didn't help with; if type is signed 1-
Hi!
My relatively recent changes to these simplifiers to avoid
doing build_nonstandard_integer_type (primarily for BITINT_TYPE)
broke PR111668, a recurrence of the PR110487 bug.
I thought the build_nonstandard_integer_type isn't ever needed there,
but there is one special case where it is.
For the
On 10/2/23 18:12, Vineet Gupta wrote:
On 9/28/23 12:52, Vineet Gupta wrote:
On 9/28/23 05:53, Jeff Law wrote:
Vineet -- assuming Vlad's patch goes in, the other obvious candidate
for this would be the mvconst_internal define_insn_and_split where
we'd probably want to reject the insn as a
On Tue, 2023-10-03 at 13:11 -0400, Andrew MacLeod wrote:
>
> On 10/3/23 13:02, David Malcolm wrote:
> > On Tue, 2023-10-03 at 10:32 -0400, Andrew MacLeod wrote:
> > > Pass counting in VRP is used to decide when to call early VRP,
> > > pass
> > > the
> > > flag to enable warnings, and when the fin
Some code in the pretty-printers seems to assume that the
_versioned_namespace global might be None (or the empty string).
However, doesn't occur, as the variable is never reassigned.
libstdc++-v3/ChangeLog:
* python/libstdcxx/v6/printers.py: Assume that
_versioned_namespace is no
flake8 pointed out that is_specialization_of in xmethods.py looks at a
global that wasn't added to the file. This patch correct the
oversight.
libstdc++-v3/ChangeLog:
* python/libstdcxx/v6/xmethods.py (_versioned_namespace):
Define.
---
libstdc++-v3/python/libstdcxx/v6/xmethods.
While I was working on the flake8/black patches, flake8 pointed out a
bug in xmethods.py. This is fixed in patch 1. Then I found the
checks of _versioned_namespace to be a bit odd, so I wrote patch 2.
Tested on x86-64 Fedora 36.
Tom
On 10/3/23 13:02, David Malcolm wrote:
On Tue, 2023-10-03 at 10:32 -0400, Andrew MacLeod wrote:
Pass counting in VRP is used to decide when to call early VRP, pass
the
flag to enable warnings, and when the final pass is.
If you try to add additional passes, this becomes quite fragile. This
pat
Hi,
function dump_lto_records ought to dump to its parameter OUT but was
dumping expressions to dump_file. This is corrected by this patch and
while at at, I also made the modref_summary::dump member function
const so that it is callable from more contexts.
I have committed this patch as obvious
Hello,
On Mon, Sep 25 2023, Jan Hubicka wrote:
[...]
>> >> +static void
>> >> +purge_transitive_uses (tree name, hash_set *killed_ssas)
>> >> +{
>> >> + imm_use_iterator imm_iter;
>> >> + gimple *stmt;
>> >> +
>> >> + FOR_EACH_IMM_USE_STMT (stmt, imm_iter, name)
>> >> +{
>> >> + if
On Tue, 2023-10-03 at 10:32 -0400, Andrew MacLeod wrote:
> Pass counting in VRP is used to decide when to call early VRP, pass
> the
> flag to enable warnings, and when the final pass is.
>
> If you try to add additional passes, this becomes quite fragile. This
> patch simply chooses the pass bas
perfect. I'll check it in when my testrun is done.
Thanks .. . and sorry :-)
Andrew
On 10/3/23 12:53, David Edelsohn wrote:
AIX bootstrap is happier with the patch.
Thanks, David
On Tue, Oct 3, 2023 at 12:30 PM Andrew MacLeod
wrote:
Give this a try.. I'm testing it here, but x86
Hi Honza,
My current patch set for AArch64 VLA omp codegen started failing on
gcc.dg/gomp/pr87898.c after this. I traced it back to
'move_sese_region_to_fn' in tree/cfg.cc not setting count for the bb
created.
I was able to 'fix' it locally by setting the count of the new bb to the
accumula
On 10/2/23 20:38, Kito Cheng wrote:
Proposed fix, and verified with "mawk" and "gawk -P" (gawk with posix
mode) on my linux also some other report it work on freebsd, just wait
review :)
https://gcc.gnu.org/pipermail/gcc-patches/2023-October/631785.html
OK
jeff
On 10/3/23 09:55, Roger Sayle wrote:
There are a small handful of middle-end maintainers/reviewers that
understand and appreciate the difference between the RTL statements:
(set (subreg:HI (reg:SI x)) (reg:HI y))
and
(set (strict_lowpart:HI (reg:SI x)) (reg:HI y))
If one (or more) of them
AIX bootstrap is happier with the patch.
Thanks, David
On Tue, Oct 3, 2023 at 12:30 PM Andrew MacLeod wrote:
> Give this a try.. I'm testing it here, but x86 doesn't seem to show it
> anyway for some reason :-P
>
> I think i needed to handle pointers special since SSA_NAMES handle
> pointer ra
As mentioned in my Cauldron talk, this patch adds a call to
diagnostic_show_locus to the "required from here" messages
in print_instantiation_partial_context_line, so that e.g., rather
than the rather mystifying:
In file included from ../x86_64-pc-linux-gnu/libstdc++-v3/include/memory:78,
Give this a try.. I'm testing it here, but x86 doesn't seem to show it
anyway for some reason :-P
I think i needed to handle pointers special since SSA_NAMES handle
pointer ranges different.
Andrew
On 10/3/23 11:47, David Edelsohn wrote:
This patch caused a bootstrap failure on AIX.
durin
Hi Roger,
It is not necessary to do any mods on your patch. I've just answered
the questions which you asked me. The adds are faster for the ARC CPUs
which are still in production, and I suppose we can leverage the LP
instruction use with DBNZ instructions for implementing loops. I'll
come back to
On Tue, 3 Oct 2023, Sandra Loosemore wrote:
> Is __attribute__ also considered more powerful than the standard [[]] syntax,
> enough to recommend it over writing standard-conforming code?
Anything that can be expressed with __attribute__ should also be
expressible with [[]], so use of [[]] is pr
huh. thanks, I'll have a look.
Andrew
On 10/3/23 11:47, David Edelsohn wrote:
This patch caused a bootstrap failure on AIX.
during GIMPLE pass: evrp
/nasfarm/edelsohn/src/src/libgcc/libgcc2.c: In function '__gcc_bcmp':
/nasfarm/edelsohn/src/src/libgcc/libgcc2.c:2910:1: internal compiler
There are a small handful of middle-end maintainers/reviewers that
understand and appreciate the difference between the RTL statements:
(set (subreg:HI (reg:SI x)) (reg:HI y))
and
(set (strict_lowpart:HI (reg:SI x)) (reg:HI y))
If one (or more) of them could please take a look at
https:
This patch caused a bootstrap failure on AIX.
during GIMPLE pass: evrp
/nasfarm/edelsohn/src/src/libgcc/libgcc2.c: In function '__gcc_bcmp':
/nasfarm/edelsohn/src/src/libgcc/libgcc2.c:2910:1: internal compiler error:
in get_irange, at value-range-storage.cc:343
2910 | }
| ^
0x11b7f4b7
Hi Claudiu,
Thanks for the answers to my technical questions.
If you'd prefer to update arc.md's add3 pattern first,
I'm happy to update/revise my patch based on this
and your feedback, for example preferring add over
asl_s (or controlling this choice with -Os).
Thanks again.
Roger
--
> -Or
Given the implementation of a mechanism of encoding system registers
into GCC, this patch provides the mechanism of validating their use by
the compiler. In particular, this involves:
1. Ensuring a supplied string corresponds to a known system
register name. System registers can be access
This patch adds the `aarch64-sys-regs.def' file to GCC, teaching
the compiler about system registers known to the assembler and how
these can be used.
The macros used to hold system register information reflect those in
use by binutils, a design choice made to facilitate the sharing of data
betwee
On 10/3/23 08:19, Joseph Myers wrote:
On Mon, 2 Oct 2023, Sandra Loosemore wrote:
Going beyond that, though, I think we should also document that the standard
syntax is now the preferred way to do it, and change the examples (except for
the parts documenting the old syntax) to use the new stand
Implement the aarch64 intrinsics for reading and writing system
registers with the following signatures:
uint32_t __arm_rsr(const char *special_register);
uint64_t __arm_rsr64(const char *special_register);
void* __arm_rsrp(const char *special_register);
float __arm
This patch defines the structure of a new .def file used for
representing the aarch64 system registers, what information it should
hold and the basic framework in GCC to process this file.
Entries in the aarch64-system-regs.def file should be as follows:
SYSREG (NAME, CPENC (sn,op1,cn,cm,op2),
Motivated by the need to print system register names in output
assembly, this patch adds the required logic to
`aarch64_print_operand' to accept rtxs of type CONST_STRING and
process these accordingly.
Consequently, an rtx such as:
(set (reg/i:DI 0 x0)
(unspec:DI [(const_string ("amcgc
In implementing the ACLE read/write system register builtins it was
observed that leaving argument type checking to be done at expand-time
meant that poorly-formed function calls were being "fixed" by certain
optimization passes, meaning bad code wasn't being properly picked up
in checking.
Exampl
This patch series adds support for reading and writing to and from
system registers via the relevant ACLE-defined builtins [1], making a
series of additions to the aarch64-specific areas of the compiler to
make this possible.
Firstly, a mechanism for defining system registers is established via a
> From: Christophe Lyon
> Date: Tue, 3 Oct 2023 15:20:39 +0200
> The patch passed almost all our CI configurations, except arm-eabi when
> testing with
> -mthumb/-march=armv6s-m/-mtune=cortex-m0/-mfloat-abi=soft/-mfpu=auto
> where is causes these failures:
> FAIL: 29_atomics/atomic_flag/clear/1.
Pass counting in VRP is used to decide when to call early VRP, pass the
flag to enable warnings, and when the final pass is.
If you try to add additional passes, this becomes quite fragile. This
patch simply chooses the pass based on the data pointer passed in, and
remove the pass counter. T
set_range_info should return TRUE only when it sets a new value. It was
currently returning true whenever it set a value, whether it was
different or not.
With this change, VRP no longer overwrites global ranges DOM has set.
2 testcases needed adjusting that were expecting VRP2 to set a rang
Hi Roger,
It was nice to meet you too.
Thank you in looking into the ARC's non-Barrel Shifter configurations. I will
dive into your patch asap, but before starting here are a few of my comments:
-Original Message-
From: Roger Sayle
Sent: Thursday, September 28, 2023 2:27 PM
To: gcc-
On Mon, 2 Oct 2023, Sandra Loosemore wrote:
> Going beyond that, though, I think we should also document that the standard
> syntax is now the preferred way to do it, and change the examples (except for
> the parts documenting the old syntax) to use the new standard syntax. It's
> been accepted b
ira: Scale save/restore costs of callee save registers with block frequency
In assign_hard_reg(), when computing the costs of the hard registers, the
cost of saving/restoring a callee-save hard register in prolog/epilog is
taken into consideration. However, this cost is not scaled with the entry
b
On Wed, Sep 27, 2023 at 1:38 AM Kewen.Lin wrote:
> Hi,
>
> As PR111367 shows, with prefixed insn supported, some of
> checkings consider it's able to leverage prefixed insn
> for stack protect related load/store, but since we don't
> actually change the emitted assembly for 32 bit, it can
> cause
No functional change intended.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-4379-gc44ca7c01226e0.
gcc/ada/ChangeLog:
* gcc-interface/misc.cc: Use text_info ctor.
gcc/analyzer/ChangeLog:
* analyzer-logging.cc (logger::log_va_partial): Use t
The patch works on AIX.
I have Gawk installed, but it is a very old release before
multi-dimensional array support was added.
Thanks, David
On Mon, Oct 2, 2023 at 10:38 PM Kito Cheng wrote:
> Proposed fix, and verified with "mawk" and "gawk -P" (gawk with posix
> mode) on my linux also some o
Hi!
On Tue, 26 Sept 2023 at 16:34, Hans-Peter Nilsson wrote:
> Tested cris-elf, native x86_64-pc-linux-gnu and arm-eabi.
>
> For arm-eabi, notably lacking any atomic support for the
> default multilib, with --target_board=arm-sim it regressed
> 29_atomics/atomic_flag/cons/value_init.cc with the
On Mon, 2 Oct 2023, Patrick Palka wrote:
> Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look
> OK for trunk?
>
> -- >8 --
>
> The relationship between tsubst_copy_and_build and tsubst_copy (two of
> the main template argument substitution routines for expression trees)
> is rathe
On Tue, Oct 03, 2023 at 02:02:40PM +0200, Martin Jambor wrote:
> Hi,
>
> the testing infrastructure built by Martin Liška contains checking a
> few python scripts in contrib witha tool flake8. That tool recently
> complains that:
>
> contrib/mklog.py:360:45: E711 comparison to None should be '
Hi,
the testing infrastructure built by Martin Liška contains checking a
few python scripts in contrib witha tool flake8. That tool recently
complains that:
contrib/mklog.py:360:45: E711 comparison to None should be 'if cond is None:'
contrib/mklog.py:362:1: E305 expected 2 blank lines after
On Tue, Oct 03, 2023 at 11:41:01AM +, Tamar Christina wrote:
> > We have stablesort method instead of
> > qsort but that would require consistent ordering in the vector (std::sort
> > doesn't ensure stable sorting either).
> >
> > If it is a non-issue, the patch is ok with the above nits fixed
On Fri, Sep 29, 2023 at 10:22 PM Jeff Law wrote:
>
>
>
> On 9/12/23 04:13, Manolis Tsamis wrote:
>
> >>> +
> >>> +/* Get the single reaching definition of an instruction inside a BB.
> >>> + The definition is desired for REG used in INSN.
> >>> + Return the definition insn or NULL if there's n
This is a new RTL pass that tries to optimize memory offset calculations
by moving them from add immediate instructions to the memory loads/stores.
For example it can transform this:
addi t4,sp,16
add t2,a6,t4
shl t3,t2,1
ld a2,0(t3)
addi a2,1
sd a2,8(t2)
into the following (one
> -Original Message-
> From: Jakub Jelinek
> Sent: Tuesday, October 3, 2023 12:02 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; jwak...@redhat.com
> Subject: Re: [PATCH]middle-end: Recursively check
> is_trivially_copyable_or_pair in vec.h
>
> On Tue, Oct 03, 2023 at 10:27
On Tue, Oct 03, 2023 at 10:27:16AM +, Tamar Christina wrote:
> +/* Structure used to track meta-data on PHI arguments used to generate
> + most efficient comparison sequence to slatten a PHI node. */
^^^ typo (at least, never heard
of this word, a
ping
> ping
>
>> [Differences from V1:
>> - Prototype for call_from_call_insn moved before comment block.
>> - Reuse the `call' flag for SYMBOL_REF_LIBCALL.
>> - Fallback to check REG_CALL_DECL in non-direct calls.
>> - New test to check correct behavior for non-direct calls.]
>>
>> There are ma
On 27 September 2023 16:47:27 CEST, Maxim Kuvyrkov
wrote:
>Hi Bernhard,
>
>Thanks, I meant to fix this, but forgot.
np.
>The underlying problem here is that we want to detect which sub-testsuites had
>failures. Current regex doesn't match go's case because there is no "..." at
>the end: "Run
> -Original Message-
> From: Jakub Jelinek
> Sent: Monday, October 2, 2023 2:21 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; jwak...@redhat.com
> Subject: Re: [PATCH]middle-end: Recursively check
> is_trivially_copyable_or_pair in vec.h
>
> On Mon, Oct 02, 2023 at 01:38:5
Ping
On 20/09/23 7:31 am, Surya Kumari Jangala wrote:
> Ping
>
> On 10/09/23 10:58 pm, Surya Kumari Jangala wrote:
>> swap: Fix incorrect lane extraction by vec_extract() [PR106770]
>>
>> In the routine rs6000_analyze_swaps(), special handling of swappable
>> instructions is done even if the webs
On Mon, 2 Oct 2023 at 18:07, François Dumont wrote:
>
> Hi
>
> Gentle reminder for this minor patch.
It looks like you attached the wrong patch.
>
> Thanks
>
> On 23/09/2023 22:10, François Dumont wrote:
> > I'm eventually fixing those tests the same way we manage this problem
> > in libstdc++
Hey,
This patch adds support for the Cortex-X4 CPU to GCC.
Regression testing for aarch64-none-elf target and found no regressions.
Okay for gcc-master? I don't have commit access so if it looks okay,
could someone please help me commit this?
Thanks, Saurabh
gcc/ChangeLog * config/aarc
Richard Sandiford writes:
> Andrea Corallo writes:
>> Hi all,
>> this patch converts a number of multi multi choice patterns within the
>> aarch64 backend to the new syntax.
>>
>> The list of the converted patterns is in the Changelog.
>>
>> For completeness here follows the list of multi choice
Ooop, I screwed up when writing my cover letter of the target
attribute patch set...
On Tue, Oct 3, 2023 at 5:10 PM Kito Cheng wrote:
>
> From: Kito Cheng
>
> Reply-To:
>
> Subject: [PATCH v1 0/4] RISC-V target attribute
>
> In-Reply-To:
>
> This patch set implement target attribute for RISC-V t
riscv_subset_list only accept a full arch string before, but we need to
parse single extension when supporting target attribute, also we may set
a riscv_subset_list directly rather than re-parsing the ISA string
again.
gcc/ChangeLog:
* config/riscv/riscv-subset.h (riscv_subset_list::parse
The target attribute which proposed in [1], target attribute allow user
to specify a local setting per-function basis.
The syntax of target attribute is `__attribute__((target("")))`.
and the syntax of `` describes below:
```
ATTR-STRING := ATTR-STRING ';' ATTR
| ATTR
ATTR:=
Allow those funciton apply from a local gcc_options rather than the
global options.
Preparatory for target attribute, sperate this change for eaiser reivew
since it's a NFC.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
from argument rather than
From: Kito Cheng
Reply-To:
Subject: [PATCH v1 0/4] RISC-V target attribute
In-Reply-To:
This patch set implement target attribute for RISC-V target, which is similar
to other target like x86 or ARM, let user able to set some local setting per
function without changing global settings.
We su
We TARGET__P marcro to test a Mask and InverseMask with user
specified target_variable, however we may want to test with specific
gcc_options variable rather than target_variable.
Like RISC-V has defined lots of Mask with TargetVariable, which is not
easy to use, because that means we need to know
> On Oct 1, 2023, at 00:36, Ramana Radhakrishnan
> wrote:
>
> + linaro-toolchain as I don't understand the CI issues on patchwork.
>
>
...
> Ok if no regressions but as you might get nagged by the post commit CI ...
I don't see any pre-commit failures for this patch, but regardless of what
r
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