Re: Re: [PATCH v3] RISC-V: Elimilate warning in class vcreate

Committed, thanks juzhe. -- Li Xu >lgtm > Replied Message >FromLi Xu >Date09/12/2023 14:20 >togcc-patc...@gcc.gnu.org >cckito.ch...@gmail.com, >pal...@dabbelt.com, >juzhe.zh...@rivai.ai, >xuli >Subject[PATCH v3] RISC-V: Elimilate warning in class vcreate

Re: Re: [PATCH V3] RISC-V: Support Dynamic LMUL Cost model

>> As long as we're just looking for the maximum number of live registers, >> we can use a sliding-window approach: create a structure with all >> start and end points, sort it, and increase the current pressure >> if we start a new range or decrease. That's O(n log n). I failed to see it can he

Re: [PATCH 2/2] libstdc++: Optimize is_scoped_enum trait performance

On Tue, 12 Sept 2023, 01:21 Ken Matsui via Libstdc++, wrote: > This patch optimizes the performance of the is_scoped_enum trait > by dispatching to the new __is_scoped_enum built-in trait. > OK for trunk (after the built-in is in the front end), thanks. > libstdc++-v3/ChangeLog: > > *

[PATCH V4] RISC-V: Support Dynamic LMUL Cost model

This patch support dynamic LMUL cost modeling with --param=riscv-autovec-lmul=dynamic. Consider this following case: void foo (int32_t *__restrict a, int32_t *__restrict b,int32_t *__restrict c, int32_t *__restrict a2, int32_t *__restrict b2, int32_t *__restrict c2, int32_t *__res

[PATCH v3] RISC-V: Elimilate warning in class vcreate

From: xuli The following is the content of class vcreate: class vcreate : public function_base { public: gimple *fold (gimple_folder &f) const override { } rtx expand (function_expander &e) const override { return NULL_RTX; } }; The warning caused is: ./riscv-gcc/gcc/co

Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

Hi Jeff, On 2023/9/12 11:47, Jeff Law wrote: But that condition is _not_ generally sufficient to prevent these insns from existing during sched1.  ie, a pass between split1 and sched1 could create these patterns and successfully match them.  That in turn would trigger the assertion. can_crea

[PATCH v2] RISC-V: Elimilate warning in class vcreate

From: xuli The following is the content of class vcreate: class vcreate : public function_base { public: gimple *fold (gimple_folder &f) const override { } rtx expand (function_expander &e) const override { return NULL_RTX; } }; The warning caused is: ./riscv-gcc/gcc/co

[PATCH] RISC-V: Elimilate warning

From: xuli ./riscv-gcc/gcc/config/riscv/riscv-vector-builtins-bases.cc:1719:34: warning: unused parameter 'e' [-Wunused-parameter] rtx expand (function_expander &e) const override ^ gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.

[PATCH 2/2] libstdc++: Optimize is_member_pointer trait performance

This patch optimizes the performance of the is_member_pointer trait by dispatching to the new __is_member_pointer built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_member_pointer): Use __is_member_pointer built-in trait. (is_member_pointer_v): Likewise.

[PATCH 1/2] c++: Implement __is_member_pointer built-in trait

This patch implements built-in trait for std::is_member_pointer. gcc/cp/ChangeLog: * cp-trait.def (IS_MEMBER_POINTER): Define __is_member_pointer. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_MEMBER_POINTER. * semantics.cc (trait_expr_value): Likewise. (fi

[PATCH 0/2] Optimize is_member_pointer trait performance

This patch series optimizes is_member_pointer trait performance. The first patch implements __is_member_pointer built-in trait. The second patch optimizes is_member_pointer trait performance by using __is_member_pointer built-in trait if available. The performance improvement is shown in the follo

[PATCH] MATCH: Simplify (a CMP1 b) ^ (a CMP2 b)

This adds the missing optimizations here. Note we don't need to match where CMP1 and CMP2 are complements of each other as that is already handled elsewhere. I added a new executable testcase to make sure we optimize it correctly as I had originally messed up one of the entries for the resulting c

Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

On 9/11/23 21:17, Lehua Ding wrote: Hi Jeff, On 2023/9/12 11:00, Jeff Law wrote: I'd rather be consistent and make it policy that every insn has a type. Since the type set here will not be used by sched pass (these insn pattern will not exit at shced pass since use define_insn_and_split w

Re: [PATCH v2 2/2] riscv: Add support for str(n)cmp inline expansion

On 9/6/23 10:07, Christoph Muellner wrote: From: Christoph Müllner This patch implements expansions for the cmpstrsi and cmpstrnsi builtins for RV32/RV64 for xlen-aligned strings if Zbb or XTheadBb instructions are available. The expansion basically emits a comparison sequence which compare

Re: [PATCH v2 1/2] riscv: Add support for strlen inline expansion

On 9/6/23 10:07, Christoph Muellner wrote: From: Christoph Müllner This patch implements the expansion of the strlen builtin for RV32/RV64 for xlen-aligned aligned strings if Zbb or XTheadBb instructions are available. The inserted sequences are: rv32gc_zbb (RV64 is similar): add

Re: Re: [PATCH] RISC-V: Add vcreate intrinsics for RVV tuple types

Committed, thanks juzhe and kito. -- Li Xu >LGTM, thanks for implement this :) > >On Tue, Sep 12, 2023 at 10:16 AM juzhe.zh...@rivai.ai > wrote: >> >> Thanks for support it. >> LGTM from my side. >> Wait for kito's more comments. >> >> >> >> juzhe.zh...@rivai.ai >> >> From: Li Xu >> Dat

Re: [PATCH 2/2] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t

On 2023/09/12 11:44, Kito Cheng wrote: > LGTM, I think llvm and GCC are inconsistent for those intrinsics API > is really unfortunate...so really appreciate making those API align :) I guess that you mean LGTM to this patch set (given the context). If so, I will commit this patch set later. > And

Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

Hi Jeff, On 2023/9/12 11:00, Jeff Law wrote: I'd rather be consistent and make it policy that every insn has a type. Since the type set here will not be used by sched pass (these insn pattern will not exit at shced pass since use define_insn_and_split with condition `TARGET_VECTOR && can_cre

Re: [PATCH 3/3] [V2] [RISC-V] support cm.mva01s cm.mvsa01 in zcmp

On 9/7/23 14:33, Palmer Dabbelt wrote: On Thu, 07 Sep 2023 13:16:36 PDT (-0700), dimi...@dinux.eu wrote: Hi, This patch appears to have caused PR 111259. Thanks.  Looks like wer'e not running our tests with RTL checking, Patrick is going to try and see if we've got compute time left for s

Re: [PATCH v5] RISC-V:Optimize the MASK opt generation

On 9/7/23 19:26, Feng Wang wrote: Supported ISA specs (for use with the -misa-spec= option): diff --git a/gcc/opt-functions.awk b/gcc/opt-functions.awk index 36de4639318..cbfcf7dabcf 100644 --- a/gcc/opt-functions.awk +++ b/gcc/opt-functions.awk @@ -387,3 +387,14 @@ function integer_range_i

Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

On 9/11/23 20:33, Lehua Ding wrote: Hi Edwin, Sorry to bother you. I have a small question for you. On 2023/9/12 6:52, Edwin Lu wrote: --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -649,7 +649,8 @@ (define_insn_and_split "*cond_" gen_int_mode (GET_MODE_NUN

[PATCH 1/2] c++: Implement __is_bounded_array built-in trait

This patch implements built-in trait for std::is_bounded_array. gcc/cp/ChangeLog: * cp-trait.def (IS_BOUNDED_ARRAY): Define __is_bounded_array. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_BOUNDED_ARRAY. * semantics.cc (trait_expr_value): Likewise. (finish

[PATCH 2/2] libstdc++: Optimize is_bounded_array trait performance

This patch optimizes the performance of the is_bounded_array trait by dispatching to the new __is_bounded_array built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_bounded_array_v): Use __is_bounded_array built-in trait. Signed-off-by: Ken Matsui --- libstdc++

[PATCH 0/2] Optimize is_bounded_array trait performance

This patch series optimizes is_bounded_array trait performance. The first patch implements __is_bounded_array built-in trait. The second patch optimizes is_bounded_array trait performance by using __is_bounded_array built-in trait if available. The performance improvement is shown in the following

Re: [PATCH] RISC-V: Add vcreate intrinsics for RVV tuple types

LGTM, thanks for implement this :) On Tue, Sep 12, 2023 at 10:16 AM juzhe.zh...@rivai.ai wrote: > > Thanks for support it. > LGTM from my side. > Wait for kito's more comments. > > > > juzhe.zh...@rivai.ai > > From: Li Xu > Date: 2023-09-12 10:08 > To: gcc-patches > CC: kito.cheng; palmer; juzhe.

Re: [PATCH 2/2] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t

LGTM, I think llvm and GCC are inconsistent for those intrinsics API is really unfortunate...so really appreciate making those API align :) And did you have plan to add riscv_crypto.h after updating/fixing all builtin? On Tue, Sep 12, 2023 at 9:29 AM Tsukasa OI via Gcc-patches wrote: > > From: Ts

Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

Hi Edwin, Sorry to bother you. I have a small question for you. On 2023/9/12 6:52, Edwin Lu wrote: --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -649,7 +649,8 @@ (define_insn_and_split "*cond_" gen_int_mode (GET_MODE_NUNITS (mode), Pmode)}; riscv_vector::expa

Re: [PATCH] RISC-V: Add vcreate intrinsics for RVV tuple types

Thanks for support it. LGTM from my side. Wait for kito's more comments. juzhe.zh...@rivai.ai From: Li Xu Date: 2023-09-12 10:08 To: gcc-patches CC: kito.cheng; palmer; juzhe.zhong; pan2.li; gaofei; wangfeng; xuli Subject: [PATCH] RISC-V: Add vcreate intrinsics for RVV tuple types From: xuli

[PATCH] RISC-V: Add vcreate intrinsics for RVV tuple types

From: xuli gcc/ChangeLog: * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): (BASE): New class. * config/riscv/riscv-vector-builtins-bases.h: Ditto. * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support. * config/ri

Re: [PATCH v5] RISC-V:Optimize the MASK opt generation

Hi Feng: This version is LGTM, but I guess I would like to ask Jeff or another global maintainer to approve that, anyway I'll follow up this in the next gcc sync up meeting :) On Fri, Sep 8, 2023 at 9:28 AM Feng Wang wrote: > > Accoring to Kito's advice, using "MASK(name) Var(other_flag_name)" >

Re: [PATCH 0/2] resolve confilct between zcmp multi push/pop and shrink-wrap-separate

Pushed to trunk, thanks :) On Wed, Sep 6, 2023 at 5:41 PM Fei Gao wrote: > > Enable muti push and pop for Zcmp when shrink-wrap-separate is ineffective. > > Fei Gao (2): > allow targets to check shrink-wrap-separate enabled or not > [V2][RISC-V] enable muti push and pop for Zcmp when shrink-w

RE: RE: [PATCH v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic

Got it, will have a try. Pan From: juzhe.zh...@rivai.ai Sent: Tuesday, September 12, 2023 9:30 AM To: Li, Pan2 Cc: kito.cheng ; gcc-patches ; Wang, Yanzhang Subject: Re: RE: [PATCH v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic Add a function call get_non_overloaded_inst

Re: RE: [PATCH v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic

Add a function call get_non_overloaded_instance into instance. The instance already know it is void vmv (void). In this function search the arglist. and return the real non-overloaded decl. juzhe.zh...@rivai.ai From: Li, Pan2 Date: 2023-09-12 09:20 To: 钟居哲 CC: kito.cheng; gcc-patches; Wang, Ya

[PATCH 1/2] RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned

From: Tsukasa OI For bit manipulation operations, input(s) and the manipulated output are better to be unsigned like other target-independent builtins like __builtin_bswap32 and __builtin_popcount. Although this is not completely compatible as before (as the type changes), most code will run nor

[PATCH 2/2] RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t

From: Tsukasa OI This is in parity with the LLVM commit a64b3e92c7cb ("[RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types."). SHA-256, SM3 and SM4 instructions operate on 32-bit integers and upper 32-bits have no effects on RV64 (the output is sign-extended from the original 3

[PATCH 0/2] RISC-V: Change RISC-V bit manipulation / scalar crypto builtin types

Hello, My research suggests my previous RFC patchs will not break any real-world programs (as far as I could find) and I will submit this patch set (previously, two RFC patch sets) for upstream contribution. RFC PATCH 1 (combined to this):

RE: RE: [PATCH v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic

We cannot leverage this instance for correctness. The rfun of below code is the overloaded builtin is for the overloaded function, which is registered as void xxx(void) as aarch64 did to avoid the conflict. Let’s take vmv_v_i32m1 as example in rfun table. Index 0: void vmv_v(void) overloaded In

[PATCH 3/3] libstdc++: Fix std::not_fn perfect forwarding [PR111327]

The previous patch fixed perfect forwarding for std::bind_front. This patch fixes the same issue for std::not_fn. Tested on x86_64-pc-linux-gnu, does this look OK for trunk and perhaps 13? PR libstdc++/111327 libstdc++-v3/ChangeLog: * include/std/functional (_GLIBCXX_NOT_FN_CALL

[PATCH 2/3] libstdc++: Fix std::bind_front perfect forwarding [PR111327]

In order to properly implement a perfect forwarding call wrapper (before 'deducing this' at least) we need a total of 8 operator() overloads, 4 main ones and 4 deleted ones for each const/ref qual pair, as described in section 5.5 of P0847R6. Otherwise the wrapper may not perfectly forward accordi

[PATCH 1/3] libstdc++: Remove std::bind_front specialization for no bound args

This specialization for the case of no bound args, added by r13-4214-gcbd05ca5ab1231, seems to be mostly obsoleted by r13-5033-ge2eab3c4edb6aa which added [[no_unique_address]] to the main template's data members. And the compile time advantage of avoiding an empty tuple and index_sequence seems m

Re: Re: [PATCH 2/2] [RISC-V] Enalble zcmp for -Os

On 2023-09-06 16:06  Kito Cheng wrote: > >On Wed, Sep 6, 2023 at 9:47 AM Fei Gao wrote: >> >> On 2023-09-05 20:02  Kito Cheng wrote: >> > >> >> @@ -5569,7 +5571,9 @@ riscv_avoid_multi_push (const struct >> >> riscv_frame_info *frame) >> >>  { >> >>    if (!TARGET_ZCMP || crtl->calls_eh_return |

[Linaro-TCWG-CI] gcc patch #75674: FAIL: 88 regressions

Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolch...@lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on

Re: RISC-V: Replace not + bitwise_imm with li + bitwise_not

On 9/11/23 13:16, Andrew Waterman via Gcc-patches wrote: Note this is a size-speed tradeoff, as the Zcb extension has a 16-bit-wide C.NOT instruction. Might want to suppress this optimization when Zcb is present and the function is being optimize > for size. Yea, let's gate this on !optimize

Re: Re: [PATCH V3] RISC-V: Support Dynamic LMUL Cost model

>> What about one test with global live ranges? Not a necessity IMHO we can >> still >> add it later. We already have. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-09-12 04:31 To: Juzhe-Zhong; gcc-patches CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw Subject: Re: [PATCH V3] RISC-V: S

Re: [PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

On 9/11/23 16:52, Edwin Lu wrote: Updates autovec instruction that was added after last patch and turns on the assert statement to ensure all new instructions have a type. * config/riscv/autovec-opt.md: Update type * config/riscv/riscv.cc (riscv_sched_variable_issue): Remove a

Re: [PATCH v5] Implement new RTL optimizations pass: fold-mem-offsets.

On 9/9/23 02:46, Manolis Tsamis wrote: This is a new RTL pass that tries to optimize memory offset calculations by moving them from add immediate instructions to the memory loads/stores. For example it can transform this: addi t4,sp,16 add t2,a6,t4 shl t3,t2,1 ld a2,0(t3) a

[PATCH 2/2] libstdc++: Optimize is_scoped_enum trait performance

This patch optimizes the performance of the is_scoped_enum trait by dispatching to the new __is_scoped_enum built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_scoped_enum): Use __is_scoped_enum built-in trait. (is_scoped_enum_v): Likewise. Signed-off-by

[PATCH 1/2] c++: Implement __is_scoped_enum built-in trait

This patch implements built-in trait for std::is_scoped_enum. gcc/cp/ChangeLog: * cp-trait.def (IS_SCOPED_ENUM): Define __is_scoped_enum. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_SCOPED_ENUM. * semantics.cc (trait_expr_value): Likewise.

[PATCH 0/2] Optimize is_scoped_enum trait performance

This patch series optimizes is_scoped_enum trait performance. The first patch implements __is_scoped_enum built-in trait. The second patch optimizes is_scoped_enum trait performance by using __is_scoped_enum built-in trait if available. The performance improvement is shown in the following benchma

Re: RE: [PATCH v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for RVV intrinsic

I don't understand. +tree +resolve_overloaded_builtin (location_t loc, unsigned int code, + vec *arglist) +{ + if (code >= vec_safe_length (registered_functions)) +return NULL_TREE; + + const registered_function *rfun = (*registered_functions)[code]; + + if (!rfun

[Linaro-TCWG-CI] gcc patch #75674: FAIL: 68 regressions

Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolch...@lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on

[PATCH] RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert

Updates autovec instruction that was added after last patch and turns on the assert statement to ensure all new instructions have a type. * config/riscv/autovec-opt.md: Update type * config/riscv/riscv.cc (riscv_sched_variable_issue): Remove assert Signed-off-by: Edwin Lu --- gc

[PATCH 2/2] libstdc++: Optimize is_unbounded_array trait performance

This patch optimizes the performance of the is_unbounded_array trait by dispatching to the new __is_unbounded_array built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_unbounded_array_v): Use __is_unbounded_array built-in trait. Signed-off-by: Ken Matsui --- l

[PATCH 1/2] c++: Implement __is_unbounded_array built-in trait

This patch implements built-in trait for std::is_unbounded_array. gcc/cp/ChangeLog: * cp-trait.def (IS_UNBOUNDED_ARRAY): Define __is_unbounded_array. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_UNBOUNDED_ARRAY. * semantics.cc (trait_expr_value): L

[PATCH 0/2] Optimize is_unbounded_array trait performance

This patch series optimizes is_unbounded_array trait performance. The first patch implements __is_unbounded_array built-in trait. The second patch optimizes is_unbounded_array trait performance by using __is_unbounded_array built-in trait if available. The performance improvement is shown in the f

[PING][PATCH 0/9] Add btf_decl_tag C attribute

Ping. This series adds a new C language attribute for recording additional information in DWARF and BTF, similar to an existing attribute in clang. https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624156.html There are components in c-family, dwarf, ctf and btf. Thanks. On 7/11/23 14:57, Dav

Re: [r14-3823 Regression] FAIL: c-c++-common/analyzer/compound-assignment-1.c -std=c++98 (test for warnings, line 72) on Linux/x86_64

On Mon, Sep 11, 2023 at 07:27:57PM +0200, Benjamin Priour via Gcc-patches wrote: > Thanks for the report, > > After investigation it seems the location of the new dejagnu directive for > C++ differs depending on the configuration. > The expected warning is still emitted, but its location differ sl

[PATCH] MATCH: [PR111348] add missing :c to cmp in the `(a CMP b) ? minmax : minmax` pattern

When I added this pattern in r14-337-gc43819a9b4cd, I had missed the :c on the cmp part of the pattern meaning there might be some missing optimizations happening. The testcase shows an example of the missed optmization. Committed as obvious after a bootstrap/test on x86_64-linux-gnu. PR

Re: [PATCH] gimple-match: Do not try UNCOND optimization with COND_LEN.

Hi, as Juzhe noticed in gcc.dg/pr92301.c there was still something missing in the last patch. The attached v2 makes sure we always have a COND_LEN operation before returning true and initializes len and bias even if they are unused. Bootstrapped and regtested on aarch64 and x86. Regards Robin

Re: [PATCH V3] RISC-V: Support Dynamic LMUL Cost model

Hi Juzhe, glad that we can use the dominator info directly. Could we move the calculation of the info to the beginning (if it's not available)? That makes it clearer that it's a prerequisite. Function comments look good now. Some general remarks kind of similar to v1: - I would prefer a hash

Re: [C PATCH 1/6 v2] c: reorganize recursive type checking

On Sun, 10 Sep 2023, Martin Uecker via Gcc-patches wrote: > Thanks Joseph, below is a a revised version of this patch > with slight additional changes to the comment of > tagged_types_tu_compatible_p. > > ok for trunk? The revised version of this patch is OK. -- Joseph S. Myers jos...@codesou

Re: RISC-V: Replace not + bitwise_imm with li + bitwise_not

Note this is a size-speed tradeoff, as the Zcb extension has a 16-bit-wide C.NOT instruction. Might want to suppress this optimization when Zcb is present and the function is being optimized for size. On Mon, Sep 11, 2023 at 9:52 AM Jivan Hakobyan via Gcc-patches wrote: > > In the case when we

Re: [PATCH] analyzer: implement symbolic value support for CPython plugin's refcnt checker [PR107646]

On Sun, 2023-09-10 at 22:12 -0400, Eric Feng wrote: > On Thu, Sep 7, 2023 at 1:28 PM David Malcolm > wrote: > > > On Mon, 2023-09-04 at 22:13 -0400, Eric Feng wrote: > > [...snip...] > > > > > > I know you're emulating the old behavior I implemented way back in > > cpychecker, but I don't li

[committed] i386: Handle CONST_WIDE_INT in output_pic_addr_const [PR111340]

PR target/111340 gcc/ChangeLog: * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT. Call output_addr_const for CASE_CONST_SCALAR_INT. gcc/testsuite/ChangeLog: * gcc.target/i386/pr111340.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32

Re: [PATCH] fortran: Undo new symbols in all namespaces [PR110996]

Hi Mikael, On 9/11/23 14:38, Mikael Morin via Gcc-patches wrote: Hello, this fixes a memory management issue in the fortran frontend. I have included the (reduced) testcase from the PR, even if it wasn't failing here on x86_64 with the test harness. Tested on x86_64-pc-linux-gnu and manually ch

Re: [PATCH 4/5][Committed] RISC-V: Update Types for RISC-V Instructions

On 9/6/2023 4:23 PM, Kito Cheng via Gcc-patches wrote: LGTM Edwin Lu 於 2023年9月7日 週四 01:52 寫道： This patch adds types to riscv instructions that were added or were missed by the original patch https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628996.html gcc/ChangeLog: * config/r

Re: [PATCH 3/5][Committed] RISC-V: Add Types to Un-Typed Zicond Instructions

On 9/7/2023 6:17 AM, Jeff Law via Gcc-patches wrote: On 9/6/23 18:42, Tsukasa OI via Gcc-patches wrote: Looks okay to me but will need to resolve merge conflicts after commit af88776caa20 ("RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support"). Sure.  We allow trival updates t

[PATCH] small _BitInt tweaks

Hi! When discussing PR111369 with Andrew Pinski, I've realized that I haven't added BITINT_TYPE handling to range_check_type. Right now (unsigned) max + 1 == (unsigned) min for signed _BitInt,l so I think we don't need to do the extra hops for BITINT_TYPE (though possibly we don't need them for I

Re: [PATCH v2 1/5][Committed] RISC-V: Update Types for Vector Instructions

On 9/8/2023 4:56 PM, Jeff Law via Gcc-patches wrote: On 9/8/23 12:16, Edwin Lu wrote: This patch adds types to vector instructions that were added after or were missed by the original patch https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628594.html gcc/ChangeLog: * config/riscv/a

[PATCH] sccvn: Avoid ICEs on _BitInt load BIT_AND_EXPR mask [PR111338]

Hi! The following testcase ICEs, because vn_walk_cb_data::push_partial_def uses a fixed size buffer (64 target bytes) for its construction/deconstruction of partial stores and fails if larger precision than that is needed, and the PR93582 changes assert push_partial_def succeeds (and check the var

Re: [r14-3823 Regression] FAIL: c-c++-common/analyzer/compound-assignment-1.c -std=c++98 (test for warnings, line 72) on Linux/x86_64

Hi, Thanks for the report, After investigation it seems the location of the new dejagnu directive for C++ differs depending on the configuration. The expected warning is still emitted, but its location differ slightly. I expect it to be not an issue per se of the analyzer, but a divergence in the

Re: [PATCH] RISC-V Add Types to Un-Typed Thead Instructions:

On 9/10/2023 8:37 AM, Jeff Law via Gcc-patches wrote: On 8/31/23 11:36, Edwin Lu wrote: Related Discussion: https://inbox.sourceware.org/gcc-patches/12fb5088-3f28-0a69-de1e-f387371a5...@gmail.com/ This patch updates the THEAD instructions to ensure that no insn is left without a type attribut

Re: [PATCH] [11/12/13/14 Regression] ABI break in _Hash_node_value_base since GCC 11 [PR 111050]

On 11/09/2023 13:51, Jonathan Wakely wrote: On Sun, 10 Sept 2023 at 14:57, François Dumont via Libstdc++ wrote: Following confirmation of the fix by TC here is the patch where I'm simply adding a 'constexpr' on _M_next(). Please let me know this ChangeLog entry is correct. I would prefer thi

[PATCH 1/2] c++: Implement __is_member_function_pointer built-in trait

This patch implements built-in trait for std::is_member_function_pointer. gcc/cp/ChangeLog: * cp-trait.def (IS_MEMBER_FUNCTION_POINTER): Define __is_member_function_pointer. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_MEMBER_FUNCTION_POINTER. * se

[PATCH 2/2] libstdc++: Optimize is_member_function_pointer trait performance

This patch optimizes the performance of the is_member_function_pointer trait by dispatching to the new __is_member_function_pointer built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_member_function_pointer): Use __is_member_function_pointer built-in trait.

[PATCH 0/2] Optimize is_member_function_pointer trait performance

This patch series optimizes is_member_function_pointer trait performance. The first patch implements __is_member_function_pointer built-in trait. The second patch optimizes is_member_function_pointer trait performance by using __is_member_function_pointer built-in trait if available. The performan

Re: [PATCH] analyzer: Move gcc.dg/analyzer tests to c-c++-common (2) [PR96395]

Hi Christophe, On Mon, Sep 11, 2023 at 4:23 PM Christophe Lyon wrote: > Hi! > > > On Wed, 6 Sept 2023 at 22:22, David Malcolm via Gcc-patches < > gcc-patches@gcc.gnu.org> wrote: > >> On Wed, 2023-09-06 at 15:50 +0200, Benjamin Priour wrote: >> > Hi David, >> > Thanks for the review. >> > >> > >>

[PATCH 11/13] libstdc++: Remove dg-options "-std=gnu++23" from remaining tests

The testsuite will automatically select C++23 for these tests now, and removing the hardcoded -std option allows them to be tested for C++26 as well. libstdc++-v3/ChangeLog: * testsuite/18_support/headers/limits/synopsis_cxx23.cc: Remove dg-options. * testsuite/18_support/

[PATCH 10/13] libstdc++: Remove dg-options "-std=gnu++23" from std::expected tests

The testsuite will automatically select C++23 for these tests now, and removing the hardcoded -std option allows them to be tested for C++26 as well. libstdc++-v3/ChangeLog: * testsuite/20_util/expected/assign.cc: Remove dg-options. * testsuite/20_util/expected/bad.cc: Likewise.

RISC-V: Replace not + bitwise_imm with li + bitwise_not

In the case when we have C code like this int foo (int a) { return 100 & ~a; } GCC generates the following instruction sequence foo: not a0,a0 andia0,a0,100 ret This patch replaces that with this sequence foo: li a5,100 andn a0,a5,a0 ret The profitabili

[PATCH 08/13] libstdc++: Remove dg-options "-std=gnu++20" from std::format tests

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. libstdc++-v3/ChangeLog: * testsuite/std/format/arguments/args.cc: Remove dg-options. * testsuite/std/format/arguments/lwg

[PATCH 05/13] libstdc++: Remove dg-options "-std=c++20" from and tests

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. There doesn't seem to be any reason they need to use strict -std=c++20 mode, so don't add the { dg-add-options strict_std } directive, jus

[PATCH 12/13] libstdc++: Remove dg-options "-std=gnu++2a" from XFAIL std::span tests

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. We can also combine the { dg-require-effective-target c++2a } directive with the dg-do selector. We need to add the no_pch options for te

[PATCH 09/13] libstdc++: Remove dg-options "-std=gnu++20" from std::chrono tests

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. libstdc++-v3/ChangeLog: * testsuite/20_util/duration/arithmetic/overflow_c++20.cc: Remove dg-options. * testsuite

[PATCH 02/13] libstdc++: Replace dg-options "-std=c++11" with dg-add-options strict_std

These tests can (and should) also be run for later standards, so replace the { dg-options "-std=c++11" } with { dg-add-options strict_std } and a target selector for c++11. libstdc++-v3/ChangeLog: * testsuite/23_containers/deque/48101-2_neg.cc: Replace dg-options with target selec

[PATCH 07/13] libstdc++: Remove dg-options "-std=gnu++2a" from constrained algo tests

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. libstdc++-v3/ChangeLog: * testsuite/20_util/function_objects/range.cmp/equal_to.cc: Remove dg-options. * testsuit

[PATCH 04/13] libstdc++: Replace dg-options "-std=c++20" with dg-add-options strict_std

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. Because they test a problem seen with -std=c++20 add the new { dg-add-options strict_std } directive so that the test runner uses -std=c++N

[PATCH 13/13] libstdc++: Simplify dejagnu directives for some tests using threads

Replace dg-require-effective-target directives with a target selector on the dg-do directive. We can also remove { dg-require-effective-target pthread } and the associated { dg-options "-pthread" } by allowing it to run on non-pthread targets and conditionally adding -pthread only for pthread targ

[PATCH 06/13] libstdc++: Remove dg-options "-std=gnu++20" from and tests

The testsuite will automatically select C++20 for these tests now, and removing the hardcoded -std option allows them to be tested for C++23 and C++26 as well. libstdc++-v3/ChangeLog: * testsuite/std/concepts/1.cc: Remove dg-options. * testsuite/std/concepts/2.cc: Likewise.

[PATCH 03/13] libstdc++: Replace dg-options "-std=c++17" with dg-add-options strict_std

These tests can (and should) also be run for later standards, so replace the { dg-options "-std=c++17" } with { dg-add-options strict_std }. * testsuite/tr1/5_numerical_facilities/special_functions/07_conf_hyperg/compile_cxx17.cc: Replace dg-options -std=c++17 with dg-add-options

[PATCH 00/13] libstdc++: Add support for running tests with multiple -std options

This patch series replicates the behaviour of the g++ testsuite, so that libstdc++ tests can easily be run for multiple different -std options in a single testsuite run. As described in the updated docs, the -std options to use for every test can be overridden by setting v3_std_list in ~/.dejagnur

[PATCH 01/13] libstdc++: Add support for running tests with multiple -std options

This copies the code from the compiler's gcc/testsuite/lib/g++-dg.exp so that each test can be run multiple times, with different -std options. This means that we can remove most { dg-options "-std=gnu++20" } directives from tests, because the testsuite will automatically select a set of -std optio

Re: [PATCH 2/2] libstdc++: Add dg-require-thread-fence in several tests

On Mon, 11 Sept 2023 at 16:40, Christophe Lyon wrote: > > > > On Mon, 11 Sept 2023 at 17:22, Jonathan Wakely wrote: >> >> On Mon, 11 Sept 2023 at 14:57, Christophe Lyon >> wrote: >> > >> > >> > >> > On Mon, 11 Sept 2023 at 15:12, Jonathan Wakely wrote: >> >> >> >> On Mon, 11 Sept 2023 at 13:36,

[committed] libstdc++: Remove unconditional use of atomics in Debug Mode

Tested aarch64-linux. Pushed to trunk. Probably worth backporting too. -- >8 -- The fix for PR 91910 (r10-3426-gf7a3a382279585) introduced unconditional uses of atomics into src/c++11/debug.cc, which causes linker errors for arm4t where GCC emits an unresolved reference to __sync_synchronize. B

[committed] libstdc++: Move __glibcxx_assert_fail to its own file

Tested aarch64-linux. Pushed to trunk. Maybe worth backporting too. -- >8 -- This avoids a dependency on the other symbols in src/c++11/debug.o when linking statically to libstdc++.a without using -Wl,--gc-sections. libstdc++-v3/ChangeLog: * src/c++11/Makefile.am: Add new file.

Re: [PATCH] s390: Fix builtins vec_rli and verll

On 9/11/23 08:56, Stefan Schulze Frielinghaus wrote: > On Mon, Aug 28, 2023 at 11:33:37AM +0200, Andreas Krebbel wrote: >> Hi Stefan, >> >> do you really need to introduce a new flag for U64 given that the type of >> the builtin is unsigned long? > > In function s390_const_operand_ok the immediat

Re: [PATCH] libstdc++ Use _GLIBCXX_USE_BUILTIN_TRAIT

On Mon, 11 Sep 2023, Ken Matsui via Gcc-patches wrote: > This patch uses _GLIBCXX_USE_BUILTIN_TRAIT macro instead of __has_builtin in > the type_traits header for traits that have a corresponding fallback > non-built-in implementation. This macro supports to toggle the use of built-in > traits in

Re: [PATCH 2/2] libstdc++: Add dg-require-thread-fence in several tests

On Mon, 11 Sept 2023 at 17:22, Jonathan Wakely wrote: > On Mon, 11 Sept 2023 at 14:57, Christophe Lyon > wrote: > > > > > > > > On Mon, 11 Sept 2023 at 15:12, Jonathan Wakely > wrote: > >> > >> On Mon, 11 Sept 2023 at 13:36, Christophe Lyon > >> wrote: > >> > > >> > > >> > > >> > On Mon, 11 Se

[PATCH] libstdc++ Use _GLIBCXX_USE_BUILTIN_TRAIT

This patch uses _GLIBCXX_USE_BUILTIN_TRAIT macro instead of __has_builtin in the type_traits header for traits that have a corresponding fallback non-built-in implementation. This macro supports to toggle the use of built-in traits in the type_traits header through _GLIBCXX_DO_NOT_USE_BUILTIN_TRAIT

Re: [PATCH 2/2] libstdc++: Add dg-require-thread-fence in several tests

On 11/09/2023 16:22, Jonathan Wakely via Gcc-patches wrote: > On Mon, 11 Sept 2023 at 14:57, Christophe Lyon > wrote: >> >> >> >> On Mon, 11 Sept 2023 at 15:12, Jonathan Wakely wrote: >>> >>> On Mon, 11 Sept 2023 at 13:36, Christophe Lyon >>> wrote: On Mon, 11 Sept 2023 at 12

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