Re: [PATCH]rs6000: avoid peeking eof after __vector keyword

2022-03-21 Thread Jiufu Guo via Gcc-patches
Hi! Segher Boessenkool writes: > On Mon, Mar 21, 2022 at 02:14:08PM -0400, David Edelsohn wrote: >> On Mon, Mar 21, 2022 at 5:13 AM Jiufu Guo wrote: >> > There is a rare corner case: where __vector is followed only with ";" >> > and near the end of the file. > >> This is okay. Maybe a tweak t

[COMMITTED] print-tree:Avoid warnings of overflow

2022-03-21 Thread Qian Jianhua via Gcc-patches
This patch avoids two warnings of "'sprintf' may write a terminating nul past the end of the destination [-Wformat-overflow=]" when build GCC. Tested on x86_64, and committed as obvious. gcc/ChangeLog: * print-tree.cc: Change array length --- gcc/print-tree.cc | 4 ++-- 1 file changed,

RE: [PATCH v3] AVX512FP16: Fix wrong code for _mm_mask_f[c]madd.*sch [PR 104978]

2022-03-21 Thread Liu, Hongtao via Gcc-patches
> -Original Message- > From: Wang, Hongyu > Sent: Tuesday, March 22, 2022 11:28 AM > To: Liu, Hongtao > Cc: gcc-patches@gcc.gnu.org > Subject: [PATCH v3] AVX512FP16: Fix wrong code for _mm_mask_f[c]madd.*sch > [PR 104978] > > Hi, here is the patch with force_reg before lowpart_subreg.

[PATCH v3] AVX512FP16: Fix wrong code for _mm_mask_f[c]madd.*sch [PR 104978]

2022-03-21 Thread Hongyu Wang via Gcc-patches
Hi, here is the patch with force_reg before lowpart_subreg. Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde. Ok for master? For complex scalar intrinsic like _mm_mask_fcmadd_sch, the mask should be and by 1 to ensure the mask is bind to lowest byte. Use masked vmovss to perform same

Re: [PATCH v2] Add TARGET_MOVE_WITH_MODE_P

2022-03-21 Thread H.J. Lu via Gcc-patches
On Mon, Mar 14, 2022 at 8:44 AM Richard Sandiford wrote: > > Richard Biener writes: > > On Wed, Mar 9, 2022 at 7:04 PM Richard Sandiford > > wrote: > >> > >> Richard Biener via Gcc-patches writes: > >> > On Wed, Mar 2, 2022 at 10:18 PM H.J. Lu wrote: > >> >> > >> >> On Wed, Mar 02, 2022 at 09:

Re: [PATCH] RISC-V: Implement ZTSO extension.

2022-03-21 Thread Kito Cheng via Gcc-patches
Hi Palmer: Cool, so I keep that on the GCC 13 queue :) On Tue, Mar 22, 2022 at 10:41 AM Palmer Dabbelt wrote: > > On Mon, 21 Mar 2022 19:39:24 PDT (-0700), kito.ch...@sifive.com wrote: > > Hi Palmer: > > > > I guess the problem is binutils isn't included and it's too close to the > > GCC release

Re: [PATCH] RISC-V: Implement ZTSO extension.

2022-03-21 Thread Palmer Dabbelt
On Mon, 21 Mar 2022 19:39:24 PDT (-0700), kito.ch...@sifive.com wrote: Hi Palmer: I guess the problem is binutils isn't included and it's too close to the GCC release, and binutils will report errors if it has any unsupported extensions. Ya, sorry, I was trying to say that we should have more

Re: [PATCH] RISC-V: Implement ZTSO extension.

2022-03-21 Thread Kito Cheng
Hi Palmer: I guess the problem is binutils isn't included and it's too close to the GCC release, and binutils will report errors if it has any unsupported extensions. Most distro will use GCC 12 + binutils 2.38 or GCC 11 + binutils 2.38, so either combination doesn't work for march string with zt

Re: [PATCH] [i386] Extend splitter pattern to reversed condition by swapping then and else rtx. [PR target/104982]

2022-03-21 Thread Hongtao Liu via Gcc-patches
On Mon, Mar 21, 2022 at 9:06 PM liuhongt wrote: > > Failed to match this instruction: > (set (reg/v:SI 88 [ z ]) > (if_then_else:SI (eq (zero_extract:SI (reg:SI 92) > (const_int 1 [0x1]) > (zero_extend:SI (subreg:QI (reg:SI 93) 0))) > (const_int 0 [0

Re: [PATCH] RISC-V: Implement ZTSO extension.

2022-03-21 Thread Palmer Dabbelt
On Thu, 17 Mar 2022 23:52:04 PDT (-0700), gcc-patches@gcc.gnu.org wrote: Hi Shi-Hua: Thanks, this patch is LGTM, but I would defer that until stage 1, because the binutils part isn't merget yet. IMO we should at least have a __riscv_ztso define, and ideally have the relevent builtins ported (

[pushed] c++: initialized array of vla [PR58646]

2022-03-21 Thread Jason Merrill via Gcc-patches
We went into build_vec_init because we're dealing with a VLA, but then build_vec_init thought it was safe to just build an INIT_EXPR because the outer dimension is constant. Nope. Tested x86_64-pc-linux-gnu, applying to trunk. gcc/cp/ChangeLog: * init.cc (build_vec_init): Check for vla

Re: [PATCH] x86: Properly check FEATURE_AESKLE

2022-03-21 Thread Uros Bizjak via Gcc-patches
On Mon, Mar 21, 2022 at 10:51 PM H.J. Lu wrote: > > On Mon, Mar 21, 2022 at 2:29 PM Uros Bizjak wrote: > > > > On Mon, Mar 21, 2022 at 2:56 PM H.J. Lu wrote: > > > > > > 1. Pass 0x19 to __cpuid for bit_AESKLE. > > > 2. Enable FEATURE_AESKLE only if bit_AESKLE is set. > > > > > > PR targe

Re: [PATCH v3] x86: Disable SSE in ISA2 for -mgeneral-regs-only

2022-03-21 Thread Uros Bizjak via Gcc-patches
On Mon, Mar 21, 2022 at 10:57 PM H.J. Lu wrote: > > On Mon, Mar 21, 2022 at 10:50:11PM +0100, Uros Bizjak wrote: > > On Mon, Mar 21, 2022 at 10:47 PM H.J. Lu wrote: > > > > > > On Mon, Mar 21, 2022 at 10:23:59PM +0100, Uros Bizjak wrote: > > > > On Mon, Mar 21, 2022 at 10:10 PM H.J. Lu wrote: >

[PATCH v3] x86: Disable SSE in ISA2 for -mgeneral-regs-only

2022-03-21 Thread H.J. Lu via Gcc-patches
On Mon, Mar 21, 2022 at 10:50:11PM +0100, Uros Bizjak wrote: > On Mon, Mar 21, 2022 at 10:47 PM H.J. Lu wrote: > > > > On Mon, Mar 21, 2022 at 10:23:59PM +0100, Uros Bizjak wrote: > > > On Mon, Mar 21, 2022 at 10:10 PM H.J. Lu wrote: > > > > > > > > SSE and AVX ISAs in ISA2 should be disabled for

Re: [PATCH] x86: Properly check FEATURE_AESKLE

2022-03-21 Thread H.J. Lu via Gcc-patches
On Mon, Mar 21, 2022 at 2:29 PM Uros Bizjak wrote: > > On Mon, Mar 21, 2022 at 2:56 PM H.J. Lu wrote: > > > > 1. Pass 0x19 to __cpuid for bit_AESKLE. > > 2. Enable FEATURE_AESKLE only if bit_AESKLE is set. > > > > PR target/104998 > > * common/config/i386/cpuinfo.h (get_available_

Re: [PATCH v2] x86: Disable SSE in ISA2 for -mgeneral-regs-only

2022-03-21 Thread Uros Bizjak via Gcc-patches
On Mon, Mar 21, 2022 at 10:47 PM H.J. Lu wrote: > > On Mon, Mar 21, 2022 at 10:23:59PM +0100, Uros Bizjak wrote: > > On Mon, Mar 21, 2022 at 10:10 PM H.J. Lu wrote: > > > > > > SSE and AVX ISAs in ISA2 should be disabled for -mgeneral-regs-only. > > > > > > gcc/ > > > > > > PR target/1050

[PATCH v2] x86: Disable SSE in ISA2 for -mgeneral-regs-only

2022-03-21 Thread H.J. Lu via Gcc-patches
On Mon, Mar 21, 2022 at 10:23:59PM +0100, Uros Bizjak wrote: > On Mon, Mar 21, 2022 at 10:10 PM H.J. Lu wrote: > > > > SSE and AVX ISAs in ISA2 should be disabled for -mgeneral-regs-only. > > > > gcc/ > > > > PR target/105000 > > * common/config/i386/i386-common.cc > > (OPT

Re: [PATCH] x86: Properly check FEATURE_AESKLE

2022-03-21 Thread Uros Bizjak via Gcc-patches
On Mon, Mar 21, 2022 at 2:56 PM H.J. Lu wrote: > > 1. Pass 0x19 to __cpuid for bit_AESKLE. > 2. Enable FEATURE_AESKLE only if bit_AESKLE is set. > > PR target/104998 > * common/config/i386/cpuinfo.h (get_available_features): Pass > 0x19 to __cpuid for bit_AESKLE. Enable FE

[patch]update the documentation for TARGET_ZERO_CALL_USED_REGS hook and add an assertion

2022-03-21 Thread Qing Zhao via Gcc-patches
Hi, Per our discussion on: https://gcc.gnu.org/pipermail/gcc-patches/2022-March/592002.html I come up with the following patch to: 1. Update the documentation for TARGET_ZERO_CALL_USED_REGS hook; 2. Add an assertion in function.cc to make sure the actually zeroed_regs is a subset of all call

Re: [PATCH] x86: Disable SSE and AVX in ISA2 for -mgeneral-regs-only

2022-03-21 Thread Uros Bizjak via Gcc-patches
On Mon, Mar 21, 2022 at 10:10 PM H.J. Lu wrote: > > SSE and AVX ISAs in ISA2 should be disabled for -mgeneral-regs-only. > > gcc/ > > PR target/105000 > * common/config/i386/i386-common.cc > (OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Also disable SSE > and AVX. > >

[PATCH] x86: Disable SSE and AVX in ISA2 for -mgeneral-regs-only

2022-03-21 Thread H.J. Lu via Gcc-patches
SSE and AVX ISAs in ISA2 should be disabled for -mgeneral-regs-only. gcc/ PR target/105000 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_GENERAL_REGS_ONLY_UNSET): Also disable SSE and AVX. gcc/testsuite/ PR target/105000 * gcc.target/i386/

[PATCH] x86: Disable AVX on pr86722.c and pr90356.c

2022-03-21 Thread H.J. Lu via Gcc-patches
On Thu, Mar 17, 2022 at 9:47 PM sunil.k.pandey via Gcc-patches wrote: > > On Linux/x86_64, > > c482c28ba4c549006deb70dead90fe8ab34dcbcf is the first bad commit > commit c482c28ba4c549006deb70dead90fe8ab34dcbcf > Author: Roger Sayle > Date: Thu Mar 17 21:56:32 2022 + > > PR 90356: Use xo

[pushed] c++: designated init and aggregate members [PR102337]

2022-03-21 Thread Jason Merrill via Gcc-patches
Our C++20 designated initializer handling was broken with members of class type; we would find the relevant member and then try to find a member of the member with the same name. Or we would sometimes ignore the designator entirely. The former problem is fixed by the change to reshape_init_class,

[pushed] c++: designator and anon struct [PR101767]

2022-03-21 Thread Jason Merrill via Gcc-patches
We found .x in the anonymous struct, but then didn't find .y there; we should decide that means we're done with the struct rather than that the code is wrong. Tested x86_64-pc-linux-gnu, applying to trunk. PR c++/101767 gcc/cp/ChangeLog: * decl.cc (reshape_init_class): Back out

[committed] d: Fix internal compiler error: in build_complex, at tree.c:2358

2022-03-21 Thread Iain Buclaw via Gcc-patches
Hi, This patch fixes an ICE in the D front-end when constructing a complex object from a struct literal typed as enum __c_complex_float. The conversion from the special _Complex enum to native complex used build_complex, however the input value isn't necessarily a literal. Bootstrapped and regre

Re: [PATCH]rs6000: avoid peeking eof after __vector keyword

2022-03-21 Thread Segher Boessenkool
On Mon, Mar 21, 2022 at 02:14:08PM -0400, David Edelsohn wrote: > On Mon, Mar 21, 2022 at 5:13 AM Jiufu Guo wrote: > > There is a rare corner case: where __vector is followed only with ";" > > and near the end of the file. > This is okay. Maybe a tweak to the comment, see below. This whole funct

Re: [PATCH]rs6000: avoid peeking eof after __vector keyword

2022-03-21 Thread David Edelsohn via Gcc-patches
On Mon, Mar 21, 2022 at 5:13 AM Jiufu Guo wrote: > > Hi! > > There is a rare corner case: where __vector is followed only with ";" > and near the end of the file. > > Like the case in PR101168: > using vdbl = __vector double; > #define BREAK 1 > > For this case, "__vector double" is not followed

Re: [PING^2][PATCH][final] Handle compiler-generated asm insn

2022-03-21 Thread Tom de Vries via Gcc-patches
On 3/21/22 14:49, Richard Biener wrote: On Mon, Mar 21, 2022 at 12:50 PM Tom de Vries wrote: On 3/21/22 08:58, Richard Biener wrote: On Thu, Mar 17, 2022 at 4:10 PM Tom de Vries via Gcc-patches wrote: On 3/9/22 13:50, Tom de Vries wrote: On 2/22/22 14:55, Tom de Vries wrote: Hi, For the

Re: [PATCH] Ignore (possible) signed zeros in operands of FP comparisons.

2022-03-21 Thread Aldy Hernandez via Gcc-patches
On Fri, Mar 18, 2022 at 7:33 PM Aldy Hernandez wrote: > > > Consider the following interesting example: > > > > > > int foo(int x, double y) { > > > return (x * 0.0) < y; > > > } > > > > > > Although we know that x (when converted to double) can't be NaN or > > >>

[PATCH] tree-optimization/104912 - ensure cost model is checked first

2022-03-21 Thread Richard Biener via Gcc-patches
The following makes sure that when we build the versioning condition for vectorization including the cost model check, we check for the cost model and branch over other versioning checks. That is what the cost modeling assumes, since the cost model check is the only one accounted for in the scalar

Re: [PATCH v3, rs6000] Add V1TI into vector comparison expand [PR103316]

2022-03-21 Thread will schmidt via Gcc-patches
On Mon, 2022-03-21 at 09:51 +0800, HAO CHEN GUI wrote: > Hi, >This patch adds V1TI mode into a new mode iterator used in vector > comparison expands.Without the patch, the comparisons between two vector > __int128 are converted to scalar comparisons with branches. The code is > suboptimal.The p

Re: [PATCH v2] AVX512FP16: Fix wrong code for _mm_mask_f[c]madd.*sch [PR 104978]

2022-03-21 Thread Hongyu Wang via Gcc-patches
> Considering ICE in PR104976, it's better to force_reg before lowpart_subreg. > i.e. > op0 = lowpart_subreg (V4SFmode, force_reg (V8HFmode, operands[0]), V8HFmode); > if (!MEM_P (operands[1])) > operands[1] = force_reg (V8HFmode, operands[1]); > op1 = lowpart_subreg (V4SFmode, operands[1], V8HFm

[PATCH] x86: Properly check FEATURE_AESKLE

2022-03-21 Thread H.J. Lu via Gcc-patches
1. Pass 0x19 to __cpuid for bit_AESKLE. 2. Enable FEATURE_AESKLE only if bit_AESKLE is set. PR target/104998 * common/config/i386/cpuinfo.h (get_available_features): Pass 0x19 to __cpuid for bit_AESKLE. Enable FEATURE_AESKLE only if bit_AESKLE is set. --- gcc/comm

Re: [PING^2][PATCH][final] Handle compiler-generated asm insn

2022-03-21 Thread Richard Biener via Gcc-patches
On Mon, Mar 21, 2022 at 12:50 PM Tom de Vries wrote: > > On 3/21/22 08:58, Richard Biener wrote: > > On Thu, Mar 17, 2022 at 4:10 PM Tom de Vries via Gcc-patches > > wrote: > >> > >> On 3/9/22 13:50, Tom de Vries wrote: > >>> On 2/22/22 14:55, Tom de Vries wrote: > Hi, > > For the

[PATCH] [i386] Extend splitter pattern to reversed condition by swapping then and else rtx. [PR target/104982]

2022-03-21 Thread liuhongt via Gcc-patches
Failed to match this instruction: (set (reg/v:SI 88 [ z ]) (if_then_else:SI (eq (zero_extract:SI (reg:SI 92) (const_int 1 [0x1]) (zero_extend:SI (subreg:QI (reg:SI 93) 0))) (const_int 0 [0])) (reg:SI 95) (reg:SI 94))) but it's equal t

Re: [PATCH v2] AVX512FP16: Fix wrong code for _mm_mask_f[c]madd.*sch [PR 104978]

2022-03-21 Thread Hongtao Liu via Gcc-patches
On Mon, Mar 21, 2022 at 7:52 PM Hongyu Wang via Gcc-patches wrote: > > Hi, > > For complex scalar intrinsic like _mm_mask_fcmadd_sch, the > mask should be and by 1 to ensure the mask is bind to lowest byte. > Use masked vmovss to perform same operation which omits higher bits > of mask. > > Bootst

[PATCH] Add condition coverage profiling

2022-03-21 Thread Jørgen Kvalsvik via Gcc-patches
This patch adds support in gcc+gcov for modified condition/decision coverage (MC/DC) with the -fprofile-conditions flag. MC/DC is a type of test/code coverage, and it is particularly important in the avation and automotive industries for safety-critical applications. In particular, it is required o

[PATCH v2] AVX512FP16: Fix wrong code for _mm_mask_f[c]madd.*sch [PR 104978]

2022-03-21 Thread Hongyu Wang via Gcc-patches
Hi, For complex scalar intrinsic like _mm_mask_fcmadd_sch, the mask should be and by 1 to ensure the mask is bind to lowest byte. Use masked vmovss to perform same operation which omits higher bits of mask. Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,} and sde. Ok for master? gcc/ChangeLo

Re: [PING^2][PATCH][final] Handle compiler-generated asm insn

2022-03-21 Thread Tom de Vries via Gcc-patches
On 3/21/22 08:58, Richard Biener wrote: On Thu, Mar 17, 2022 at 4:10 PM Tom de Vries via Gcc-patches wrote: On 3/9/22 13:50, Tom de Vries wrote: On 2/22/22 14:55, Tom de Vries wrote: Hi, For the nvptx port, with -mptx-comment we have in pr53465.s: ... // #APP // 9 "gcc/testsuite/g

[committed] [PATCH] Avoid a warning of overflow

2022-03-21 Thread qianjh--- via Gcc-patches
Thank you @Arnaud Charlet Committed > -Original Message- > From: Arnaud Charlet > Sent: Monday, March 21, 2022 5:47 PM > To: Qian, Jianhua/钱 建华 > Cc: gcc-patches@gcc.gnu.org; Arnaud Charlet > Subject: Re: PING [PATCH] Avoid a warning of overflow > > > This warning will become ERROR in

Re: [PATCH] libstdc++: Work around clang misdesign in time_get<>::get [PR104990]

2022-03-21 Thread Jonathan Wakely via Gcc-patches
On Mon, 21 Mar 2022 at 06:42, Jakub Jelinek wrote: > > Hi! > > Apparently clang has a -fgnuc-version= option which allows it to pretend > it is any GCC version the user likes. It is already bad that it claims to > be GCC 4.2 compatible by default when it is not (various unimplemented > extensions

Re: [PATCH] Allow (void *) 0xdeadbeef accesses without warnings [PR99578]

2022-03-21 Thread Martin Liška
Hi. I'm installing the following patch that documents the newly introduced parameter. MartinFrom 3f18553eb7dabc6528d712e54b25ea6f96e51bde Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Mon, 21 Mar 2022 10:46:57 +0100 Subject: [PATCH] docs: Document min-pagesize parameter. gcc/ChangeLog:

Re: PING [PATCH] Avoid a warning of overflow

2022-03-21 Thread Arnaud Charlet via Gcc-patches
> This warning will become ERROR in stage2 of bootstrap when use > " make BOOT_CFLAGS='-O0' BOOT_CXXFLAGS='-O0' " command. > So it is better to fix this warning. > There are other similar warnings. I will submit patches one by one. > > Tested on x86_64. OK for trunk? This is OK (pretty much obv

PING [PATCH] Avoid a warning of overflow

2022-03-21 Thread qianjh--- via Gcc-patches
Hi This warning will become ERROR in stage2 of bootstrap when use " make BOOT_CFLAGS='-O0' BOOT_CXXFLAGS='-O0' " command. So it is better to fix this warning. There are other similar warnings. I will submit patches one by one. Tested on x86_64. OK for trunk? > -Original Message- > Fro

[PATCH] Dump when estimating the number of iterations of a loop

2022-03-21 Thread Richard Biener via Gcc-patches
Currently the dumps are somewhat inter-mangled, not showing the (possibly bad) recursion between niter estimation and number of iteration computation. The following tries to improve deciphering a little bit by dumping when we do niter estimation. Bootstrapped and tested on x86_64-unknown-linux-gn

[PATCH]rs6000: avoid peeking eof after __vector keyword

2022-03-21 Thread Jiufu Guo via Gcc-patches
Hi! There is a rare corner case: where __vector is followed only with ";" and near the end of the file. Like the case in PR101168: using vdbl = __vector double; #define BREAK 1 For this case, "__vector double" is not followed by a PP_NAME, it is followed by CPP_SEMICOLON and then EOF. In this

[committed] RISC-V: Implement misc macro for vector extensions.

2022-03-21 Thread Kito Cheng
See also: https://github.com/riscv-non-isa/riscv-c-api-doc/pull/21 gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_ext_flag_table): Update flag name and mask name. * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Define misc macro for vector extensio

Re: [PING^2][PATCH][final] Handle compiler-generated asm insn

2022-03-21 Thread Richard Biener via Gcc-patches
On Thu, Mar 17, 2022 at 4:10 PM Tom de Vries via Gcc-patches wrote: > > On 3/9/22 13:50, Tom de Vries wrote: > > On 2/22/22 14:55, Tom de Vries wrote: > >> Hi, > >> > >> For the nvptx port, with -mptx-comment we have in pr53465.s: > >> ... > >> // #APP > >> // 9 "gcc/testsuite/gcc.c-tortu

Re: [PATCH] rtl-ssa: Fix prev/next_def confusion [PR104869]

2022-03-21 Thread Richard Biener via Gcc-patches
On Sun, Mar 20, 2022 at 10:41 PM Richard Sandiford via Gcc-patches wrote: > > rtl-ssa chains definitions into an RPO list. It also groups > sequences of clobbers together into a single node, so that it's > possible to skip over the clobbers in constant time in order to > get the next or previous

Re: [PATCH] Reset relations when crossing backedges.

2022-03-21 Thread Richard Biener via Gcc-patches
On Sat, Mar 19, 2022 at 8:27 PM Jeff Law wrote: > > > > On 2/2/2022 2:27 AM, Richard Biener wrote: > > On Tue, Feb 1, 2022 at 7:41 PM Aldy Hernandez wrote: > >> Ping > > I didn't quite get Jeffs comment, so I waited (sorry). I've meanwhile added > Sorry. IIRC the concern was whether or not we n

Re: [r12-7687 Regression] FAIL: gcc.target/i386/bt-5.c scan-assembler-times bt[lq][ \t] 7 on Linux/x86_64

2022-03-21 Thread Richard Biener via Gcc-patches
On Thu, 17 Mar 2022, sunil.k.pandey wrote: > On Linux/x86_64, > > 3a7ba8fd0cda387809e4902328af2473662b6a4a is the first bad commit > commit 3a7ba8fd0cda387809e4902328af2473662b6a4a > Author: Richard Biener > Date: Thu Mar 17 08:10:59 2022 +0100 > > tree-optimization/104960 - unsplit edges