https://gcc.gnu.org/g:f8aff8ceb76e648416011419087304701c6e8911
commit f8aff8ceb76e648416011419087304701c6e8911
Author: Michael Meissner
Date: Fri Apr 12 22:48:06 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.test | 16
1 file changed, 16 insertions(+)
diff --git
https://gcc.gnu.org/g:42d3d30eb66b4fb8d0a1ce0b96f3fbf24728e18e
commit 42d3d30eb66b4fb8d0a1ce0b96f3fbf24728e18e
Author: Michael Meissner
Date: Fri Apr 12 22:45:36 2024 -0400
Remove moves for tar register.
2024-04-12 Michael Meissner
gcc/
* config/rs6000
https://gcc.gnu.org/g:b18162759a6d464256b0195bc6447f0a1c9dd5dd
commit r14-9951-gb18162759a6d464256b0195bc6447f0a1c9dd5dd
Author: Andrew Carlotti
Date: Thu Apr 11 17:00:30 2024 +0100
aarch64: Enable +cssc for armv8.9-a
FEAT_CSSC is mandatory in the architecture from Armv8.9.
https://gcc.gnu.org/g:cc0ccb073996f9df58b7390b24478bc229ecfca7
commit cc0ccb073996f9df58b7390b24478bc229ecfca7
Author: Michael Meissner
Date: Fri Apr 12 19:32:34 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.test | 11 +++
1 file changed, 11 insertions(+)
diff --git a/gc
https://gcc.gnu.org/g:6180d85c1ffa6273af5bde06c7fc258e130232b6
commit 6180d85c1ffa6273af5bde06c7fc258e130232b6
Author: Michael Meissner
Date: Fri Apr 12 19:31:24 2024 -0400
Update debug register number for the tar register.
2024-04-12 Michael Meissner
gcc/
https://gcc.gnu.org/g:9cf198d403a5281fb999be669b79f5914594c233
commit 9cf198d403a5281fb999be669b79f5914594c233
Author: Michael Meissner
Date: Fri Apr 12 19:08:08 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.test | 195 -
1 file
https://gcc.gnu.org/g:374cc9624abe4af886b159a2a0beefdc27cbac40
commit 374cc9624abe4af886b159a2a0beefdc27cbac40
Author: Michael Meissner
Date: Fri Apr 12 19:05:11 2024 -0400
Add support for -mtar
2024-04-12 Michael Meissner
gcc/
* config/rs6000/constrai
https://gcc.gnu.org/g:6039925631780741ba77666ef2ef743aa2a925a8
commit r14-9950-g6039925631780741ba77666ef2ef743aa2a925a8
Author: Marek Polacek
Date: Mon Mar 11 17:45:55 2024 -0400
c++: ICE with temporary of class type in array DMI [PR109966]
This ICE started with the fairly compli
https://gcc.gnu.org/g:aa57af93ba22865be747f926e4e5f219e7f8758a
commit r14-9949-gaa57af93ba22865be747f926e4e5f219e7f8758a
Author: Will Schmidt
Date: Fri Apr 12 14:55:16 2024 -0500
rs6000: Add OPTION_MASK_POWER8 [PR101865]
The bug in PR101865 is the _ARCH_PWR8 predefine macro is con
https://gcc.gnu.org/g:716af95fd454871473c4b118b8412b6a68459b75
commit r14-9948-g716af95fd454871473c4b118b8412b6a68459b75
Author: Patrick Palka
Date: Fri Apr 12 15:50:04 2024 -0400
c++/modules: local type merging [PR99426]
One known missing piece in the modules implementation is me
https://gcc.gnu.org/g:d435571b54b02946c97b5b24f20e5a7058fd96a1
commit r14-9946-gd435571b54b02946c97b5b24f20e5a7058fd96a1
Author: Jason Merrill
Date: Fri Apr 12 13:24:44 2024 -0400
c++: reference list-init, conversion fn [PR113141]
The original testcase in PR113141 is an instance o
https://gcc.gnu.org/g:c9500083073ff5e0f5c1c9db92d7ce6e51a62919
commit r14-9945-gc9500083073ff5e0f5c1c9db92d7ce6e51a62919
Author: Tatsuyuki Ishi
Date: Tue Apr 9 23:57:24 2024 +0900
Regenerate opt.urls
Fixes: 97069657c4e ("RISC-V: Implement TLS Descriptors.")
gcc/ChangeLog:
https://gcc.gnu.org/g:91146346f57cc54dfeb2669347edd0eb3d13af7f
commit r14-9944-g91146346f57cc54dfeb2669347edd0eb3d13af7f
Author: Jakub Jelinek
Date: Fri Apr 12 20:53:10 2024 +0200
c++: Fix bogus warnings about ignored annotations [PR114691]
The middle-end warns about the ANNOTATE_
https://gcc.gnu.org/g:d74fe10b13336b9de2e025ced4af00a25ff1d3e7
commit r14-9943-gd74fe10b13336b9de2e025ced4af00a25ff1d3e7
Author: Patrick Palka
Date: Fri Apr 12 14:52:31 2024 -0400
c++: templated substitution into lambda-expr, cont [PR114393]
The original PR114393 testcase is unfor
https://gcc.gnu.org/g:87d20d149ee92ba3ba0415299eae6dce12482bec
commit 87d20d149ee92ba3ba0415299eae6dce12482bec
Author: Michael Meissner
Date: Fri Apr 12 14:39:02 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.bugs | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
https://gcc.gnu.org/g:2c9a83413db78aba0b788b199cbf94d69f71f6bd
commit 2c9a83413db78aba0b788b199cbf94d69f71f6bd
Author: Michael Meissner
Date: Fri Apr 12 14:37:52 2024 -0400
Simplify converting between SImode and SF/DFmode.
2024-04-12 Michael Meissner
gcc/
https://gcc.gnu.org/g:0fd824d717ca901319864a5eeba4e62b278f8329
commit r14-9942-g0fd824d717ca901319864a5eeba4e62b278f8329
Author: Jakub Jelinek
Date: Fri Apr 12 19:57:04 2024 +0200
c++: Diagnose or avoid constexpr dtors in classes with virtual bases
[PR114426]
I had another look a
https://gcc.gnu.org/g:245595d72818526e2ca857848831e8afa87ae2de
commit r14-9941-g245595d72818526e2ca857848831e8afa87ae2de
Author: Andrew Pinski
Date: Wed Apr 10 13:39:01 2024 -0700
match: Fix `!a?b:c` and `a?~t:t` patterns for signed 1 bit types [PR114666]
The problem is `!a?b:c` p
https://gcc.gnu.org/g:94405026c6c064a9e08d9f956f0ce067b6002caa
commit 94405026c6c064a9e08d9f956f0ce067b6002caa
Author: Michael Meissner
Date: Fri Apr 12 12:26:03 2024 -0400
Revert all changes
Diff:
---
gcc/config/rs6000/rs6000.md | 44
1 file
https://gcc.gnu.org/g:a76f236e084cbd02e4e3711cdfc3191dc7eeb460
commit r14-9939-ga76f236e084cbd02e4e3711cdfc3191dc7eeb460
Author: Stefan Schulze Frielinghaus
Date: Fri Apr 12 16:54:38 2024 +0200
s390: testsuite: Xfail range-sincos.c and vrp-float-abs-1.c
As mentioned in PR114678 th
https://gcc.gnu.org/g:081c1e93d56d35c7314ed68e6d87628b430de917
commit r14-9938-g081c1e93d56d35c7314ed68e6d87628b430de917
Author: Patrick Palka
Date: Fri Apr 12 08:59:27 2024 -0400
c++: templated substitution into lambda-expr [PR114393]
The below testcases use a lambda-expr as a te
https://gcc.gnu.org/g:3bd3ca05b519b99b5ea570c10fd80737cd4c6c49
commit r14-9937-g3bd3ca05b519b99b5ea570c10fd80737cd4c6c49
Author: Ian McInerney
Date: Thu Apr 4 16:16:32 2024 +0100
libgfortran: Fix compilation of gf_vsnprintf
The fallback function (gf_vsnprintf) to provide a vsnprin
https://gcc.gnu.org/g:6e7e5943619a2c20d93fc7089c885483786558bc
commit r14-9936-g6e7e5943619a2c20d93fc7089c885483786558bc
Author: Pan Li
Date: Fri Apr 12 16:38:18 2024 +0800
RISC-V: Fix Werror=sign-compare in riscv_validate_vector_type
This patch would like to fix the Werror=sign-c
https://gcc.gnu.org/g:076f07ddf9d7a348da1459a81a14eaf7d7c256a5
commit r12-10321-g076f07ddf9d7a348da1459a81a14eaf7d7c256a5
Author: Iain Sandoe
Date: Mon May 2 19:42:49 2022 +0100
Objective-C, NeXT: Adjust symbol marking to match host tools.
Current host tools mark some additional s
https://gcc.gnu.org/g:67e1433a94f8ca82e2c36b79af44256430c73c38
commit r14-9935-g67e1433a94f8ca82e2c36b79af44256430c73c38
Author: Stefan Schulze Frielinghaus
Date: Fri Apr 12 11:06:24 2024 +0200
analyzer: Bail out on function pointer for -Wanalyzer-allocation-size
On s390 pr94688.c
https://gcc.gnu.org/g:8c6f13d2cc1884921e7c532e03786f0344bededd
commit r14-9934-g8c6f13d2cc1884921e7c532e03786f0344bededd
Author: Jakub Jelinek
Date: Fri Apr 12 11:00:43 2024 +0200
tree-cfg: Make the verifier returns_twice message translatable
While translation of the verifier mess
https://gcc.gnu.org/g:c9e94ae448ba309dba74de3ee1974a3ed9248889
commit r14-9933-gc9e94ae448ba309dba74de3ee1974a3ed9248889
Author: Jakub Jelinek
Date: Fri Apr 12 10:59:54 2024 +0200
Limit special asan/ubsan/bitint returns_twice handling to calls in bbs with
abnormal pred [PR114687]
https://gcc.gnu.org/g:cb68221c59e8f98e107bb5842d319bee3a66b8dc
commit r11-11317-gcb68221c59e8f98e107bb5842d319bee3a66b8dc
Author: Kito Cheng
Date: Wed Feb 28 16:01:52 2024 +0800
RISC-V: Fix __atomic_compare_exchange with 32 bit value on RV64
atomic_compare_and_swapsi will use lr.w
https://gcc.gnu.org/g:e30e760b51b108786946e04a26e92531762b022d
commit r14-9932-ge30e760b51b108786946e04a26e92531762b022d
Author: Filip Kastl
Date: Fri Apr 12 09:52:27 2024 +0200
contrib/check-params-in-docs.py: Ignore target-specific params
contrib/check-params-in-docs.py is a scr
https://gcc.gnu.org/g:6ae9d9f24734d61f20bc06a96cecd6c02f77d5d7
commit 6ae9d9f24734d61f20bc06a96cecd6c02f77d5d7
Author: Michael Meissner
Date: Fri Apr 12 03:30:47 2024 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.bugs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
https://gcc.gnu.org/g:70490d46340627347654fe28f885a8c8577583c1
commit 70490d46340627347654fe28f885a8c8577583c1
Author: Michael Meissner
Date: Fri Apr 12 03:29:58 2024 -0400
Simplify converting between SImode and SF/DFmode.
2024-04-12 Michael Meissner
gcc/
https://gcc.gnu.org/g:d97e784f9887aece6d857e5790ea931ea6e044ee
commit d97e784f9887aece6d857e5790ea931ea6e044ee
Author: Michael Meissner
Date: Fri Apr 12 03:25:09 2024 -0400
Revert all changes
Diff:
---
gcc/config/rs6000/rs6000.md | 44
1 file
https://gcc.gnu.org/g:b6c8259076a336e8082853ed6dda083c25a465d0
commit r14-9931-gb6c8259076a336e8082853ed6dda083c25a465d0
Author: Stefan Schulze Frielinghaus
Date: Fri Apr 12 09:20:53 2024 +0200
testsuite: Fix loop-interchange-16.c
Prevent loop unrolling of the innermost loop becau
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